2 * SDL Inc. RISCom/N2 synchronous serial card driver for Linux
4 * Copyright (C) 1998-2003 Krzysztof Halasa <khc@pm.waw.pl>
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License
8 * as published by the Free Software Foundation.
10 * For information see <http://www.kernel.org/pub/linux/utils/net/hdlc/>
12 * Note: integrated CSU/DSU/DDS are not supported by this driver
14 * Sources of information:
15 * Hitachi HD64570 SCA User's Manual
16 * SDL Inc. PPP/HDLC/CISCO driver
19 #include <linux/module.h>
20 #include <linux/kernel.h>
21 #include <linux/slab.h>
22 #include <linux/types.h>
23 #include <linux/fcntl.h>
25 #include <linux/string.h>
26 #include <linux/errno.h>
27 #include <linux/init.h>
28 #include <linux/ioport.h>
29 #include <linux/moduleparam.h>
30 #include <linux/netdevice.h>
31 #include <linux/hdlc.h>
36 static const char* version
= "SDL RISCom/N2 driver version: 1.15";
37 static const char* devname
= "RISCom/N2";
42 #define USE_WINDOWSIZE 16384
43 #define USE_BUS16BITS 1
44 #define CLOCK_BASE 9830400 /* 9.8304 MHz */
45 #define MAX_PAGES 16 /* 16 RAM pages at max */
46 #define MAX_RAM_SIZE 0x80000 /* 512 KB */
47 #if MAX_RAM_SIZE > MAX_PAGES * USE_WINDOWSIZE
49 #define MAX_RAM_SIZE (MAX_PAGES * USE_WINDOWSIZE)
51 #define N2_IOPORTS 0x10
52 #define NEED_DETECT_RAM
53 #define NEED_SCA_MSCI_INTR
54 #define MAX_TX_BUFFERS 10
56 static char *hw
= NULL
; /* pointer to hw=xxx command line string */
58 /* RISCom/N2 Board Registers */
60 /* PC Control Register */
62 #define PCR_RUNSCA 1 /* Run 64570 */
63 #define PCR_VPM 2 /* Enable VPM - needed if using RAM above 1 MB */
64 #define PCR_ENWIN 4 /* Open window */
65 #define PCR_BUS16 8 /* 16-bit bus */
68 /* Memory Base Address Register */
72 /* Page Scan Register */
77 #define PSR_WINBITS 0x60
78 #define PSR_DMAEN 0x80
79 #define PSR_PAGEBITS 0x0F
82 /* Modem Control Reg */
84 #define CLOCK_OUT_PORT1 0x80
85 #define CLOCK_OUT_PORT0 0x40
86 #define TX422_PORT1 0x20
87 #define TX422_PORT0 0x10
88 #define DSR_PORT1 0x08
89 #define DSR_PORT0 0x04
90 #define DTR_PORT1 0x02
91 #define DTR_PORT0 0x01
94 typedef struct port_s
{
95 struct net_device
*dev
;
97 spinlock_t lock
; /* TX lock */
98 sync_serial_settings settings
;
99 int valid
; /* port enabled */
100 int rxpart
; /* partial frame received, next frame invalid*/
101 unsigned short encoding
;
102 unsigned short parity
;
103 u16 rxin
; /* rx ring buffer 'in' pointer */
104 u16 txin
; /* tx ring buffer 'in' and 'last' pointers */
106 u8 rxs
, txs
, tmc
; /* SCA registers */
107 u8 phy_node
; /* physical port # - 0 or 1 */
108 u8 log_node
; /* logical port # */
113 typedef struct card_s
{
114 u8 __iomem
*winbase
; /* ISA window base address */
115 u32 phy_winbase
; /* ISA physical base address */
116 u32 ram_size
; /* number of bytes */
117 u16 io
; /* IO Base address */
118 u16 buff_offset
; /* offset of first buffer of first channel */
119 u16 rx_ring_buffers
; /* number of buffers in a ring */
121 u8 irq
; /* IRQ (3-15) */
124 struct card_s
*next_card
;
128 static card_t
*first_card
;
129 static card_t
**new_card
= &first_card
;
132 #define sca_reg(reg, card) (0x8000 | (card)->io | \
133 ((reg) & 0x0F) | (((reg) & 0xF0) << 6))
134 #define sca_in(reg, card) inb(sca_reg(reg, card))
135 #define sca_out(value, reg, card) outb(value, sca_reg(reg, card))
136 #define sca_inw(reg, card) inw(sca_reg(reg, card))
137 #define sca_outw(value, reg, card) outw(value, sca_reg(reg, card))
139 #define port_to_card(port) ((port)->card)
140 #define log_node(port) ((port)->log_node)
141 #define phy_node(port) ((port)->phy_node)
142 #define winsize(card) (USE_WINDOWSIZE)
143 #define winbase(card) ((card)->winbase)
144 #define get_port(card, port) ((card)->ports[port].valid ? \
145 &(card)->ports[port] : NULL)
149 static __inline__ u8
sca_get_page(card_t
*card
)
151 return inb(card
->io
+ N2_PSR
) & PSR_PAGEBITS
;
155 static __inline__
void openwin(card_t
*card
, u8 page
)
157 u8 psr
= inb(card
->io
+ N2_PSR
);
158 outb((psr
& ~PSR_PAGEBITS
) | page
, card
->io
+ N2_PSR
);
167 static void n2_set_iface(port_t
*port
)
169 card_t
*card
= port
->card
;
171 u8 mcr
= inb(io
+ N2_MCR
);
172 u8 msci
= get_msci(port
);
173 u8 rxs
= port
->rxs
& CLK_BRG_MASK
;
174 u8 txs
= port
->txs
& CLK_BRG_MASK
;
176 switch(port
->settings
.clock_type
) {
178 mcr
|= port
->phy_node
? CLOCK_OUT_PORT1
: CLOCK_OUT_PORT0
;
179 rxs
|= CLK_BRG_RX
; /* BRG output */
180 txs
|= CLK_RXCLK_TX
; /* RX clock */
184 mcr
|= port
->phy_node
? CLOCK_OUT_PORT1
: CLOCK_OUT_PORT0
;
185 rxs
|= CLK_LINE_RX
; /* RXC input */
186 txs
|= CLK_BRG_TX
; /* BRG output */
190 mcr
|= port
->phy_node
? CLOCK_OUT_PORT1
: CLOCK_OUT_PORT0
;
191 rxs
|= CLK_LINE_RX
; /* RXC input */
192 txs
|= CLK_RXCLK_TX
; /* RX clock */
195 default: /* Clock EXTernal */
196 mcr
&= port
->phy_node
? ~CLOCK_OUT_PORT1
: ~CLOCK_OUT_PORT0
;
197 rxs
|= CLK_LINE_RX
; /* RXC input */
198 txs
|= CLK_LINE_TX
; /* TXC input */
201 outb(mcr
, io
+ N2_MCR
);
204 sca_out(rxs
, msci
+ RXS
, card
);
205 sca_out(txs
, msci
+ TXS
, card
);
211 static int n2_open(struct net_device
*dev
)
213 port_t
*port
= dev_to_port(dev
);
214 int io
= port
->card
->io
;
215 u8 mcr
= inb(io
+ N2_MCR
) | (port
->phy_node
? TX422_PORT1
:TX422_PORT0
);
218 result
= hdlc_open(dev
);
222 mcr
&= port
->phy_node
? ~DTR_PORT1
: ~DTR_PORT0
; /* set DTR ON */
223 outb(mcr
, io
+ N2_MCR
);
225 outb(inb(io
+ N2_PCR
) | PCR_ENWIN
, io
+ N2_PCR
); /* open window */
226 outb(inb(io
+ N2_PSR
) | PSR_DMAEN
, io
+ N2_PSR
); /* enable dma */
234 static int n2_close(struct net_device
*dev
)
236 port_t
*port
= dev_to_port(dev
);
237 int io
= port
->card
->io
;
238 u8 mcr
= inb(io
+N2_MCR
) | (port
->phy_node
? TX422_PORT1
: TX422_PORT0
);
241 mcr
|= port
->phy_node
? DTR_PORT1
: DTR_PORT0
; /* set DTR OFF */
242 outb(mcr
, io
+ N2_MCR
);
249 static int n2_ioctl(struct net_device
*dev
, struct ifreq
*ifr
, int cmd
)
251 const size_t size
= sizeof(sync_serial_settings
);
252 sync_serial_settings new_line
;
253 sync_serial_settings __user
*line
= ifr
->ifr_settings
.ifs_ifsu
.sync
;
254 port_t
*port
= dev_to_port(dev
);
257 if (cmd
== SIOCDEVPRIVATE
) {
262 if (cmd
!= SIOCWANDEV
)
263 return hdlc_ioctl(dev
, ifr
, cmd
);
265 switch(ifr
->ifr_settings
.type
) {
267 ifr
->ifr_settings
.type
= IF_IFACE_SYNC_SERIAL
;
268 if (ifr
->ifr_settings
.size
< size
) {
269 ifr
->ifr_settings
.size
= size
; /* data size wanted */
272 if (copy_to_user(line
, &port
->settings
, size
))
276 case IF_IFACE_SYNC_SERIAL
:
277 if(!capable(CAP_NET_ADMIN
))
280 if (copy_from_user(&new_line
, line
, size
))
283 if (new_line
.clock_type
!= CLOCK_EXT
&&
284 new_line
.clock_type
!= CLOCK_TXFROMRX
&&
285 new_line
.clock_type
!= CLOCK_INT
&&
286 new_line
.clock_type
!= CLOCK_TXINT
)
287 return -EINVAL
; /* No such clock setting */
289 if (new_line
.loopback
!= 0 && new_line
.loopback
!= 1)
292 memcpy(&port
->settings
, &new_line
, size
); /* Update settings */
297 return hdlc_ioctl(dev
, ifr
, cmd
);
303 static void n2_destroy_card(card_t
*card
)
307 for (cnt
= 0; cnt
< 2; cnt
++)
308 if (card
->ports
[cnt
].card
) {
309 struct net_device
*dev
= port_to_dev(&card
->ports
[cnt
]);
310 unregister_hdlc_device(dev
);
314 free_irq(card
->irq
, card
);
317 iounmap(card
->winbase
);
318 release_mem_region(card
->phy_winbase
, USE_WINDOWSIZE
);
322 release_region(card
->io
, N2_IOPORTS
);
323 if (card
->ports
[0].dev
)
324 free_netdev(card
->ports
[0].dev
);
325 if (card
->ports
[1].dev
)
326 free_netdev(card
->ports
[1].dev
);
332 static int __init
n2_run(unsigned long io
, unsigned long irq
,
333 unsigned long winbase
, long valid0
, long valid1
)
339 if (io
< 0x200 || io
> 0x3FF || (io
% N2_IOPORTS
) != 0) {
340 printk(KERN_ERR
"n2: invalid I/O port value\n");
344 if (irq
< 3 || irq
> 15 || irq
== 6) /* FIXME */ {
345 printk(KERN_ERR
"n2: invalid IRQ value\n");
349 if (winbase
< 0xA0000 || winbase
> 0xFFFFF || (winbase
& 0xFFF) != 0) {
350 printk(KERN_ERR
"n2: invalid RAM value\n");
354 card
= kzalloc(sizeof(card_t
), GFP_KERNEL
);
356 printk(KERN_ERR
"n2: unable to allocate memory\n");
360 card
->ports
[0].dev
= alloc_hdlcdev(&card
->ports
[0]);
361 card
->ports
[1].dev
= alloc_hdlcdev(&card
->ports
[1]);
362 if (!card
->ports
[0].dev
|| !card
->ports
[1].dev
) {
363 printk(KERN_ERR
"n2: unable to allocate memory\n");
364 n2_destroy_card(card
);
368 if (!request_region(io
, N2_IOPORTS
, devname
)) {
369 printk(KERN_ERR
"n2: I/O port region in use\n");
370 n2_destroy_card(card
);
375 if (request_irq(irq
, &sca_intr
, 0, devname
, card
)) {
376 printk(KERN_ERR
"n2: could not allocate IRQ\n");
377 n2_destroy_card(card
);
382 if (!request_mem_region(winbase
, USE_WINDOWSIZE
, devname
)) {
383 printk(KERN_ERR
"n2: could not request RAM window\n");
384 n2_destroy_card(card
);
387 card
->phy_winbase
= winbase
;
388 card
->winbase
= ioremap(winbase
, USE_WINDOWSIZE
);
389 if (!card
->winbase
) {
390 printk(KERN_ERR
"n2: ioremap() failed\n");
391 n2_destroy_card(card
);
395 outb(0, io
+ N2_PCR
);
396 outb(winbase
>> 12, io
+ N2_BAR
);
398 switch (USE_WINDOWSIZE
) {
400 outb(WIN16K
, io
+ N2_PSR
);
404 outb(WIN32K
, io
+ N2_PSR
);
408 outb(WIN64K
, io
+ N2_PSR
);
412 printk(KERN_ERR
"n2: invalid window size\n");
413 n2_destroy_card(card
);
417 pcr
= PCR_ENWIN
| PCR_VPM
| (USE_BUS16BITS
? PCR_BUS16
: 0);
418 outb(pcr
, io
+ N2_PCR
);
420 card
->ram_size
= sca_detect_ram(card
, card
->winbase
, MAX_RAM_SIZE
);
422 /* number of TX + RX buffers for one port */
423 i
= card
->ram_size
/ ((valid0
+ valid1
) * (sizeof(pkt_desc
) +
426 card
->tx_ring_buffers
= min(i
/ 2, MAX_TX_BUFFERS
);
427 card
->rx_ring_buffers
= i
- card
->tx_ring_buffers
;
429 card
->buff_offset
= (valid0
+ valid1
) * sizeof(pkt_desc
) *
430 (card
->tx_ring_buffers
+ card
->rx_ring_buffers
);
432 printk(KERN_INFO
"n2: RISCom/N2 %u KB RAM, IRQ%u, "
433 "using %u TX + %u RX packets rings\n", card
->ram_size
/ 1024,
434 card
->irq
, card
->tx_ring_buffers
, card
->rx_ring_buffers
);
436 if (card
->tx_ring_buffers
< 1) {
437 printk(KERN_ERR
"n2: RAM test failed\n");
438 n2_destroy_card(card
);
442 pcr
|= PCR_RUNSCA
; /* run SCA */
443 outb(pcr
, io
+ N2_PCR
);
444 outb(0, io
+ N2_MCR
);
447 for (cnt
= 0; cnt
< 2; cnt
++) {
448 port_t
*port
= &card
->ports
[cnt
];
449 struct net_device
*dev
= port_to_dev(port
);
450 hdlc_device
*hdlc
= dev_to_hdlc(dev
);
452 if ((cnt
== 0 && !valid0
) || (cnt
== 1 && !valid1
))
455 port
->phy_node
= cnt
;
458 if ((cnt
== 1) && valid0
)
461 spin_lock_init(&port
->lock
);
463 dev
->mem_start
= winbase
;
464 dev
->mem_end
= winbase
+ USE_WINDOWSIZE
- 1;
465 dev
->tx_queue_len
= 50;
466 dev
->do_ioctl
= n2_ioctl
;
468 dev
->stop
= n2_close
;
469 hdlc
->attach
= sca_attach
;
470 hdlc
->xmit
= sca_xmit
;
471 port
->settings
.clock_type
= CLOCK_EXT
;
474 if (register_hdlc_device(dev
)) {
475 printk(KERN_WARNING
"n2: unable to register hdlc "
478 n2_destroy_card(card
);
481 sca_init_sync_port(port
); /* Set up SCA memory */
483 printk(KERN_INFO
"%s: RISCom/N2 node %d\n",
484 dev
->name
, port
->phy_node
);
488 new_card
= &card
->next_card
;
495 static int __init
n2_init(void)
499 printk(KERN_INFO
"n2: no card initialized\n");
501 return -EINVAL
; /* no parameters specified, abort */
504 printk(KERN_INFO
"%s\n", version
);
507 unsigned long io
, irq
, ram
;
508 long valid
[2] = { 0, 0 }; /* Default = both ports disabled */
510 io
= simple_strtoul(hw
, &hw
, 0);
514 irq
= simple_strtoul(hw
, &hw
, 0);
518 ram
= simple_strtoul(hw
, &hw
, 0);
523 if (*hw
== '0' && !valid
[0])
524 valid
[0] = 1; /* Port 0 enabled */
525 else if (*hw
== '1' && !valid
[1])
526 valid
[1] = 1; /* Port 1 enabled */
532 if (!valid
[0] && !valid
[1])
533 break; /* at least one port must be used */
535 if (*hw
== ':' || *hw
== '\x0')
536 n2_run(io
, irq
, ram
, valid
[0], valid
[1]);
539 return first_card
? 0 : -EINVAL
;
540 }while(*hw
++ == ':');
542 printk(KERN_ERR
"n2: invalid hardware parameters\n");
543 return first_card
? 0 : -EINVAL
;
547 static void __exit
n2_cleanup(void)
549 card_t
*card
= first_card
;
553 card
= card
->next_card
;
554 n2_destroy_card(ptr
);
559 module_init(n2_init
);
560 module_exit(n2_cleanup
);
562 MODULE_AUTHOR("Krzysztof Halasa <khc@pm.waw.pl>");
563 MODULE_DESCRIPTION("RISCom/N2 serial port driver");
564 MODULE_LICENSE("GPL v2");
565 module_param(hw
, charp
, 0444);
566 MODULE_PARM_DESC(hw
, "io,irq,ram,ports:io,irq,...");