2 /*******************************************************************************
4 * Module Name: hwregs - Read/write access functions for the various ACPI
5 * control and status registers.
7 ******************************************************************************/
10 * Copyright (C) 2000 - 2008, Intel Corp.
11 * All rights reserved.
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
16 * 1. Redistributions of source code must retain the above copyright
17 * notice, this list of conditions, and the following disclaimer,
18 * without modification.
19 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
20 * substantially similar to the "NO WARRANTY" disclaimer below
21 * ("Disclaimer") and any redistribution must be conditioned upon
22 * including a substantially similar Disclaimer requirement for further
23 * binary redistribution.
24 * 3. Neither the names of the above-listed copyright holders nor the names
25 * of any contributors may be used to endorse or promote products derived
26 * from this software without specific prior written permission.
28 * Alternatively, this software may be distributed under the terms of the
29 * GNU General Public License ("GPL") version 2 as published by the Free
30 * Software Foundation.
33 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
34 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
35 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
36 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
37 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
38 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
39 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
40 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
41 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
42 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
43 * POSSIBILITY OF SUCH DAMAGES.
46 #include <acpi/acpi.h>
51 #define _COMPONENT ACPI_HARDWARE
52 ACPI_MODULE_NAME("hwregs")
54 /* Local Prototypes */
56 acpi_hw_read_multiple(u32
*value
,
57 struct acpi_generic_address
*register_a
,
58 struct acpi_generic_address
*register_b
);
61 acpi_hw_write_multiple(u32 value
,
62 struct acpi_generic_address
*register_a
,
63 struct acpi_generic_address
*register_b
);
65 /******************************************************************************
67 * FUNCTION: acpi_hw_validate_register
69 * PARAMETERS: Reg - GAS register structure
70 * max_bit_width - Max bit_width supported (32 or 64)
71 * Address - Pointer to where the gas->address
76 * DESCRIPTION: Validate the contents of a GAS register. Checks the GAS
77 * pointer, Address, space_id, bit_width, and bit_offset.
79 ******************************************************************************/
82 acpi_hw_validate_register(struct acpi_generic_address
*reg
,
83 u8 max_bit_width
, u64
*address
)
86 /* Must have a valid pointer to a GAS structure */
89 return (AE_BAD_PARAMETER
);
93 * Copy the target address. This handles possible alignment issues.
94 * Address must not be null. A null address also indicates an optional
95 * ACPI register that is not supported, so no error message.
97 ACPI_MOVE_64_TO_64(address
, ®
->address
);
99 return (AE_BAD_ADDRESS
);
102 /* Validate the space_iD */
104 if ((reg
->space_id
!= ACPI_ADR_SPACE_SYSTEM_MEMORY
) &&
105 (reg
->space_id
!= ACPI_ADR_SPACE_SYSTEM_IO
)) {
107 "Unsupported address space: 0x%X", reg
->space_id
));
111 /* Validate the bit_width */
113 if ((reg
->bit_width
!= 8) &&
114 (reg
->bit_width
!= 16) &&
115 (reg
->bit_width
!= 32) && (reg
->bit_width
!= max_bit_width
)) {
117 "Unsupported register bit width: 0x%X",
122 /* Validate the bit_offset. Just a warning for now. */
124 if (reg
->bit_offset
!= 0) {
125 ACPI_WARNING((AE_INFO
,
126 "Unsupported register bit offset: 0x%X",
133 /******************************************************************************
135 * FUNCTION: acpi_hw_read
137 * PARAMETERS: Value - Where the value is returned
138 * Reg - GAS register structure
142 * DESCRIPTION: Read from either memory or IO space. This is a 32-bit max
143 * version of acpi_read, used internally since the overhead of
144 * 64-bit values is not needed.
146 * LIMITATIONS: <These limitations also apply to acpi_hw_write>
147 * bit_width must be exactly 8, 16, or 32.
148 * space_iD must be system_memory or system_iO.
149 * bit_offset and access_width are currently ignored, as there has
150 * not been a need to implement these.
152 ******************************************************************************/
154 acpi_status
acpi_hw_read(u32
*value
, struct acpi_generic_address
*reg
)
159 ACPI_FUNCTION_NAME(hw_read
);
161 /* Validate contents of the GAS register */
163 status
= acpi_hw_validate_register(reg
, 32, &address
);
164 if (ACPI_FAILURE(status
)) {
168 /* Initialize entire 32-bit return value to zero */
173 * Two address spaces supported: Memory or IO. PCI_Config is
174 * not supported here because the GAS structure is insufficient
176 if (reg
->space_id
== ACPI_ADR_SPACE_SYSTEM_MEMORY
) {
177 status
= acpi_os_read_memory((acpi_physical_address
)
178 address
, value
, reg
->bit_width
);
179 } else { /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
181 status
= acpi_hw_read_port((acpi_io_address
)
182 address
, value
, reg
->bit_width
);
185 ACPI_DEBUG_PRINT((ACPI_DB_IO
,
186 "Read: %8.8X width %2d from %8.8X%8.8X (%s)\n",
187 *value
, reg
->bit_width
, ACPI_FORMAT_UINT64(address
),
188 acpi_ut_get_region_name(reg
->space_id
)));
193 /******************************************************************************
195 * FUNCTION: acpi_hw_write
197 * PARAMETERS: Value - Value to be written
198 * Reg - GAS register structure
202 * DESCRIPTION: Write to either memory or IO space. This is a 32-bit max
203 * version of acpi_write, used internally since the overhead of
204 * 64-bit values is not needed.
206 ******************************************************************************/
208 acpi_status
acpi_hw_write(u32 value
, struct acpi_generic_address
*reg
)
213 ACPI_FUNCTION_NAME(hw_write
);
215 /* Validate contents of the GAS register */
217 status
= acpi_hw_validate_register(reg
, 32, &address
);
218 if (ACPI_FAILURE(status
)) {
223 * Two address spaces supported: Memory or IO. PCI_Config is
224 * not supported here because the GAS structure is insufficient
226 if (reg
->space_id
== ACPI_ADR_SPACE_SYSTEM_MEMORY
) {
227 status
= acpi_os_write_memory((acpi_physical_address
)
228 address
, value
, reg
->bit_width
);
229 } else { /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
231 status
= acpi_hw_write_port((acpi_io_address
)
232 address
, value
, reg
->bit_width
);
235 ACPI_DEBUG_PRINT((ACPI_DB_IO
,
236 "Wrote: %8.8X width %2d to %8.8X%8.8X (%s)\n",
237 value
, reg
->bit_width
, ACPI_FORMAT_UINT64(address
),
238 acpi_ut_get_region_name(reg
->space_id
)));
243 /*******************************************************************************
245 * FUNCTION: acpi_hw_clear_acpi_status
251 * DESCRIPTION: Clears all fixed and general purpose status bits
253 ******************************************************************************/
255 acpi_status
acpi_hw_clear_acpi_status(void)
258 acpi_cpu_flags lock_flags
= 0;
260 ACPI_FUNCTION_TRACE(hw_clear_acpi_status
);
262 ACPI_DEBUG_PRINT((ACPI_DB_IO
, "About to write %04X to %8.8X%8.8X\n",
263 ACPI_BITMASK_ALL_FIXED_STATUS
,
264 ACPI_FORMAT_UINT64(acpi_gbl_xpm1a_status
.address
)));
266 lock_flags
= acpi_os_acquire_lock(acpi_gbl_hardware_lock
);
268 /* Clear the fixed events in PM1 A/B */
270 status
= acpi_hw_register_write(ACPI_REGISTER_PM1_STATUS
,
271 ACPI_BITMASK_ALL_FIXED_STATUS
);
272 if (ACPI_FAILURE(status
)) {
273 goto unlock_and_exit
;
276 /* Clear the GPE Bits in all GPE registers in all GPE blocks */
278 status
= acpi_ev_walk_gpe_list(acpi_hw_clear_gpe_block
, NULL
);
281 acpi_os_release_lock(acpi_gbl_hardware_lock
, lock_flags
);
282 return_ACPI_STATUS(status
);
285 /*******************************************************************************
287 * FUNCTION: acpi_hw_get_register_bit_mask
289 * PARAMETERS: register_id - Index of ACPI Register to access
291 * RETURN: The bitmask to be used when accessing the register
293 * DESCRIPTION: Map register_id into a register bitmask.
295 ******************************************************************************/
297 struct acpi_bit_register_info
*acpi_hw_get_bit_register_info(u32 register_id
)
299 ACPI_FUNCTION_ENTRY();
301 if (register_id
> ACPI_BITREG_MAX
) {
302 ACPI_ERROR((AE_INFO
, "Invalid BitRegister ID: %X",
307 return (&acpi_gbl_bit_register_info
[register_id
]);
310 /******************************************************************************
312 * FUNCTION: acpi_hw_write_pm1_control
314 * PARAMETERS: pm1a_control - Value to be written to PM1A control
315 * pm1b_control - Value to be written to PM1B control
319 * DESCRIPTION: Write the PM1 A/B control registers. These registers are
320 * different than than the PM1 A/B status and enable registers
321 * in that different values can be written to the A/B registers.
322 * Most notably, the SLP_TYP bits can be different, as per the
323 * values returned from the _Sx predefined methods.
325 ******************************************************************************/
327 acpi_status
acpi_hw_write_pm1_control(u32 pm1a_control
, u32 pm1b_control
)
331 ACPI_FUNCTION_TRACE(hw_write_pm1_control
);
334 acpi_hw_write(pm1a_control
, &acpi_gbl_FADT
.xpm1a_control_block
);
335 if (ACPI_FAILURE(status
)) {
336 return_ACPI_STATUS(status
);
339 if (acpi_gbl_FADT
.xpm1b_control_block
.address
) {
341 acpi_hw_write(pm1b_control
,
342 &acpi_gbl_FADT
.xpm1b_control_block
);
344 return_ACPI_STATUS(status
);
347 /******************************************************************************
349 * FUNCTION: acpi_hw_register_read
351 * PARAMETERS: register_id - ACPI Register ID
352 * return_value - Where the register value is returned
354 * RETURN: Status and the value read.
356 * DESCRIPTION: Read from the specified ACPI register
358 ******************************************************************************/
360 acpi_hw_register_read(u32 register_id
, u32
* return_value
)
365 ACPI_FUNCTION_TRACE(hw_register_read
);
367 switch (register_id
) {
368 case ACPI_REGISTER_PM1_STATUS
: /* PM1 A/B: 16-bit access each */
370 status
= acpi_hw_read_multiple(&value
,
371 &acpi_gbl_xpm1a_status
,
372 &acpi_gbl_xpm1b_status
);
375 case ACPI_REGISTER_PM1_ENABLE
: /* PM1 A/B: 16-bit access each */
377 status
= acpi_hw_read_multiple(&value
,
378 &acpi_gbl_xpm1a_enable
,
379 &acpi_gbl_xpm1b_enable
);
382 case ACPI_REGISTER_PM1_CONTROL
: /* PM1 A/B: 16-bit access each */
384 status
= acpi_hw_read_multiple(&value
,
388 xpm1b_control_block
);
391 * Zero the write-only bits. From the ACPI specification, "Hardware
392 * Write-Only Bits": "Upon reads to registers with write-only bits,
393 * software masks out all write-only bits."
395 value
&= ~ACPI_PM1_CONTROL_WRITEONLY_BITS
;
398 case ACPI_REGISTER_PM2_CONTROL
: /* 8-bit access */
401 acpi_hw_read(&value
, &acpi_gbl_FADT
.xpm2_control_block
);
404 case ACPI_REGISTER_PM_TIMER
: /* 32-bit access */
406 status
= acpi_hw_read(&value
, &acpi_gbl_FADT
.xpm_timer_block
);
409 case ACPI_REGISTER_SMI_COMMAND_BLOCK
: /* 8-bit access */
412 acpi_hw_read_port(acpi_gbl_FADT
.smi_command
, &value
, 8);
416 ACPI_ERROR((AE_INFO
, "Unknown Register ID: %X", register_id
));
417 status
= AE_BAD_PARAMETER
;
421 if (ACPI_SUCCESS(status
)) {
422 *return_value
= value
;
425 return_ACPI_STATUS(status
);
428 /******************************************************************************
430 * FUNCTION: acpi_hw_register_write
432 * PARAMETERS: register_id - ACPI Register ID
433 * Value - The value to write
437 * DESCRIPTION: Write to the specified ACPI register
439 * NOTE: In accordance with the ACPI specification, this function automatically
440 * preserves the value of the following bits, meaning that these bits cannot be
441 * changed via this interface:
443 * PM1_CONTROL[0] = SCI_EN
448 * 1) Hardware Ignored Bits: When software writes to a register with ignored
449 * bit fields, it preserves the ignored bit fields
450 * 2) SCI_EN: OSPM always preserves this bit position
452 ******************************************************************************/
454 acpi_status
acpi_hw_register_write(u32 register_id
, u32 value
)
459 ACPI_FUNCTION_TRACE(hw_register_write
);
461 switch (register_id
) {
462 case ACPI_REGISTER_PM1_STATUS
: /* PM1 A/B: 16-bit access each */
464 * Handle the "ignored" bit in PM1 Status. According to the ACPI
465 * specification, ignored bits are to be preserved when writing.
466 * Normally, this would mean a read/modify/write sequence. However,
467 * preserving a bit in the status register is different. Writing a
468 * one clears the status, and writing a zero preserves the status.
469 * Therefore, we must always write zero to the ignored bit.
471 * This behavior is clarified in the ACPI 4.0 specification.
473 value
&= ~ACPI_PM1_STATUS_PRESERVED_BITS
;
475 status
= acpi_hw_write_multiple(value
,
476 &acpi_gbl_xpm1a_status
,
477 &acpi_gbl_xpm1b_status
);
480 case ACPI_REGISTER_PM1_ENABLE
: /* PM1 A/B: 16-bit access */
482 status
= acpi_hw_write_multiple(value
,
483 &acpi_gbl_xpm1a_enable
,
484 &acpi_gbl_xpm1b_enable
);
487 case ACPI_REGISTER_PM1_CONTROL
: /* PM1 A/B: 16-bit access each */
490 * Perform a read first to preserve certain bits (per ACPI spec)
491 * Note: This includes SCI_EN, we never want to change this bit
493 status
= acpi_hw_read_multiple(&read_value
,
497 xpm1b_control_block
);
498 if (ACPI_FAILURE(status
)) {
502 /* Insert the bits to be preserved */
504 ACPI_INSERT_BITS(value
, ACPI_PM1_CONTROL_PRESERVED_BITS
,
507 /* Now we can write the data */
509 status
= acpi_hw_write_multiple(value
,
513 xpm1b_control_block
);
516 case ACPI_REGISTER_PM2_CONTROL
: /* 8-bit access */
519 * For control registers, all reserved bits must be preserved,
520 * as per the ACPI spec.
523 acpi_hw_read(&read_value
,
524 &acpi_gbl_FADT
.xpm2_control_block
);
525 if (ACPI_FAILURE(status
)) {
529 /* Insert the bits to be preserved */
531 ACPI_INSERT_BITS(value
, ACPI_PM2_CONTROL_PRESERVED_BITS
,
535 acpi_hw_write(value
, &acpi_gbl_FADT
.xpm2_control_block
);
538 case ACPI_REGISTER_PM_TIMER
: /* 32-bit access */
540 status
= acpi_hw_write(value
, &acpi_gbl_FADT
.xpm_timer_block
);
543 case ACPI_REGISTER_SMI_COMMAND_BLOCK
: /* 8-bit access */
545 /* SMI_CMD is currently always in IO space */
548 acpi_hw_write_port(acpi_gbl_FADT
.smi_command
, value
, 8);
552 ACPI_ERROR((AE_INFO
, "Unknown Register ID: %X", register_id
));
553 status
= AE_BAD_PARAMETER
;
558 return_ACPI_STATUS(status
);
561 /******************************************************************************
563 * FUNCTION: acpi_hw_read_multiple
565 * PARAMETERS: Value - Where the register value is returned
566 * register_a - First ACPI register (required)
567 * register_b - Second ACPI register (optional)
571 * DESCRIPTION: Read from the specified two-part ACPI register (such as PM1 A/B)
573 ******************************************************************************/
576 acpi_hw_read_multiple(u32
*value
,
577 struct acpi_generic_address
*register_a
,
578 struct acpi_generic_address
*register_b
)
584 /* The first register is always required */
586 status
= acpi_hw_read(&value_a
, register_a
);
587 if (ACPI_FAILURE(status
)) {
591 /* Second register is optional */
593 if (register_b
->address
) {
594 status
= acpi_hw_read(&value_b
, register_b
);
595 if (ACPI_FAILURE(status
)) {
601 * OR the two return values together. No shifting or masking is necessary,
602 * because of how the PM1 registers are defined in the ACPI specification:
604 * "Although the bits can be split between the two register blocks (each
605 * register block has a unique pointer within the FADT), the bit positions
606 * are maintained. The register block with unimplemented bits (that is,
607 * those implemented in the other register block) always returns zeros,
608 * and writes have no side effects"
610 *value
= (value_a
| value_b
);
614 /******************************************************************************
616 * FUNCTION: acpi_hw_write_multiple
618 * PARAMETERS: Value - The value to write
619 * register_a - First ACPI register (required)
620 * register_b - Second ACPI register (optional)
624 * DESCRIPTION: Write to the specified two-part ACPI register (such as PM1 A/B)
626 ******************************************************************************/
629 acpi_hw_write_multiple(u32 value
,
630 struct acpi_generic_address
*register_a
,
631 struct acpi_generic_address
*register_b
)
635 /* The first register is always required */
637 status
= acpi_hw_write(value
, register_a
);
638 if (ACPI_FAILURE(status
)) {
643 * Second register is optional
645 * No bit shifting or clearing is necessary, because of how the PM1
646 * registers are defined in the ACPI specification:
648 * "Although the bits can be split between the two register blocks (each
649 * register block has a unique pointer within the FADT), the bit positions
650 * are maintained. The register block with unimplemented bits (that is,
651 * those implemented in the other register block) always returns zeros,
652 * and writes have no side effects"
654 if (register_b
->address
) {
655 status
= acpi_hw_write(value
, register_b
);