1 # SPDX-License-Identifier: GPL-2.0-only
3 # DMA engine configuration
7 bool "DMA Engine support"
10 DMA engines can do asynchronous data transfers without
11 involving the host CPU. Currently, this framework can be
12 used to offload memory copies in the network stack and
13 RAID operations in the MD driver. This menu only presents
14 DMA Device drivers supported by the configured arch, it may
15 be empty in some cases.
17 config DMADEVICES_DEBUG
18 bool "DMA Engine debugging"
19 depends on DMADEVICES != n
21 This is an option for use by developers; most people should
22 say N here. This enables DMA engine core and driver debugging.
24 config DMADEVICES_VDEBUG
25 bool "DMA Engine verbose debugging"
26 depends on DMADEVICES_DEBUG != n
28 This is an option for use by developers; most people should
29 say N here. This enables deeper (more verbose) debugging of
30 the DMA engine core and drivers.
38 config ASYNC_TX_ENABLE_CHANNEL_SWITCH
41 config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
47 config DMA_VIRTUAL_CHANNELS
61 tristate "Altera / Intel mSGDMA Engine"
64 Enable support for Altera / Intel mSGDMA controller.
67 bool "ARM PrimeCell PL080 or PL081 support"
70 select DMA_VIRTUAL_CHANNELS
72 Say yes if your platform has a PL08x DMAC device which can
73 provide DMA engine support. This includes the original ARM
74 PL080 and PL081, Samsungs PL080 derivative and Faraday
75 Technology's FTDMAC020 PL080 derivative.
77 config AMCC_PPC440SPE_ADMA
78 tristate "AMCC PPC440SPe ADMA support"
79 depends on 440SPe || 440SP
81 select DMA_ENGINE_RAID
82 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
83 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
85 Enable support for the AMCC PPC440SPe RAID engines.
88 tristate "Atmel AHB DMA support"
92 Support the Atmel AHB DMA controller.
95 tristate "Atmel XDMA support"
99 Support the Atmel XDMA controller.
102 tristate "Analog Devices AXI-DMAC DMA support"
103 depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_SOCFPGA || COMPILE_TEST
105 select DMA_VIRTUAL_CHANNELS
107 Enable support for the Analog Devices AXI-DMAC peripheral. This DMA
108 controller is often used in Analog Device's reference designs for FPGA
112 tristate "Broadcom SBA RAID engine support"
113 depends on ARM64 || COMPILE_TEST
114 depends on MAILBOX && RAID6_PQ
116 select DMA_ENGINE_RAID
117 select ASYNC_TX_DISABLE_XOR_VAL_DMA
118 select ASYNC_TX_DISABLE_PQ_VAL_DMA
119 default m if ARCH_BCM_IPROC
121 Enable support for Broadcom SBA RAID Engine. The SBA RAID
122 engine is available on most of the Broadcom iProc SoCs. It
123 has the capability to offload memcpy, xor and pq computation
127 bool "ST-Ericsson COH901318 DMA support"
129 depends on ARCH_U300 || COMPILE_TEST
131 Enable support for ST-Ericsson COH 901 318 DMA.
134 tristate "BCM2835 DMA engine support"
135 depends on ARCH_BCM2835
137 select DMA_VIRTUAL_CHANNELS
140 tristate "JZ4740 DMA support"
141 depends on MACH_JZ4740 || COMPILE_TEST
143 select DMA_VIRTUAL_CHANNELS
146 tristate "JZ4780 DMA support"
147 depends on MIPS || COMPILE_TEST
149 select DMA_VIRTUAL_CHANNELS
151 This selects support for the DMA controller in Ingenic JZ4780 SoCs.
152 If you have a board based on such a SoC and wish to use DMA for
153 devices which can use the DMA controller, say Y or M here.
156 tristate "SA-11x0 DMA support"
157 depends on ARCH_SA1100 || COMPILE_TEST
159 select DMA_VIRTUAL_CHANNELS
161 Support the DMA engine found on Intel StrongARM SA-1100 and
162 SA-1110 SoCs. This DMA engine can only be used with on-chip
166 tristate "Allwinner A10 DMA SoCs support"
167 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
168 default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I)
170 select DMA_VIRTUAL_CHANNELS
172 Enable support for the DMA controller present in the sun4i,
173 sun5i and sun7i Allwinner ARM SoCs.
176 tristate "Allwinner A31 SoCs DMA support"
177 depends on MACH_SUN6I || MACH_SUN8I || (ARM64 && ARCH_SUNXI) || COMPILE_TEST
178 depends on RESET_CONTROLLER
180 select DMA_VIRTUAL_CHANNELS
182 Support for the DMA engine first found in Allwinner A31 SoCs.
185 tristate "Synopsys DesignWare AXI DMA support"
186 depends on OF || COMPILE_TEST
188 select DMA_VIRTUAL_CHANNELS
190 Enable support for Synopsys DesignWare AXI DMA controller.
191 NOTE: This driver wasn't tested on 64 bit platform because
192 of lack 64 bit platform with Synopsys DW AXI DMAC.
195 bool "Cirrus Logic EP93xx DMA support"
196 depends on ARCH_EP93XX || COMPILE_TEST
199 Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
202 tristate "Freescale Elo series DMA support"
205 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
207 Enable support for the Freescale Elo series DMA controllers.
208 The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the
209 EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on
210 some Txxx and Bxxx parts.
213 tristate "Freescale eDMA engine support"
216 select DMA_VIRTUAL_CHANNELS
218 Support the Freescale eDMA engine with programmable channel
219 multiplexing capability for DMA request sources(slot).
220 This module can be found on Freescale Vybrid and LS-1 SoCs.
223 tristate "NXP Layerscape qDMA engine support"
224 depends on ARM || ARM64
226 select DMA_VIRTUAL_CHANNELS
227 select DMA_ENGINE_RAID
228 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
230 Support the NXP Layerscape qDMA engine with command queue and legacy mode.
231 Channel virtualization is supported through enqueuing of DMA jobs to,
232 or dequeuing DMA jobs from, different work queues.
233 This module can be found on NXP Layerscape SoCs.
234 The qdma driver only work on SoCs with a DPAA hardware block.
237 tristate "Freescale RAID engine Support"
238 depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH
240 select DMA_ENGINE_RAID
242 Enable support for Freescale RAID Engine. RAID Engine is
243 available on some QorIQ SoCs (like P5020/P5040). It has
244 the capability to offload memcpy, xor and pq computation
248 tristate "IMG MDC support"
249 depends on MIPS || COMPILE_TEST
250 depends on MFD_SYSCON
252 select DMA_VIRTUAL_CHANNELS
254 Enable support for the IMG multi-threaded DMA controller (MDC).
257 tristate "i.MX DMA support"
261 Support the i.MX DMA engine. This engine is integrated into
262 Freescale i.MX1/21/27 chips.
265 tristate "i.MX SDMA support"
268 select DMA_VIRTUAL_CHANNELS
270 Support the i.MX SDMA engine. This engine is integrated into
271 Freescale i.MX25/31/35/51/53/6 chips.
274 tristate "Intel integrated DMA 64-bit support"
276 select DMA_VIRTUAL_CHANNELS
278 Enable DMA support for Intel Low Power Subsystem such as found on
282 tristate "Intel I/OAT DMA support"
283 depends on PCI && X86_64
285 select DMA_ENGINE_RAID
288 Enable support for the Intel(R) I/OAT DMA engine present
289 in recent Intel Xeon chipsets.
291 Say Y here if you have such a chipset.
295 config INTEL_IOP_ADMA
296 tristate "Intel IOP ADMA support"
297 depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
299 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
301 Enable support for the Intel(R) IOP Series RAID engines.
303 config INTEL_MIC_X100_DMA
304 tristate "Intel MIC X100 DMA Driver"
305 depends on 64BIT && X86 && INTEL_MIC_BUS
308 This enables DMA support for the Intel Many Integrated Core
309 (MIC) family of PCIe form factor coprocessor X100 devices that
310 run a 64 bit Linux OS. This driver will be used by both MIC
311 host and card drivers.
313 If you are building host kernel with a MIC device or a card
314 kernel for a MIC device, then say M (recommended) or Y, else
315 say N. If unsure say N.
317 More information about the Intel MIC family as well as the Linux
318 OS and tools for MIC to use with this driver are available from
319 <http://software.intel.com/en-us/mic-developer>.
322 tristate "Hisilicon K3 DMA support"
323 depends on ARCH_HI3xxx || ARCH_HISI || COMPILE_TEST
325 select DMA_VIRTUAL_CHANNELS
327 Support the DMA engine for Hisilicon K3 platform
330 config LPC18XX_DMAMUX
331 bool "NXP LPC18xx/43xx DMA MUX for PL080"
332 depends on ARCH_LPC18XX || COMPILE_TEST
333 depends on OF && AMBA_PL08X
336 Enable support for DMA on NXP LPC18xx/43xx platforms
337 with PL080 and multiplexed DMA request lines.
340 tristate "Freescale eDMA engine support, ColdFire mcf5441x SoCs"
341 depends on M5441x || COMPILE_TEST
343 select DMA_VIRTUAL_CHANNELS
345 Support the Freescale ColdFire eDMA engine, 64-channel
346 implementation that performs complex data transfers with
347 minimal intervention from a host processor.
348 This module can be found on Freescale ColdFire mcf5441x SoCs.
351 bool "MMP PDMA support"
352 depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST
355 Support the MMP PDMA engine for PXA and MMP platform.
358 bool "MMP Two-Channel DMA support"
359 depends on ARCH_MMP || COMPILE_TEST
361 select MMP_SRAM if ARCH_MMP
362 select GENERIC_ALLOCATOR
364 Support the MMP Two-Channel DMA engine.
365 This engine used for MMP Audio DMA and pxa910 SQU.
366 It needs sram driver under mach-mmp.
369 tristate "MOXART DMA support"
370 depends on ARCH_MOXART
372 select DMA_VIRTUAL_CHANNELS
374 Enable support for the MOXA ART SoC DMA controller.
376 Say Y here if you enabled MMP ADMA, otherwise say N.
379 tristate "Freescale MPC512x built-in DMA engine support"
380 depends on PPC_MPC512x || PPC_MPC831x
383 Enable support for the Freescale MPC512x built-in DMA engine.
386 bool "Marvell XOR engine support"
387 depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST
389 select DMA_ENGINE_RAID
390 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
392 Enable support for the Marvell XOR engine.
395 bool "Marvell XOR engine version 2 support "
398 select DMA_ENGINE_RAID
399 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
400 select GENERIC_MSI_IRQ_DOMAIN
402 Enable support for the Marvell version 2 XOR engine.
404 This engine provides acceleration for copy, XOR and RAID6
405 operations, and is available on Marvell Armada 7K and 8K
409 bool "MXS DMA support"
410 depends on ARCH_MXS || ARCH_MXC || COMPILE_TEST
414 Support the MXS DMA engine. This engine including APBH-DMA
415 and APBX-DMA is integrated into some Freescale chips.
418 bool "MX3x Image Processing Unit support"
423 If you plan to use the Image Processing unit in the i.MX3x, say
424 Y here. If unsure, select Y.
427 int "Number of dynamically mapped interrupts for IPU"
432 Out of 137 interrupt sources on i.MX31 IPU only very few are used.
433 To avoid bloating the irq_desc[] array we allocate a sufficient
434 number of IRQ slots and map them dynamically to specific sources.
437 tristate "Renesas Type-AXI NBPF DMA support"
439 depends on ARM || COMPILE_TEST
441 Support for "Type-AXI" NBPF DMA IPs from Renesas
444 tristate "Actions Semi Owl SoCs DMA support"
445 depends on ARCH_ACTIONS
447 select DMA_VIRTUAL_CHANNELS
449 Enable support for the Actions Semi Owl SoCs DMA controller.
452 tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
453 depends on PCI && (X86_32 || COMPILE_TEST)
456 Enable support for Intel EG20T PCH DMA engine.
458 This driver also can be used for LAPIS Semiconductor IOH(Input/
459 Output Hub), ML7213, ML7223 and ML7831.
460 ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
461 for MP(Media Phone) use and ML7831 IOH is for general purpose use.
462 ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
463 ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
466 tristate "DMA API Driver for PL330"
470 Select if your platform has one or more PL330 DMACs.
471 You need to provide platform specific settings via
472 platform_data for a dma-pl330 device.
475 bool "PXA DMA support"
476 depends on (ARCH_MMP || ARCH_PXA)
478 select DMA_VIRTUAL_CHANNELS
480 Support the DMA engine for PXA. It is also compatible with MMP PDMA
481 platform. The internal DMA IP of all PXA variants is supported, with
482 16 to 32 channels for peripheral to memory or memory to memory
486 tristate "CSR SiRFprimaII/SiRFmarco DMA support"
490 Enable support for the CSR SiRFprimaII DMA engine.
493 bool "ST-Ericsson DMA40 support"
494 depends on ARCH_U8500
497 Support for ST-Ericsson DMA40 controller
500 tristate "ST FDMA dmaengine support"
502 depends on REMOTEPROC
503 select ST_SLIM_REMOTEPROC
505 select DMA_VIRTUAL_CHANNELS
507 Enable support for ST FDMA controller.
508 It supports 16 independent DMA channels, accepts up to 32 DMA requests
510 Say Y here if you have such a chipset.
514 bool "STMicroelectronics STM32 DMA support"
515 depends on ARCH_STM32 || COMPILE_TEST
517 select DMA_VIRTUAL_CHANNELS
519 Enable support for the on-chip DMA controller on STMicroelectronics
521 If you have a board based on such a MCU and wish to use DMA say Y
525 bool "STMicroelectronics STM32 dma multiplexer support"
526 depends on STM32_DMA || COMPILE_TEST
528 Enable support for the on-chip DMA multiplexer on STMicroelectronics
530 If you have a board based on such a MCU and wish to use DMAMUX say Y
534 bool "STMicroelectronics STM32 master dma support"
535 depends on ARCH_STM32 || COMPILE_TEST
538 select DMA_VIRTUAL_CHANNELS
540 Enable support for the on-chip MDMA controller on STMicroelectronics
542 If you have a board based on STM32 SoC and wish to use the master DMA
546 tristate "Spreadtrum DMA support"
547 depends on ARCH_SPRD || COMPILE_TEST
549 select DMA_VIRTUAL_CHANNELS
551 Enable support for the on-chip DMA controller on Spreadtrum platform.
554 bool "Samsung S3C24XX DMA support"
555 depends on ARCH_S3C24XX || COMPILE_TEST
557 select DMA_VIRTUAL_CHANNELS
559 Support for the Samsung S3C24XX DMA controller driver. The
560 DMA controller is having multiple DMA channels which can be
561 configured for different peripherals like audio, UART, SPI.
562 The DMA controller can transfer data from memory to peripheral,
563 periphal to memory, periphal to periphal and memory to memory.
566 tristate "Toshiba TXx9 SoC DMA support"
567 depends on MACH_TX49XX || MACH_TX39XX
570 Support the TXx9 SoC internal DMA controller. This can be
571 integrated in chips such as the Toshiba TX4927/38/39.
573 config TEGRA20_APB_DMA
574 bool "NVIDIA Tegra20 APB DMA support"
575 depends on ARCH_TEGRA
578 Support for the NVIDIA Tegra20 APB DMA controller driver. The
579 DMA controller is having multiple DMA channel which can be
580 configured for different peripherals like audio, UART, SPI,
581 I2C etc which is in APB bus.
582 This DMA controller transfers data from memory to peripheral fifo
583 or vice versa. It does not support memory to memory data transfer.
586 tristate "NVIDIA Tegra210 ADMA support"
587 depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST) && PM_CLK
589 select DMA_VIRTUAL_CHANNELS
591 Support for the NVIDIA Tegra210 ADMA controller driver. The
592 DMA controller has multiple DMA channels and is used to service
593 various audio clients in the Tegra210 audio processing engine
594 (APE). This DMA controller transfers data from memory to
595 peripheral and vice versa. It does not support memory to
596 memory data transfer.
599 tristate "Timberdale FPGA DMA support"
600 depends on MFD_TIMBERDALE || COMPILE_TEST
603 Enable support for the Timberdale FPGA DMA engine.
605 config UNIPHIER_MDMAC
606 tristate "UniPhier MIO DMAC"
607 depends on ARCH_UNIPHIER || COMPILE_TEST
610 select DMA_VIRTUAL_CHANNELS
612 Enable support for the MIO DMAC (Media I/O DMA controller) on the
613 UniPhier platform. This DMA controller is used as the external
614 DMA engine of the SD/eMMC controllers of the LD4, Pro4, sLD8 SoCs.
617 tristate "APM X-Gene DMA support"
618 depends on ARCH_XGENE || COMPILE_TEST
620 select DMA_ENGINE_RAID
621 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
623 Enable support for the APM X-Gene SoC DMA engine.
626 tristate "Xilinx AXI DMAS Engine"
627 depends on (ARCH_ZYNQ || MICROBLAZE || ARM64)
630 Enable support for Xilinx AXI VDMA Soft IP.
632 AXI VDMA engine provides high-bandwidth direct memory access
633 between memory and AXI4-Stream video type target
634 peripherals including peripherals which support AXI4-
635 Stream Video Protocol. It has two stream interfaces/
636 channels, Memory Mapped to Stream (MM2S) and Stream to
637 Memory Mapped (S2MM) for the data transfers.
638 AXI CDMA engine provides high-bandwidth direct memory access
639 between a memory-mapped source address and a memory-mapped
641 AXI DMA engine provides high-bandwidth one dimensional direct
642 memory access between memory and AXI4-Stream target peripherals.
644 config XILINX_ZYNQMP_DMA
645 tristate "Xilinx ZynqMP DMA Engine"
646 depends on (ARCH_ZYNQ || MICROBLAZE || ARM64)
649 Enable support for Xilinx ZynqMP DMA controller.
652 tristate "ZTE ZX DMA support"
653 depends on ARCH_ZX || COMPILE_TEST
655 select DMA_VIRTUAL_CHANNELS
657 Support the DMA engine for ZTE ZX family platform devices.
661 source "drivers/dma/bestcomm/Kconfig"
663 source "drivers/dma/mediatek/Kconfig"
665 source "drivers/dma/qcom/Kconfig"
667 source "drivers/dma/dw/Kconfig"
669 source "drivers/dma/hsu/Kconfig"
671 source "drivers/dma/sh/Kconfig"
673 source "drivers/dma/ti/Kconfig"
676 comment "DMA Clients"
677 depends on DMA_ENGINE
680 bool "Async_tx: Offload support for the async_tx api"
681 depends on DMA_ENGINE
683 This allows the async_tx api to take advantage of offload engines for
684 memcpy, memset, xor, and raid6 p+q operations. If your platform has
685 a dma engine that can perform raid operations and you have enabled
691 tristate "DMA Test client"
692 depends on DMA_ENGINE
693 select DMA_ENGINE_RAID
695 Simple DMA test client. Say N unless you're debugging a
698 config DMA_ENGINE_RAID