arch/arm/mach-imx/mach-mx21ads.c

   1 /*
   2  *  Copyright (C) 2000 Deep Blue Solutions Ltd
   3  *  Copyright (C) 2002 Shane Nay (shane@minirl.com)
   4  *  Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #include <linux/platform_device.h>
  18 #include <linux/mtd/mtd.h>
  19 #include <linux/mtd/physmap.h>
  20 #include <linux/gpio/driver.h>
  21 #include <linux/gpio/machine.h>
  22 #include <linux/gpio.h>
  23 #include <linux/regulator/fixed.h>
  24 #include <linux/regulator/machine.h>
  25 #include <asm/mach-types.h>
  26 #include <asm/mach/arch.h>
  27
  28 #include "common.h"
  29 #include "devices-imx21.h"
  30 #include "hardware.h"
  31 #include "iomux-mx21.h"
  32
  33 #define MX21ADS_CS8900A_REG             (MX21_CS1_BASE_ADDR + 0x000000)
  34 #define MX21ADS_ST16C255_IOBASE_REG     (MX21_CS1_BASE_ADDR + 0x200000)
  35 #define MX21ADS_VERSION_REG             (MX21_CS1_BASE_ADDR + 0x400000)
  36 #define MX21ADS_IO_REG                  (MX21_CS1_BASE_ADDR + 0x800000)
  37
  38 #define MX21ADS_MMC_CD                  IMX_GPIO_NR(4, 25)
  39 #define MX21ADS_CS8900A_IRQ_GPIO        IMX_GPIO_NR(5, 11)
  40 #define MX21ADS_MMGPIO_BASE             (6 * 32)
  41
  42 /* MX21ADS_IO_REG bit definitions */
  43 #define MX21ADS_IO_SD_WP                (MX21ADS_MMGPIO_BASE + 0)
  44 #define MX21ADS_IO_TP6                  (MX21ADS_IO_SD_WP)
  45 #define MX21ADS_IO_SW_SEL               (MX21ADS_MMGPIO_BASE + 1)
  46 #define MX21ADS_IO_TP7                  (MX21ADS_IO_SW_SEL)
  47 #define MX21ADS_IO_RESET_E_UART         (MX21ADS_MMGPIO_BASE + 2)
  48 #define MX21ADS_IO_RESET_BASE           (MX21ADS_MMGPIO_BASE + 3)
  49 #define MX21ADS_IO_CSI_CTL2             (MX21ADS_MMGPIO_BASE + 4)
  50 #define MX21ADS_IO_CSI_CTL1             (MX21ADS_MMGPIO_BASE + 5)
  51 #define MX21ADS_IO_CSI_CTL0             (MX21ADS_MMGPIO_BASE + 6)
  52 #define MX21ADS_IO_UART1_EN             (MX21ADS_MMGPIO_BASE + 7)
  53 #define MX21ADS_IO_UART4_EN             (MX21ADS_MMGPIO_BASE + 8)
  54 #define MX21ADS_IO_LCDON                (MX21ADS_MMGPIO_BASE + 9)
  55 #define MX21ADS_IO_IRDA_EN              (MX21ADS_MMGPIO_BASE + 10)
  56 #define MX21ADS_IO_IRDA_FIR_SEL         (MX21ADS_MMGPIO_BASE + 11)
  57 #define MX21ADS_IO_IRDA_MD0_B           (MX21ADS_MMGPIO_BASE + 12)
  58 #define MX21ADS_IO_IRDA_MD1             (MX21ADS_MMGPIO_BASE + 13)
  59 #define MX21ADS_IO_LED4_ON              (MX21ADS_MMGPIO_BASE + 14)
  60 #define MX21ADS_IO_LED3_ON              (MX21ADS_MMGPIO_BASE + 15)
  61
  62 static const int mx21ads_pins[] __initconst = {
  63
  64         /* CS8900A */
  65         (GPIO_PORTE | GPIO_GPIO | GPIO_IN | 11),
  66
  67         /* UART1 */
  68         PE12_PF_UART1_TXD,
  69         PE13_PF_UART1_RXD,
  70         PE14_PF_UART1_CTS,
  71         PE15_PF_UART1_RTS,
  72
  73         /* UART3 (IrDA) - only TXD and RXD */
  74         PE8_PF_UART3_TXD,
  75         PE9_PF_UART3_RXD,
  76
  77         /* UART4 */
  78         PB26_AF_UART4_RTS,
  79         PB28_AF_UART4_TXD,
  80         PB29_AF_UART4_CTS,
  81         PB31_AF_UART4_RXD,
  82
  83         /* LCDC */
  84         PA5_PF_LSCLK,
  85         PA6_PF_LD0,
  86         PA7_PF_LD1,
  87         PA8_PF_LD2,
  88         PA9_PF_LD3,
  89         PA10_PF_LD4,
  90         PA11_PF_LD5,
  91         PA12_PF_LD6,
  92         PA13_PF_LD7,
  93         PA14_PF_LD8,
  94         PA15_PF_LD9,
  95         PA16_PF_LD10,
  96         PA17_PF_LD11,
  97         PA18_PF_LD12,
  98         PA19_PF_LD13,
  99         PA20_PF_LD14,
 100         PA21_PF_LD15,
 101         PA22_PF_LD16,
 102         PA24_PF_REV,     /* Sharp panel dedicated signal */
 103         PA25_PF_CLS,     /* Sharp panel dedicated signal */
 104         PA26_PF_PS,      /* Sharp panel dedicated signal */
 105         PA27_PF_SPL_SPR, /* Sharp panel dedicated signal */
 106         PA28_PF_HSYNC,
 107         PA29_PF_VSYNC,
 108         PA30_PF_CONTRAST,
 109         PA31_PF_OE_ACD,
 110
 111         /* MMC/SDHC */
 112         PE18_PF_SD1_D0,
 113         PE19_PF_SD1_D1,
 114         PE20_PF_SD1_D2,
 115         PE21_PF_SD1_D3,
 116         PE22_PF_SD1_CMD,
 117         PE23_PF_SD1_CLK,
 118
 119         /* NFC */
 120         PF0_PF_NRFB,
 121         PF1_PF_NFCE,
 122         PF2_PF_NFWP,
 123         PF3_PF_NFCLE,
 124         PF4_PF_NFALE,
 125         PF5_PF_NFRE,
 126         PF6_PF_NFWE,
 127         PF7_PF_NFIO0,
 128         PF8_PF_NFIO1,
 129         PF9_PF_NFIO2,
 130         PF10_PF_NFIO3,
 131         PF11_PF_NFIO4,
 132         PF12_PF_NFIO5,
 133         PF13_PF_NFIO6,
 134         PF14_PF_NFIO7,
 135 };
 136
 137 /* ADS's NOR flash: 2x AM29BDS128HE9VKI on 32-bit bus */
 138 static struct physmap_flash_data mx21ads_flash_data = {
 139         .width = 4,
 140 };
 141
 142 static struct resource mx21ads_flash_resource =
 143         DEFINE_RES_MEM(MX21_CS0_BASE_ADDR, SZ_32M);
 144
 145 static struct platform_device mx21ads_nor_mtd_device = {
 146         .name = "physmap-flash",
 147         .id = 0,
 148         .dev = {
 149                 .platform_data = &mx21ads_flash_data,
 150         },
 151         .num_resources = 1,
 152         .resource = &mx21ads_flash_resource,
 153 };
 154
 155 static struct resource mx21ads_cs8900_resources[] __initdata = {
 156         DEFINE_RES_MEM(MX21ADS_CS8900A_REG, SZ_1K),
 157         /* irq number is run-time assigned */
 158         DEFINE_RES_IRQ(-1),
 159 };
 160
 161 static const struct platform_device_info mx21ads_cs8900_devinfo __initconst = {
 162         .name = "cs89x0",
 163         .id = 0,
 164         .res = mx21ads_cs8900_resources,
 165         .num_res = ARRAY_SIZE(mx21ads_cs8900_resources),
 166 };
 167
 168 static const struct imxuart_platform_data uart_pdata_rts __initconst = {
 169         .flags = IMXUART_HAVE_RTSCTS,
 170 };
 171
 172 static const struct imxuart_platform_data uart_pdata_norts __initconst = {
 173 };
 174
 175 static struct resource mx21ads_mmgpio_resource =
 176         DEFINE_RES_MEM_NAMED(MX21ADS_IO_REG, SZ_2, "dat");
 177
 178 static struct bgpio_pdata mx21ads_mmgpio_pdata = {
 179         .label  = "mx21ads-mmgpio",
 180         .base   = MX21ADS_MMGPIO_BASE,
 181         .ngpio  = 16,
 182 };
 183
 184 static struct platform_device mx21ads_mmgpio = {
 185         .name = "basic-mmio-gpio",
 186         .id = PLATFORM_DEVID_AUTO,
 187         .resource = &mx21ads_mmgpio_resource,
 188         .num_resources = 1,
 189         .dev = {
 190                 .platform_data = &mx21ads_mmgpio_pdata,
 191         },
 192 };
 193
 194 static struct regulator_consumer_supply mx21ads_lcd_regulator_consumer =
 195         REGULATOR_SUPPLY("lcd", "imx-fb.0");
 196
 197 static struct regulator_init_data mx21ads_lcd_regulator_init_data = {
 198         .constraints = {
 199                 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
 200         },
 201         .consumer_supplies      = &mx21ads_lcd_regulator_consumer,
 202         .num_consumer_supplies  = 1,
 203 };
 204
 205 static struct fixed_voltage_config mx21ads_lcd_regulator_pdata = {
 206         .supply_name    = "LCD",
 207         .microvolts     = 3300000,
 208         .init_data      = &mx21ads_lcd_regulator_init_data,
 209 };
 210
 211 static struct platform_device mx21ads_lcd_regulator = {
 212         .name = "reg-fixed-voltage",
 213         .id = PLATFORM_DEVID_AUTO,
 214         .dev = {
 215                 .platform_data = &mx21ads_lcd_regulator_pdata,
 216         },
 217 };
 218
 219 static struct gpiod_lookup_table mx21ads_lcd_regulator_gpiod_table = {
 220         .dev_id = "reg-fixed-voltage.0", /* Let's hope ID 0 is what we get */
 221         .table = {
 222                 GPIO_LOOKUP("mx21ads-mmgpio", 9, NULL, GPIO_ACTIVE_HIGH),
 223                 { },
 224         },
 225 };
 226
 227 /*
 228  * Connected is a portrait Sharp-QVGA display
 229  * of type: LQ035Q7DB02
 230  */
 231 static struct imx_fb_videomode mx21ads_modes[] = {
 232         {
 233                 .mode = {
 234                         .name           = "Sharp-LQ035Q7",
 235                         .refresh        = 60,
 236                         .xres           = 240,
 237                         .yres           = 320,
 238                         .pixclock       = 188679, /* in ps (5.3MHz) */
 239                         .hsync_len      = 2,
 240                         .left_margin    = 6,
 241                         .right_margin   = 16,
 242                         .vsync_len      = 1,
 243                         .upper_margin   = 8,
 244                         .lower_margin   = 10,
 245                 },
 246                 .pcr            = 0xfb108bc7,
 247                 .bpp            = 16,
 248         },
 249 };
 250
 251 static const struct imx_fb_platform_data mx21ads_fb_data __initconst = {
 252         .mode = mx21ads_modes,
 253         .num_modes = ARRAY_SIZE(mx21ads_modes),
 254
 255         .pwmr           = 0x00a903ff,
 256         .lscr1          = 0x00120300,
 257         .dmacr          = 0x00020008,
 258 };
 259
 260 static int mx21ads_sdhc_get_ro(struct device *dev)
 261 {
 262         return gpio_get_value(MX21ADS_IO_SD_WP);
 263 }
 264
 265 static int mx21ads_sdhc_init(struct device *dev, irq_handler_t detect_irq,
 266         void *data)
 267 {
 268         int ret;
 269
 270         ret = gpio_request(MX21ADS_IO_SD_WP, "mmc-ro");
 271         if (ret)
 272                 return ret;
 273
 274         return request_irq(gpio_to_irq(MX21ADS_MMC_CD), detect_irq,
 275                            IRQF_TRIGGER_FALLING, "mmc-detect", data);
 276 }
 277
 278 static void mx21ads_sdhc_exit(struct device *dev, void *data)
 279 {
 280         free_irq(gpio_to_irq(MX21ADS_MMC_CD), data);
 281         gpio_free(MX21ADS_IO_SD_WP);
 282 }
 283
 284 static const struct imxmmc_platform_data mx21ads_sdhc_pdata __initconst = {
 285         .ocr_avail = MMC_VDD_29_30 | MMC_VDD_30_31, /* 3.0V */
 286         .get_ro = mx21ads_sdhc_get_ro,
 287         .init = mx21ads_sdhc_init,
 288         .exit = mx21ads_sdhc_exit,
 289 };
 290
 291 static const struct mxc_nand_platform_data
 292 mx21ads_nand_board_info __initconst = {
 293         .width = 1,
 294         .hw_ecc = 1,
 295 };
 296
 297 static struct platform_device *platform_devices[] __initdata = {
 298         &mx21ads_mmgpio,
 299         &mx21ads_lcd_regulator,
 300         &mx21ads_nor_mtd_device,
 301 };
 302
 303 static void __init mx21ads_board_init(void)
 304 {
 305         imx21_soc_init();
 306
 307         mxc_gpio_setup_multiple_pins(mx21ads_pins, ARRAY_SIZE(mx21ads_pins),
 308                         "mx21ads");
 309
 310         imx21_add_imx_uart0(&uart_pdata_rts);
 311         imx21_add_imx_uart2(&uart_pdata_norts);
 312         imx21_add_imx_uart3(&uart_pdata_rts);
 313         imx21_add_mxc_nand(&mx21ads_nand_board_info);
 314
 315         imx21_add_imx_fb(&mx21ads_fb_data);
 316 }
 317
 318 static void __init mx21ads_late_init(void)
 319 {
 320         imx21_add_mxc_mmc(0, &mx21ads_sdhc_pdata);
 321
 322         gpiod_add_lookup_table(&mx21ads_lcd_regulator_gpiod_table);
 323         platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
 324
 325         mx21ads_cs8900_resources[1].start =
 326                         gpio_to_irq(MX21ADS_CS8900A_IRQ_GPIO);
 327         mx21ads_cs8900_resources[1].end =
 328                         gpio_to_irq(MX21ADS_CS8900A_IRQ_GPIO);
 329         platform_device_register_full(&mx21ads_cs8900_devinfo);
 330 }
 331
 332 static void __init mx21ads_timer_init(void)
 333 {
 334         mx21_clocks_init(32768, 26000000);
 335 }
 336
 337 MACHINE_START(MX21ADS, "Freescale i.MX21ADS")
 338         /* maintainer: Freescale Semiconductor, Inc. */
 339         .atag_offset = 0x100,
 340         .map_io         = mx21_map_io,
 341         .init_early = imx21_init_early,
 342         .init_irq = mx21_init_irq,
 343         .init_time      = mx21ads_timer_init,
 344         .init_machine   = mx21ads_board_init,
 345         .init_late      = mx21ads_late_init,
 346         .restart        = mxc_restart,
 347 MACHINE_END