1 // SPDX-License-Identifier: GPL-2.0
3 * R-Car Generation 2 support
5 * Copyright (C) 2013 Renesas Solutions Corp.
6 * Copyright (C) 2013 Magnus Damm
7 * Copyright (C) 2014 Ulrich Hecht
10 #include <linux/clk-provider.h>
11 #include <linux/clocksource.h>
12 #include <linux/device.h>
13 #include <linux/dma-contiguous.h>
15 #include <linux/kernel.h>
16 #include <linux/memblock.h>
18 #include <linux/of_fdt.h>
19 #include <linux/of_platform.h>
20 #include <asm/mach/arch.h>
21 #include <asm/secure_cntvoff.h>
23 #include "rcar-gen2.h"
25 static const struct of_device_id cpg_matches
[] __initconst
= {
26 { .compatible
= "renesas,rcar-gen2-cpg-clocks", },
27 { .compatible
= "renesas,r8a7743-cpg-mssr", .data
= "extal" },
28 { .compatible
= "renesas,r8a7744-cpg-mssr", .data
= "extal" },
29 { .compatible
= "renesas,r8a7790-cpg-mssr", .data
= "extal" },
30 { .compatible
= "renesas,r8a7791-cpg-mssr", .data
= "extal" },
31 { .compatible
= "renesas,r8a7793-cpg-mssr", .data
= "extal" },
35 static unsigned int __init
get_extal_freq(void)
37 const struct of_device_id
*match
;
38 struct device_node
*cpg
, *extal
;
42 cpg
= of_find_matching_node_and_match(NULL
, cpg_matches
, &match
);
47 idx
= of_property_match_string(cpg
, "clock-names", match
->data
);
48 extal
= of_parse_phandle(cpg
, "clocks", idx
);
53 of_property_read_u32(extal
, "clock-frequency", &freq
);
61 void __init
rcar_gen2_timer_init(void)
66 secure_cntvoff_init();
68 if (of_machine_is_compatible("renesas,r8a7745") ||
69 of_machine_is_compatible("renesas,r8a77470") ||
70 of_machine_is_compatible("renesas,r8a7792") ||
71 of_machine_is_compatible("renesas,r8a7794")) {
72 freq
= 260000000 / 8; /* ZS / 8 */
74 /* At Linux boot time the r8a7790 arch timer comes up
75 * with the counter disabled. Moreover, it may also report
76 * a potentially incorrect fixed 13 MHz frequency. To be
77 * correct these registers need to be updated to use the
78 * frequency EXTAL / 2.
80 freq
= get_extal_freq() / 2;
83 /* Remap "armgcnt address map" space */
84 base
= ioremap(0xe6080000, PAGE_SIZE
);
87 * Update the timer if it is either not running, or is not at the
88 * right frequency. The timer is only configurable in secure mode
89 * so this avoids an abort if the loader started the timer and
90 * entered the kernel in non-secure mode.
93 if ((ioread32(base
+ CNTCR
) & 1) == 0 ||
94 ioread32(base
+ CNTFID0
) != freq
) {
95 /* Update registers with correct frequency */
96 iowrite32(freq
, base
+ CNTFID0
);
97 asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq
));
99 /* make sure arch timer is started by setting bit 0 of CNTCR */
100 iowrite32(1, base
+ CNTCR
);
109 struct memory_reserve_config
{
114 static int __init
rcar_gen2_scan_mem(unsigned long node
, const char *uname
,
115 int depth
, void *data
)
117 const char *type
= of_get_flat_dt_prop(node
, "device_type", NULL
);
118 const __be32
*reg
, *endp
;
120 struct memory_reserve_config
*mrc
= data
;
121 u64 lpae_start
= 1ULL << 32;
123 /* We are scanning "memory" nodes only */
124 if (type
== NULL
|| strcmp(type
, "memory"))
127 reg
= of_get_flat_dt_prop(node
, "linux,usable-memory", &l
);
129 reg
= of_get_flat_dt_prop(node
, "reg", &l
);
133 endp
= reg
+ (l
/ sizeof(__be32
));
134 while ((endp
- reg
) >= (dt_root_addr_cells
+ dt_root_size_cells
)) {
137 base
= dt_mem_next_cell(dt_root_addr_cells
, ®
);
138 size
= dt_mem_next_cell(dt_root_size_cells
, ®
);
140 if (base
>= lpae_start
)
143 if ((base
+ size
) >= lpae_start
)
144 size
= lpae_start
- base
;
146 if (size
< mrc
->reserved
)
149 if (base
< mrc
->base
)
152 /* keep the area at top near the 32-bit legacy limit */
153 mrc
->base
= base
+ size
- mrc
->reserved
;
154 mrc
->size
= mrc
->reserved
;
160 void __init
rcar_gen2_reserve(void)
162 struct memory_reserve_config mrc
;
164 /* reserve 256 MiB at the top of the physical legacy 32-bit space */
165 memset(&mrc
, 0, sizeof(mrc
));
166 mrc
.reserved
= SZ_256M
;
168 of_scan_flat_dt(rcar_gen2_scan_mem
, &mrc
);
169 #ifdef CONFIG_DMA_CMA
170 if (mrc
.size
&& memblock_is_region_memory(mrc
.base
, mrc
.size
)) {
171 static struct cma
*rcar_gen2_dma_contiguous
;
173 dma_contiguous_reserve_area(mrc
.size
, mrc
.base
, 0,
174 &rcar_gen2_dma_contiguous
, true);
179 static const char * const rcar_gen2_boards_compat_dt
[] __initconst
= {
188 DT_MACHINE_START(RCAR_GEN2_DT
, "Generic R-Car Gen2 (Flattened Device Tree)")
189 .init_late
= shmobile_init_late
,
190 .init_time
= rcar_gen2_timer_init
,
191 .reserve
= rcar_gen2_reserve
,
192 .dt_compat
= rcar_gen2_boards_compat_dt
,
195 static const char * const rz_g1_boards_compat_dt
[] __initconst
= {
203 DT_MACHINE_START(RZ_G1_DT
, "Generic RZ/G1 (Flattened Device Tree)")
204 .init_late
= shmobile_init_late
,
205 .init_time
= rcar_gen2_timer_init
,
206 .reserve
= rcar_gen2_reserve
,
207 .dt_compat
= rz_g1_boards_compat_dt
,