Linux 5.2
[linux-2.6/linux-2.6-arm.git] / arch / arm / mach-iop32x / iq31244.c
blobb177e39006164b5e4aab4f089917b5c24bacfa59
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * arch/arm/mach-iop32x/iq31244.c
5 * Board support code for the Intel EP80219 and IQ31244 platforms.
7 * Author: Rory Bolt <rorybolt@pacbell.net>
8 * Copyright (C) 2002 Rory Bolt
9 * Copyright 2003 (c) MontaVista, Software, Inc.
10 * Copyright (C) 2004 Intel Corp.
13 #include <linux/mm.h>
14 #include <linux/init.h>
15 #include <linux/delay.h>
16 #include <linux/kernel.h>
17 #include <linux/pci.h>
18 #include <linux/pm.h>
19 #include <linux/string.h>
20 #include <linux/serial_core.h>
21 #include <linux/serial_8250.h>
22 #include <linux/mtd/physmap.h>
23 #include <linux/platform_device.h>
24 #include <linux/io.h>
25 #include <mach/hardware.h>
26 #include <asm/cputype.h>
27 #include <asm/irq.h>
28 #include <asm/mach/arch.h>
29 #include <asm/mach/map.h>
30 #include <asm/mach/pci.h>
31 #include <asm/mach/time.h>
32 #include <asm/mach-types.h>
33 #include <asm/page.h>
34 #include <asm/pgtable.h>
35 #include <mach/time.h>
36 #include "gpio-iop32x.h"
39 * Until March of 2007 iq31244 platforms and ep80219 platforms shared the
40 * same machine id, and the processor type was used to select board type.
41 * However this assumption breaks for an iq80219 board which is an iop219
42 * processor on an iq31244 board. The force_ep80219 flag has been added
43 * for old boot loaders using the iq31244 machine id for an ep80219 platform.
45 static int force_ep80219;
47 static int is_80219(void)
49 return !!((read_cpuid_id() & 0xffffffe0) == 0x69052e20);
52 static int is_ep80219(void)
54 if (machine_is_ep80219() || force_ep80219)
55 return 1;
56 else
57 return 0;
62 * EP80219/IQ31244 timer tick configuration.
64 static void __init iq31244_timer_init(void)
66 if (is_ep80219()) {
67 /* 33.333 MHz crystal. */
68 iop_init_time(200000000);
69 } else {
70 /* 33.000 MHz crystal. */
71 iop_init_time(198000000);
77 * IQ31244 I/O.
79 static struct map_desc iq31244_io_desc[] __initdata = {
80 { /* on-board devices */
81 .virtual = IQ31244_UART,
82 .pfn = __phys_to_pfn(IQ31244_UART),
83 .length = 0x00100000,
84 .type = MT_DEVICE,
88 void __init iq31244_map_io(void)
90 iop3xx_map_io();
91 iotable_init(iq31244_io_desc, ARRAY_SIZE(iq31244_io_desc));
96 * EP80219/IQ31244 PCI.
98 static int __init
99 ep80219_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
101 int irq;
103 if (slot == 0) {
104 /* CFlash */
105 irq = IRQ_IOP32X_XINT1;
106 } else if (slot == 1) {
107 /* 82551 Pro 100 */
108 irq = IRQ_IOP32X_XINT0;
109 } else if (slot == 2) {
110 /* PCI-X Slot */
111 irq = IRQ_IOP32X_XINT3;
112 } else if (slot == 3) {
113 /* SATA */
114 irq = IRQ_IOP32X_XINT2;
115 } else {
116 printk(KERN_ERR "ep80219_pci_map_irq() called for unknown "
117 "device PCI:%d:%d:%d\n", dev->bus->number,
118 PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
119 irq = -1;
122 return irq;
125 static struct hw_pci ep80219_pci __initdata = {
126 .nr_controllers = 1,
127 .ops = &iop3xx_ops,
128 .setup = iop3xx_pci_setup,
129 .preinit = iop3xx_pci_preinit,
130 .map_irq = ep80219_pci_map_irq,
133 static int __init
134 iq31244_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
136 int irq;
138 if (slot == 0) {
139 /* CFlash */
140 irq = IRQ_IOP32X_XINT1;
141 } else if (slot == 1) {
142 /* SATA */
143 irq = IRQ_IOP32X_XINT2;
144 } else if (slot == 2) {
145 /* PCI-X Slot */
146 irq = IRQ_IOP32X_XINT3;
147 } else if (slot == 3) {
148 /* 82546 GigE */
149 irq = IRQ_IOP32X_XINT0;
150 } else {
151 printk(KERN_ERR "iq31244_pci_map_irq called for unknown "
152 "device PCI:%d:%d:%d\n", dev->bus->number,
153 PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
154 irq = -1;
157 return irq;
160 static struct hw_pci iq31244_pci __initdata = {
161 .nr_controllers = 1,
162 .ops = &iop3xx_ops,
163 .setup = iop3xx_pci_setup,
164 .preinit = iop3xx_pci_preinit,
165 .map_irq = iq31244_pci_map_irq,
168 static int __init iq31244_pci_init(void)
170 if (is_ep80219())
171 pci_common_init(&ep80219_pci);
172 else if (machine_is_iq31244()) {
173 if (is_80219()) {
174 printk("note: iq31244 board type has been selected\n");
175 printk("note: to select ep80219 operation:\n");
176 printk("\t1/ specify \"force_ep80219\" on the kernel"
177 " command line\n");
178 printk("\t2/ update boot loader to pass"
179 " the ep80219 id: %d\n", MACH_TYPE_EP80219);
181 pci_common_init(&iq31244_pci);
184 return 0;
187 subsys_initcall(iq31244_pci_init);
191 * IQ31244 machine initialisation.
193 static struct physmap_flash_data iq31244_flash_data = {
194 .width = 2,
197 static struct resource iq31244_flash_resource = {
198 .start = 0xf0000000,
199 .end = 0xf07fffff,
200 .flags = IORESOURCE_MEM,
203 static struct platform_device iq31244_flash_device = {
204 .name = "physmap-flash",
205 .id = 0,
206 .dev = {
207 .platform_data = &iq31244_flash_data,
209 .num_resources = 1,
210 .resource = &iq31244_flash_resource,
213 static struct plat_serial8250_port iq31244_serial_port[] = {
215 .mapbase = IQ31244_UART,
216 .membase = (char *)IQ31244_UART,
217 .irq = IRQ_IOP32X_XINT1,
218 .flags = UPF_SKIP_TEST,
219 .iotype = UPIO_MEM,
220 .regshift = 0,
221 .uartclk = 1843200,
223 { },
226 static struct resource iq31244_uart_resource = {
227 .start = IQ31244_UART,
228 .end = IQ31244_UART + 7,
229 .flags = IORESOURCE_MEM,
232 static struct platform_device iq31244_serial_device = {
233 .name = "serial8250",
234 .id = PLAT8250_DEV_PLATFORM,
235 .dev = {
236 .platform_data = iq31244_serial_port,
238 .num_resources = 1,
239 .resource = &iq31244_uart_resource,
243 * This function will send a SHUTDOWN_COMPLETE message to the PIC
244 * controller over I2C. We are not using the i2c subsystem since
245 * we are going to power off and it may be removed
247 void ep80219_power_off(void)
250 * Send the Address byte w/ the start condition
252 *IOP3XX_IDBR1 = 0x60;
253 *IOP3XX_ICR1 = 0xE9;
254 mdelay(1);
257 * Send the START_MSG byte w/ no start or stop condition
259 *IOP3XX_IDBR1 = 0x0F;
260 *IOP3XX_ICR1 = 0xE8;
261 mdelay(1);
264 * Send the SHUTDOWN_COMPLETE Message ID byte w/ no start or
265 * stop condition
267 *IOP3XX_IDBR1 = 0x03;
268 *IOP3XX_ICR1 = 0xE8;
269 mdelay(1);
272 * Send an ignored byte w/ stop condition
274 *IOP3XX_IDBR1 = 0x00;
275 *IOP3XX_ICR1 = 0xEA;
277 while (1)
281 static void __init iq31244_init_machine(void)
283 register_iop32x_gpio();
284 platform_device_register(&iop3xx_i2c0_device);
285 platform_device_register(&iop3xx_i2c1_device);
286 platform_device_register(&iq31244_flash_device);
287 platform_device_register(&iq31244_serial_device);
288 platform_device_register(&iop3xx_dma_0_channel);
289 platform_device_register(&iop3xx_dma_1_channel);
291 if (is_ep80219())
292 pm_power_off = ep80219_power_off;
294 if (!is_80219())
295 platform_device_register(&iop3xx_aau_channel);
298 static int __init force_ep80219_setup(char *str)
300 force_ep80219 = 1;
301 return 1;
304 __setup("force_ep80219", force_ep80219_setup);
306 MACHINE_START(IQ31244, "Intel IQ31244")
307 /* Maintainer: Intel Corp. */
308 .atag_offset = 0x100,
309 .map_io = iq31244_map_io,
310 .init_irq = iop32x_init_irq,
311 .init_time = iq31244_timer_init,
312 .init_machine = iq31244_init_machine,
313 .restart = iop3xx_restart,
314 MACHINE_END
316 /* There should have been an ep80219 machine identifier from the beginning.
317 * Boot roms older than March 2007 do not know the ep80219 machine id. Pass
318 * "force_ep80219" on the kernel command line, otherwise iq31244 operation
319 * will be selected.
321 MACHINE_START(EP80219, "Intel EP80219")
322 /* Maintainer: Intel Corp. */
323 .atag_offset = 0x100,
324 .map_io = iq31244_map_io,
325 .init_irq = iop32x_init_irq,
326 .init_time = iq31244_timer_init,
327 .init_machine = iq31244_init_machine,
328 .restart = iop3xx_restart,
329 MACHINE_END