1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * arch/arm/mach-iop32x/iq80321.c
5 * Board support code for the Intel IQ80321 platform.
7 * Author: Rory Bolt <rorybolt@pacbell.net>
8 * Copyright (C) 2002 Rory Bolt
9 * Copyright (C) 2004 Intel Corp.
13 #include <linux/init.h>
14 #include <linux/kernel.h>
15 #include <linux/pci.h>
16 #include <linux/string.h>
17 #include <linux/serial_core.h>
18 #include <linux/serial_8250.h>
19 #include <linux/mtd/physmap.h>
20 #include <linux/platform_device.h>
22 #include <mach/hardware.h>
24 #include <asm/mach/arch.h>
25 #include <asm/mach/map.h>
26 #include <asm/mach/pci.h>
27 #include <asm/mach/time.h>
28 #include <asm/mach-types.h>
30 #include <asm/pgtable.h>
31 #include <mach/time.h>
32 #include "gpio-iop32x.h"
35 * IQ80321 timer tick configuration.
37 static void __init
iq80321_timer_init(void)
39 /* 33.333 MHz crystal. */
40 iop_init_time(200000000);
47 static struct map_desc iq80321_io_desc
[] __initdata
= {
48 { /* on-board devices */
49 .virtual = IQ80321_UART
,
50 .pfn
= __phys_to_pfn(IQ80321_UART
),
56 void __init
iq80321_map_io(void)
59 iotable_init(iq80321_io_desc
, ARRAY_SIZE(iq80321_io_desc
));
67 iq80321_pci_map_irq(const struct pci_dev
*dev
, u8 slot
, u8 pin
)
71 if ((slot
== 2 || slot
== 6) && pin
== 1) {
73 irq
= IRQ_IOP32X_XINT2
;
74 } else if ((slot
== 2 || slot
== 6) && pin
== 2) {
76 irq
= IRQ_IOP32X_XINT3
;
77 } else if ((slot
== 2 || slot
== 6) && pin
== 3) {
79 irq
= IRQ_IOP32X_XINT0
;
80 } else if ((slot
== 2 || slot
== 6) && pin
== 4) {
82 irq
= IRQ_IOP32X_XINT1
;
83 } else if (slot
== 4 || slot
== 8) {
85 irq
= IRQ_IOP32X_XINT0
;
87 printk(KERN_ERR
"iq80321_pci_map_irq() called for unknown "
88 "device PCI:%d:%d:%d\n", dev
->bus
->number
,
89 PCI_SLOT(dev
->devfn
), PCI_FUNC(dev
->devfn
));
96 static struct hw_pci iq80321_pci __initdata
= {
99 .setup
= iop3xx_pci_setup
,
100 .preinit
= iop3xx_pci_preinit_cond
,
101 .map_irq
= iq80321_pci_map_irq
,
104 static int __init
iq80321_pci_init(void)
106 if ((iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE
) &&
107 machine_is_iq80321())
108 pci_common_init(&iq80321_pci
);
113 subsys_initcall(iq80321_pci_init
);
117 * IQ80321 machine initialisation.
119 static struct physmap_flash_data iq80321_flash_data
= {
123 static struct resource iq80321_flash_resource
= {
126 .flags
= IORESOURCE_MEM
,
129 static struct platform_device iq80321_flash_device
= {
130 .name
= "physmap-flash",
133 .platform_data
= &iq80321_flash_data
,
136 .resource
= &iq80321_flash_resource
,
139 static struct plat_serial8250_port iq80321_serial_port
[] = {
141 .mapbase
= IQ80321_UART
,
142 .membase
= (char *)IQ80321_UART
,
143 .irq
= IRQ_IOP32X_XINT1
,
144 .flags
= UPF_SKIP_TEST
,
152 static struct resource iq80321_uart_resource
= {
153 .start
= IQ80321_UART
,
154 .end
= IQ80321_UART
+ 7,
155 .flags
= IORESOURCE_MEM
,
158 static struct platform_device iq80321_serial_device
= {
159 .name
= "serial8250",
160 .id
= PLAT8250_DEV_PLATFORM
,
162 .platform_data
= iq80321_serial_port
,
165 .resource
= &iq80321_uart_resource
,
168 static void __init
iq80321_init_machine(void)
170 register_iop32x_gpio();
171 platform_device_register(&iop3xx_i2c0_device
);
172 platform_device_register(&iop3xx_i2c1_device
);
173 platform_device_register(&iq80321_flash_device
);
174 platform_device_register(&iq80321_serial_device
);
175 platform_device_register(&iop3xx_dma_0_channel
);
176 platform_device_register(&iop3xx_dma_1_channel
);
177 platform_device_register(&iop3xx_aau_channel
);
180 MACHINE_START(IQ80321
, "Intel IQ80321")
181 /* Maintainer: Intel Corp. */
182 .atag_offset
= 0x100,
183 .map_io
= iq80321_map_io
,
184 .init_irq
= iop32x_init_irq
,
185 .init_time
= iq80321_timer_init
,
186 .init_machine
= iq80321_init_machine
,
187 .restart
= iop3xx_restart
,