include/linux/ucb1400.h

   1 /*
   2  * Register definitions and functions for:
   3  *  Philips UCB1400 driver
   4  *
   5  * Based on ucb1400_ts:
   6  *  Author:     Nicolas Pitre
   7  *  Created:    September 25, 2006
   8  *  Copyright:  MontaVista Software, Inc.
   9  *
  10  * Spliting done by: Marek Vasut <marek.vasut@gmail.com>
  11  * If something doesnt work and it worked before spliting, e-mail me,
  12  * dont bother Nicolas please ;-)
  13  *
  14  * This program is free software; you can redistribute it and/or modify
  15  * it under the terms of the GNU General Public License version 2 as
  16  * published by the Free Software Foundation.
  17  *
  18  * This code is heavily based on ucb1x00-*.c copyrighted by Russell King
  19  * covering the UCB1100, UCB1200 and UCB1300..  Support for the UCB1400 has
  20  * been made separate from ucb1x00-core/ucb1x00-ts on Russell's request.
  21  */
  22
  23 #ifndef _LINUX__UCB1400_H
  24 #define _LINUX__UCB1400_H
  25
  26 #include <sound/ac97_codec.h>
  27 #include <linux/mutex.h>
  28 #include <linux/platform_device.h>
  29
  30 /*
  31  * UCB1400 AC-link registers
  32  */
  33
  34 #define UCB_IO_DATA             0x5a
  35 #define UCB_IO_DIR              0x5c
  36 #define UCB_IE_RIS              0x5e
  37 #define UCB_IE_FAL              0x60
  38 #define UCB_IE_STATUS           0x62
  39 #define UCB_IE_CLEAR            0x62
  40 #define UCB_IE_ADC              (1 << 11)
  41 #define UCB_IE_TSPX             (1 << 12)
  42
  43 #define UCB_TS_CR               0x64
  44 #define UCB_TS_CR_TSMX_POW      (1 << 0)
  45 #define UCB_TS_CR_TSPX_POW      (1 << 1)
  46 #define UCB_TS_CR_TSMY_POW      (1 << 2)
  47 #define UCB_TS_CR_TSPY_POW      (1 << 3)
  48 #define UCB_TS_CR_TSMX_GND      (1 << 4)
  49 #define UCB_TS_CR_TSPX_GND      (1 << 5)
  50 #define UCB_TS_CR_TSMY_GND      (1 << 6)
  51 #define UCB_TS_CR_TSPY_GND      (1 << 7)
  52 #define UCB_TS_CR_MODE_INT      (0 << 8)
  53 #define UCB_TS_CR_MODE_PRES     (1 << 8)
  54 #define UCB_TS_CR_MODE_POS      (2 << 8)
  55 #define UCB_TS_CR_BIAS_ENA      (1 << 11)
  56 #define UCB_TS_CR_TSPX_LOW      (1 << 12)
  57 #define UCB_TS_CR_TSMX_LOW      (1 << 13)
  58
  59 #define UCB_ADC_CR              0x66
  60 #define UCB_ADC_SYNC_ENA        (1 << 0)
  61 #define UCB_ADC_VREFBYP_CON     (1 << 1)
  62 #define UCB_ADC_INP_TSPX        (0 << 2)
  63 #define UCB_ADC_INP_TSMX        (1 << 2)
  64 #define UCB_ADC_INP_TSPY        (2 << 2)
  65 #define UCB_ADC_INP_TSMY        (3 << 2)
  66 #define UCB_ADC_INP_AD0         (4 << 2)
  67 #define UCB_ADC_INP_AD1         (5 << 2)
  68 #define UCB_ADC_INP_AD2         (6 << 2)
  69 #define UCB_ADC_INP_AD3         (7 << 2)
  70 #define UCB_ADC_EXT_REF         (1 << 5)
  71 #define UCB_ADC_START           (1 << 7)
  72 #define UCB_ADC_ENA             (1 << 15)
  73
  74 #define UCB_ADC_DATA            0x68
  75 #define UCB_ADC_DAT_VALID       (1 << 15)
  76 #define UCB_ADC_DAT_MASK        0x3ff
  77
  78 #define UCB_ID                  0x7e
  79 #define UCB_ID_1400             0x4304
  80
  81 struct ucb1400_ts {
  82         struct input_dev        *ts_idev;
  83         struct task_struct      *ts_task;
  84         int                     id;
  85         wait_queue_head_t       ts_wait;
  86         unsigned int            ts_restart:1;
  87         int                     irq;
  88         unsigned int            irq_pending;    /* not bit field shared */
  89         struct snd_ac97         *ac97;
  90 };
  91
  92 struct ucb1400 {
  93         struct platform_device  *ucb1400_ts;
  94 };
  95
  96 static inline u16 ucb1400_reg_read(struct snd_ac97 *ac97, u16 reg)
  97 {
  98         return ac97->bus->ops->read(ac97, reg);
  99 }
 100
 101 static inline void ucb1400_reg_write(struct snd_ac97 *ac97, u16 reg, u16 val)
 102 {
 103         ac97->bus->ops->write(ac97, reg, val);
 104 }
 105
 106 static inline u16 ucb1400_gpio_get_value(struct snd_ac97 *ac97, u16 gpio)
 107 {
 108         return ucb1400_reg_read(ac97, UCB_IO_DATA) & (1 << gpio);
 109 }
 110
 111 static inline void ucb1400_gpio_set_value(struct snd_ac97 *ac97, u16 gpio,
 112                                                 u16 val)
 113 {
 114         ucb1400_reg_write(ac97, UCB_IO_DATA, val ?
 115                         ucb1400_reg_read(ac97, UCB_IO_DATA) | (1 << gpio) :
 116                         ucb1400_reg_read(ac97, UCB_IO_DATA) & ~(1 << gpio));
 117 }
 118
 119 static inline u16 ucb1400_gpio_get_direction(struct snd_ac97 *ac97, u16 gpio)
 120 {
 121         return ucb1400_reg_read(ac97, UCB_IO_DIR) & (1 << gpio);
 122 }
 123
 124 static inline void ucb1400_gpio_set_direction(struct snd_ac97 *ac97, u16 gpio,
 125                                                 u16 dir)
 126 {
 127         ucb1400_reg_write(ac97, UCB_IO_DIR, dir ?
 128                         ucb1400_reg_read(ac97, UCB_IO_DIR) | (1 << gpio) :
 129                         ucb1400_reg_read(ac97, UCB_IO_DIR) & ~(1 << gpio));
 130 }
 131
 132 static inline void ucb1400_adc_enable(struct snd_ac97 *ac97)
 133 {
 134         ucb1400_reg_write(ac97, UCB_ADC_CR, UCB_ADC_ENA);
 135 }
 136
 137 static unsigned int ucb1400_adc_read(struct snd_ac97 *ac97, u16 adc_channel,
 138                                         int adcsync)
 139 {
 140         unsigned int val;
 141
 142         if (adcsync)
 143                 adc_channel |= UCB_ADC_SYNC_ENA;
 144
 145         ucb1400_reg_write(ac97, UCB_ADC_CR, UCB_ADC_ENA | adc_channel);
 146         ucb1400_reg_write(ac97, UCB_ADC_CR, UCB_ADC_ENA | adc_channel |
 147                                 UCB_ADC_START);
 148
 149         while (!((val = ucb1400_reg_read(ac97, UCB_ADC_DATA))
 150                         & UCB_ADC_DAT_VALID))
 151                 schedule_timeout_uninterruptible(1);
 152
 153         return val & UCB_ADC_DAT_MASK;
 154 }
 155
 156 static inline void ucb1400_adc_disable(struct snd_ac97 *ac97)
 157 {
 158         ucb1400_reg_write(ac97, UCB_ADC_CR, 0);
 159 }
 160
 161 #endif