ACPI: pci_root: simplify list traversals
[linux-2.6/linux-acpi-2.6.git] / drivers / message / fusion / lsi / mpi_targ.h
blobc3dea7f6909d8d9053cb8251fbcdef5554b65ad1
1 /*
2 * Copyright (c) 2000-2008 LSI Corporation.
5 * Name: mpi_targ.h
6 * Title: MPI Target mode messages and structures
7 * Creation Date: June 22, 2000
9 * mpi_targ.h Version: 01.05.06
11 * Version History
12 * ---------------
14 * Date Version Description
15 * -------- -------- ------------------------------------------------------
16 * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
17 * 06-06-00 01.00.01 Update version number for 1.0 release.
18 * 06-22-00 01.00.02 Added _MSG_TARGET_CMD_BUFFER_POST_REPLY structure.
19 * Corrected DECSRIPTOR typo to DESCRIPTOR.
20 * 11-02-00 01.01.01 Original release for post 1.0 work
21 * Modified target mode to use IoIndex instead of
22 * HostIndex and IocIndex. Added Alias.
23 * 01-09-01 01.01.02 Added defines for TARGET_ASSIST_FLAGS_REPOST_CMD_BUFFER
24 * and TARGET_STATUS_SEND_FLAGS_REPOST_CMD_BUFFER.
25 * 02-20-01 01.01.03 Started using MPI_POINTER.
26 * Added structures for MPI_TARGET_SCSI_SPI_CMD_BUFFER and
27 * MPI_TARGET_FCP_CMD_BUFFER.
28 * 03-27-01 01.01.04 Added structure offset comments.
29 * 08-08-01 01.02.01 Original release for v1.2 work.
30 * 09-28-01 01.02.02 Added structure for MPI_TARGET_SCSI_SPI_STATUS_IU.
31 * Added PriorityReason field to some replies and
32 * defined more PriorityReason codes.
33 * Added some defines for to support previous version
34 * of MPI.
35 * 10-04-01 01.02.03 Added PriorityReason to MSG_TARGET_ERROR_REPLY.
36 * 11-01-01 01.02.04 Added define for TARGET_STATUS_SEND_FLAGS_HIGH_PRIORITY.
37 * 03-14-02 01.02.05 Modified MPI_TARGET_FCP_RSP_BUFFER to get the proper
38 * byte ordering.
39 * 05-31-02 01.02.06 Modified TARGET_MODE_REPLY_ALIAS_MASK to only include
40 * one bit.
41 * Added AliasIndex field to MPI_TARGET_FCP_CMD_BUFFER.
42 * 09-16-02 01.02.07 Added flags for confirmed completion.
43 * Added PRIORITY_REASON_TARGET_BUSY.
44 * 11-15-02 01.02.08 Added AliasID field to MPI_TARGET_SCSI_SPI_CMD_BUFFER.
45 * 04-01-03 01.02.09 Added OptionalOxid field to MPI_TARGET_FCP_CMD_BUFFER.
46 * 05-11-04 01.03.01 Original release for MPI v1.3.
47 * 08-19-04 01.05.01 Added new request message structures for
48 * MSG_TARGET_CMD_BUF_POST_BASE_REQUEST,
49 * MSG_TARGET_CMD_BUF_POST_LIST_REQUEST, and
50 * MSG_TARGET_ASSIST_EXT_REQUEST.
51 * Added new structures for SAS SSP Command buffer, SSP
52 * Task buffer, and SSP Status IU.
53 * 10-05-04 01.05.02 MSG_TARGET_CMD_BUFFER_POST_BASE_LIST_REPLY added.
54 * 02-22-05 01.05.03 Changed a comment.
55 * 03-11-05 01.05.04 Removed TargetAssistExtended Request.
56 * 06-24-05 01.05.05 Added TargetAssistExtended structures and defines.
57 * 03-27-06 01.05.06 Added a comment.
58 * --------------------------------------------------------------------------
61 #ifndef MPI_TARG_H
62 #define MPI_TARG_H
65 /******************************************************************************
67 * S C S I T a r g e t M e s s a g e s
69 *******************************************************************************/
71 typedef struct _CMD_BUFFER_DESCRIPTOR
73 U16 IoIndex; /* 00h */
74 U16 Reserved; /* 02h */
75 union /* 04h */
77 U32 PhysicalAddress32;
78 U64 PhysicalAddress64;
79 } u;
80 } CMD_BUFFER_DESCRIPTOR, MPI_POINTER PTR_CMD_BUFFER_DESCRIPTOR,
81 CmdBufferDescriptor_t, MPI_POINTER pCmdBufferDescriptor_t;
84 /****************************************************************************/
85 /* Target Command Buffer Post Request */
86 /****************************************************************************/
88 typedef struct _MSG_TARGET_CMD_BUFFER_POST_REQUEST
90 U8 BufferPostFlags; /* 00h */
91 U8 BufferCount; /* 01h */
92 U8 ChainOffset; /* 02h */
93 U8 Function; /* 03h */
94 U8 BufferLength; /* 04h */
95 U8 Reserved; /* 05h */
96 U8 Reserved1; /* 06h */
97 U8 MsgFlags; /* 07h */
98 U32 MsgContext; /* 08h */
99 CMD_BUFFER_DESCRIPTOR Buffer[1]; /* 0Ch */
100 } MSG_TARGET_CMD_BUFFER_POST_REQUEST, MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_REQUEST,
101 TargetCmdBufferPostRequest_t, MPI_POINTER pTargetCmdBufferPostRequest_t;
103 #define CMD_BUFFER_POST_FLAGS_PORT_MASK (0x01)
104 #define CMD_BUFFER_POST_FLAGS_ADDR_MODE_MASK (0x80)
105 #define CMD_BUFFER_POST_FLAGS_ADDR_MODE_32 (0)
106 #define CMD_BUFFER_POST_FLAGS_ADDR_MODE_64 (1)
107 #define CMD_BUFFER_POST_FLAGS_64_BIT_ADDR (0x80)
109 #define CMD_BUFFER_POST_IO_INDEX_MASK (0x00003FFF)
110 #define CMD_BUFFER_POST_IO_INDEX_MASK_0100 (0x000003FF) /* obsolete */
113 typedef struct _MSG_TARGET_CMD_BUFFER_POST_REPLY
115 U8 BufferPostFlags; /* 00h */
116 U8 BufferCount; /* 01h */
117 U8 MsgLength; /* 02h */
118 U8 Function; /* 03h */
119 U8 BufferLength; /* 04h */
120 U8 Reserved; /* 05h */
121 U8 Reserved1; /* 06h */
122 U8 MsgFlags; /* 07h */
123 U32 MsgContext; /* 08h */
124 U16 Reserved2; /* 0Ch */
125 U16 IOCStatus; /* 0Eh */
126 U32 IOCLogInfo; /* 10h */
127 } MSG_TARGET_CMD_BUFFER_POST_REPLY, MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_REPLY,
128 TargetCmdBufferPostReply_t, MPI_POINTER pTargetCmdBufferPostReply_t;
130 /* the following structure is obsolete as of MPI v1.2 */
131 typedef struct _MSG_PRIORITY_CMD_RECEIVED_REPLY
133 U16 Reserved; /* 00h */
134 U8 MsgLength; /* 02h */
135 U8 Function; /* 03h */
136 U16 Reserved1; /* 04h */
137 U8 Reserved2; /* 06h */
138 U8 MsgFlags; /* 07h */
139 U32 MsgContext; /* 08h */
140 U8 PriorityReason; /* 0Ch */
141 U8 Reserved3; /* 0Dh */
142 U16 IOCStatus; /* 0Eh */
143 U32 IOCLogInfo; /* 10h */
144 U32 ReplyWord; /* 14h */
145 } MSG_PRIORITY_CMD_RECEIVED_REPLY, MPI_POINTER PTR_MSG_PRIORITY_CMD_RECEIVED_REPLY,
146 PriorityCommandReceivedReply_t, MPI_POINTER pPriorityCommandReceivedReply_t;
149 typedef struct _MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY
151 U16 Reserved; /* 00h */
152 U8 MsgLength; /* 02h */
153 U8 Function; /* 03h */
154 U16 Reserved1; /* 04h */
155 U8 Reserved2; /* 06h */
156 U8 MsgFlags; /* 07h */
157 U32 MsgContext; /* 08h */
158 U8 PriorityReason; /* 0Ch */
159 U8 Reserved3; /* 0Dh */
160 U16 IOCStatus; /* 0Eh */
161 U32 IOCLogInfo; /* 10h */
162 U32 ReplyWord; /* 14h */
163 } MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY,
164 MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY,
165 TargetCmdBufferPostErrorReply_t, MPI_POINTER pTargetCmdBufferPostErrorReply_t;
167 #define PRIORITY_REASON_NO_DISCONNECT (0x00)
168 #define PRIORITY_REASON_SCSI_TASK_MANAGEMENT (0x01)
169 #define PRIORITY_REASON_CMD_PARITY_ERR (0x02)
170 #define PRIORITY_REASON_MSG_OUT_PARITY_ERR (0x03)
171 #define PRIORITY_REASON_LQ_CRC_ERR (0x04)
172 #define PRIORITY_REASON_CMD_CRC_ERR (0x05)
173 #define PRIORITY_REASON_PROTOCOL_ERR (0x06)
174 #define PRIORITY_REASON_DATA_OUT_PARITY_ERR (0x07)
175 #define PRIORITY_REASON_DATA_OUT_CRC_ERR (0x08)
176 #define PRIORITY_REASON_TARGET_BUSY (0x09)
177 #define PRIORITY_REASON_UNKNOWN (0xFF)
180 /****************************************************************************/
181 /* Target Command Buffer Post Base Request */
182 /****************************************************************************/
184 typedef struct _MSG_TARGET_CMD_BUF_POST_BASE_REQUEST
186 U8 BufferPostFlags; /* 00h */
187 U8 PortNumber; /* 01h */
188 U8 ChainOffset; /* 02h */
189 U8 Function; /* 03h */
190 U16 TotalCmdBuffers; /* 04h */
191 U8 Reserved; /* 06h */
192 U8 MsgFlags; /* 07h */
193 U32 MsgContext; /* 08h */
194 U32 Reserved1; /* 0Ch */
195 U16 CmdBufferLength; /* 10h */
196 U16 NextCmdBufferOffset; /* 12h */
197 U32 BaseAddressLow; /* 14h */
198 U32 BaseAddressHigh; /* 18h */
199 } MSG_TARGET_CMD_BUF_POST_BASE_REQUEST,
200 MPI_POINTER PTR__MSG_TARGET_CMD_BUF_POST_BASE_REQUEST,
201 TargetCmdBufferPostBaseRequest_t,
202 MPI_POINTER pTargetCmdBufferPostBaseRequest_t;
204 #define CMD_BUFFER_POST_BASE_FLAGS_AUTO_POST_ALL (0x01)
207 typedef struct _MSG_TARGET_CMD_BUFFER_POST_BASE_LIST_REPLY
209 U16 Reserved; /* 00h */
210 U8 MsgLength; /* 02h */
211 U8 Function; /* 03h */
212 U16 Reserved1; /* 04h */
213 U8 Reserved2; /* 06h */
214 U8 MsgFlags; /* 07h */
215 U32 MsgContext; /* 08h */
216 U16 Reserved3; /* 0Ch */
217 U16 IOCStatus; /* 0Eh */
218 U32 IOCLogInfo; /* 10h */
219 } MSG_TARGET_CMD_BUFFER_POST_BASE_LIST_REPLY,
220 MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_BASE_LIST_REPLY,
221 TargetCmdBufferPostBaseListReply_t,
222 MPI_POINTER pTargetCmdBufferPostBaseListReply_t;
225 /****************************************************************************/
226 /* Target Command Buffer Post List Request */
227 /****************************************************************************/
229 typedef struct _MSG_TARGET_CMD_BUF_POST_LIST_REQUEST
231 U8 Reserved; /* 00h */
232 U8 PortNumber; /* 01h */
233 U8 ChainOffset; /* 02h */
234 U8 Function; /* 03h */
235 U16 CmdBufferCount; /* 04h */
236 U8 Reserved1; /* 06h */
237 U8 MsgFlags; /* 07h */
238 U32 MsgContext; /* 08h */
239 U32 Reserved2; /* 0Ch */
240 U16 IoIndex[2]; /* 10h */
241 } MSG_TARGET_CMD_BUF_POST_LIST_REQUEST,
242 MPI_POINTER PTR_MSG_TARGET_CMD_BUF_POST_LIST_REQUEST,
243 TargetCmdBufferPostListRequest_t,
244 MPI_POINTER pTargetCmdBufferPostListRequest_t;
247 /****************************************************************************/
248 /* Command Buffer Formats (with 16 byte CDB) */
249 /****************************************************************************/
251 typedef struct _MPI_TARGET_FCP_CMD_BUFFER
253 U8 FcpLun[8]; /* 00h */
254 U8 FcpCntl[4]; /* 08h */
255 U8 FcpCdb[16]; /* 0Ch */
256 U32 FcpDl; /* 1Ch */
257 U8 AliasIndex; /* 20h */
258 U8 Reserved1; /* 21h */
259 U16 OptionalOxid; /* 22h */
260 } MPI_TARGET_FCP_CMD_BUFFER, MPI_POINTER PTR_MPI_TARGET_FCP_CMD_BUFFER,
261 MpiTargetFcpCmdBuffer, MPI_POINTER pMpiTargetFcpCmdBuffer;
264 typedef struct _MPI_TARGET_SCSI_SPI_CMD_BUFFER
266 /* SPI L_Q information unit */
267 U8 L_QType; /* 00h */
268 U8 Reserved; /* 01h */
269 U16 Tag; /* 02h */
270 U8 LogicalUnitNumber[8]; /* 04h */
271 U32 DataLength; /* 0Ch */
272 /* SPI command information unit */
273 U8 ReservedFirstByteOfCommandIU; /* 10h */
274 U8 TaskAttribute; /* 11h */
275 U8 TaskManagementFlags; /* 12h */
276 U8 AdditionalCDBLength; /* 13h */
277 U8 CDB[16]; /* 14h */
278 /* Alias ID */
279 U8 AliasID; /* 24h */
280 U8 Reserved1; /* 25h */
281 U16 Reserved2; /* 26h */
282 } MPI_TARGET_SCSI_SPI_CMD_BUFFER,
283 MPI_POINTER PTR_MPI_TARGET_SCSI_SPI_CMD_BUFFER,
284 MpiTargetScsiSpiCmdBuffer, MPI_POINTER pMpiTargetScsiSpiCmdBuffer;
287 typedef struct _MPI_TARGET_SSP_CMD_BUFFER
289 U8 FrameType; /* 00h */
290 U8 Reserved1; /* 01h */
291 U16 Reserved2; /* 02h */
292 U16 InitiatorTag; /* 04h */
293 U16 DevHandle; /* 06h */
294 /* COMMAND information unit starts here */
295 U8 LogicalUnitNumber[8]; /* 08h */
296 U8 Reserved3; /* 10h */
297 U8 TaskAttribute; /* lower 3 bits */ /* 11h */
298 U8 Reserved4; /* 12h */
299 U8 AdditionalCDBLength; /* upper 5 bits */ /* 13h */
300 U8 CDB[16]; /* 14h */
301 /* Additional CDB bytes extend past the CDB field */
302 } MPI_TARGET_SSP_CMD_BUFFER, MPI_POINTER PTR_MPI_TARGET_SSP_CMD_BUFFER,
303 MpiTargetSspCmdBuffer, MPI_POINTER pMpiTargetSspCmdBuffer;
305 typedef struct _MPI_TARGET_SSP_TASK_BUFFER
307 U8 FrameType; /* 00h */
308 U8 Reserved1; /* 01h */
309 U16 Reserved2; /* 02h */
310 U16 InitiatorTag; /* 04h */
311 U16 DevHandle; /* 06h */
312 /* TASK information unit starts here */
313 U8 LogicalUnitNumber[8]; /* 08h */
314 U8 Reserved3; /* 10h */
315 U8 Reserved4; /* 11h */
316 U8 TaskManagementFunction; /* 12h */
317 U8 Reserved5; /* 13h */
318 U16 ManagedTaskTag; /* 14h */
319 U16 Reserved6; /* 16h */
320 U32 Reserved7; /* 18h */
321 U32 Reserved8; /* 1Ch */
322 U32 Reserved9; /* 20h */
323 } MPI_TARGET_SSP_TASK_BUFFER, MPI_POINTER PTR_MPI_TARGET_SSP_TASK_BUFFER,
324 MpiTargetSspTaskBuffer, MPI_POINTER pMpiTargetSspTaskBuffer;
327 /****************************************************************************/
328 /* Target Assist Request */
329 /****************************************************************************/
331 typedef struct _MSG_TARGET_ASSIST_REQUEST
333 U8 StatusCode; /* 00h */
334 U8 TargetAssistFlags; /* 01h */
335 U8 ChainOffset; /* 02h */
336 U8 Function; /* 03h */
337 U16 QueueTag; /* 04h */
338 U8 Reserved; /* 06h */
339 U8 MsgFlags; /* 07h */
340 U32 MsgContext; /* 08h */
341 U32 ReplyWord; /* 0Ch */
342 U8 LUN[8]; /* 10h */
343 U32 RelativeOffset; /* 18h */
344 U32 DataLength; /* 1Ch */
345 SGE_IO_UNION SGL[1]; /* 20h */
346 } MSG_TARGET_ASSIST_REQUEST, MPI_POINTER PTR_MSG_TARGET_ASSIST_REQUEST,
347 TargetAssistRequest_t, MPI_POINTER pTargetAssistRequest_t;
349 #define TARGET_ASSIST_FLAGS_DATA_DIRECTION (0x01)
350 #define TARGET_ASSIST_FLAGS_AUTO_STATUS (0x02)
351 #define TARGET_ASSIST_FLAGS_HIGH_PRIORITY (0x04)
352 #define TARGET_ASSIST_FLAGS_CONFIRMED (0x08)
353 #define TARGET_ASSIST_FLAGS_REPOST_CMD_BUFFER (0x80)
355 /* Standard Target Mode Reply message */
356 typedef struct _MSG_TARGET_ERROR_REPLY
358 U16 Reserved; /* 00h */
359 U8 MsgLength; /* 02h */
360 U8 Function; /* 03h */
361 U16 Reserved1; /* 04h */
362 U8 Reserved2; /* 06h */
363 U8 MsgFlags; /* 07h */
364 U32 MsgContext; /* 08h */
365 U8 PriorityReason; /* 0Ch */
366 U8 Reserved3; /* 0Dh */
367 U16 IOCStatus; /* 0Eh */
368 U32 IOCLogInfo; /* 10h */
369 U32 ReplyWord; /* 14h */
370 U32 TransferCount; /* 18h */
371 } MSG_TARGET_ERROR_REPLY, MPI_POINTER PTR_MSG_TARGET_ERROR_REPLY,
372 TargetErrorReply_t, MPI_POINTER pTargetErrorReply_t;
375 /****************************************************************************/
376 /* Target Assist Extended Request */
377 /****************************************************************************/
379 typedef struct _MSG_TARGET_ASSIST_EXT_REQUEST
381 U8 StatusCode; /* 00h */
382 U8 TargetAssistFlags; /* 01h */
383 U8 ChainOffset; /* 02h */
384 U8 Function; /* 03h */
385 U16 QueueTag; /* 04h */
386 U8 Reserved1; /* 06h */
387 U8 MsgFlags; /* 07h */
388 U32 MsgContext; /* 08h */
389 U32 ReplyWord; /* 0Ch */
390 U8 LUN[8]; /* 10h */
391 U32 RelativeOffset; /* 18h */
392 U32 Reserved2; /* 1Ch */
393 U32 Reserved3; /* 20h */
394 U32 PrimaryReferenceTag; /* 24h */
395 U16 PrimaryApplicationTag; /* 28h */
396 U16 PrimaryApplicationTagMask; /* 2Ah */
397 U32 Reserved4; /* 2Ch */
398 U32 DataLength; /* 30h */
399 U32 BidirectionalDataLength; /* 34h */
400 U32 SecondaryReferenceTag; /* 38h */
401 U16 SecondaryApplicationTag; /* 3Ch */
402 U16 Reserved5; /* 3Eh */
403 U16 EEDPFlags; /* 40h */
404 U16 ApplicationTagTranslationMask; /* 42h */
405 U32 EEDPBlockSize; /* 44h */
406 U8 SGLOffset0; /* 48h */
407 U8 SGLOffset1; /* 49h */
408 U8 SGLOffset2; /* 4Ah */
409 U8 SGLOffset3; /* 4Bh */
410 U32 Reserved6; /* 4Ch */
411 SGE_IO_UNION SGL[1]; /* 50h */
412 } MSG_TARGET_ASSIST_EXT_REQUEST, MPI_POINTER PTR_MSG_TARGET_ASSIST_EXT_REQUEST,
413 TargetAssistExtRequest_t, MPI_POINTER pTargetAssistExtRequest_t;
415 /* see the defines after MSG_TARGET_ASSIST_REQUEST for TargetAssistFlags */
417 /* defines for the MsgFlags field */
418 #define TARGET_ASSIST_EXT_MSGFLAGS_BIDIRECTIONAL (0x20)
419 #define TARGET_ASSIST_EXT_MSGFLAGS_MULTICAST (0x10)
420 #define TARGET_ASSIST_EXT_MSGFLAGS_SGL_OFFSET_CHAINS (0x08)
422 /* defines for the EEDPFlags field */
423 #define TARGET_ASSIST_EXT_EEDP_MASK_OP (0x0007)
424 #define TARGET_ASSIST_EXT_EEDP_NOOP_OP (0x0000)
425 #define TARGET_ASSIST_EXT_EEDP_CHK_OP (0x0001)
426 #define TARGET_ASSIST_EXT_EEDP_STRIP_OP (0x0002)
427 #define TARGET_ASSIST_EXT_EEDP_CHKRM_OP (0x0003)
428 #define TARGET_ASSIST_EXT_EEDP_INSERT_OP (0x0004)
429 #define TARGET_ASSIST_EXT_EEDP_REPLACE_OP (0x0006)
430 #define TARGET_ASSIST_EXT_EEDP_CHKREGEN_OP (0x0007)
432 #define TARGET_ASSIST_EXT_EEDP_PASS_REF_TAG (0x0008)
434 #define TARGET_ASSIST_EXT_EEDP_T10_CHK_MASK (0x0700)
435 #define TARGET_ASSIST_EXT_EEDP_T10_CHK_GUARD (0x0100)
436 #define TARGET_ASSIST_EXT_EEDP_T10_CHK_APPTAG (0x0200)
437 #define TARGET_ASSIST_EXT_EEDP_T10_CHK_REFTAG (0x0400)
438 #define TARGET_ASSIST_EXT_EEDP_T10_CHK_SHIFT (8)
440 #define TARGET_ASSIST_EXT_EEDP_INC_SEC_APPTAG (0x1000)
441 #define TARGET_ASSIST_EXT_EEDP_INC_PRI_APPTAG (0x2000)
442 #define TARGET_ASSIST_EXT_EEDP_INC_SEC_REFTAG (0x4000)
443 #define TARGET_ASSIST_EXT_EEDP_INC_PRI_REFTAG (0x8000)
446 /****************************************************************************/
447 /* Target Status Send Request */
448 /****************************************************************************/
450 typedef struct _MSG_TARGET_STATUS_SEND_REQUEST
452 U8 StatusCode; /* 00h */
453 U8 StatusFlags; /* 01h */
454 U8 ChainOffset; /* 02h */
455 U8 Function; /* 03h */
456 U16 QueueTag; /* 04h */
457 U8 Reserved; /* 06h */
458 U8 MsgFlags; /* 07h */
459 U32 MsgContext; /* 08h */
460 U32 ReplyWord; /* 0Ch */
461 U8 LUN[8]; /* 10h */
462 SGE_SIMPLE_UNION StatusDataSGE; /* 18h */
463 } MSG_TARGET_STATUS_SEND_REQUEST, MPI_POINTER PTR_MSG_TARGET_STATUS_SEND_REQUEST,
464 TargetStatusSendRequest_t, MPI_POINTER pTargetStatusSendRequest_t;
466 #define TARGET_STATUS_SEND_FLAGS_AUTO_GOOD_STATUS (0x01)
467 #define TARGET_STATUS_SEND_FLAGS_HIGH_PRIORITY (0x04)
468 #define TARGET_STATUS_SEND_FLAGS_CONFIRMED (0x08)
469 #define TARGET_STATUS_SEND_FLAGS_REPOST_CMD_BUFFER (0x80)
472 * NOTE: FCP_RSP data is big-endian. When used on a little-endian system, this
473 * structure properly orders the bytes.
475 typedef struct _MPI_TARGET_FCP_RSP_BUFFER
477 U8 Reserved0[8]; /* 00h */
478 U8 Reserved1[2]; /* 08h */
479 U8 FcpFlags; /* 0Ah */
480 U8 FcpStatus; /* 0Bh */
481 U32 FcpResid; /* 0Ch */
482 U32 FcpSenseLength; /* 10h */
483 U32 FcpResponseLength; /* 14h */
484 U8 FcpResponseData[8]; /* 18h */
485 U8 FcpSenseData[32]; /* Pad to 64 bytes */ /* 20h */
486 } MPI_TARGET_FCP_RSP_BUFFER, MPI_POINTER PTR_MPI_TARGET_FCP_RSP_BUFFER,
487 MpiTargetFcpRspBuffer, MPI_POINTER pMpiTargetFcpRspBuffer;
490 * NOTE: The SPI status IU is big-endian. When used on a little-endian system,
491 * this structure properly orders the bytes.
493 typedef struct _MPI_TARGET_SCSI_SPI_STATUS_IU
495 U8 Reserved0; /* 00h */
496 U8 Reserved1; /* 01h */
497 U8 Valid; /* 02h */
498 U8 Status; /* 03h */
499 U32 SenseDataListLength; /* 04h */
500 U32 PktFailuresListLength; /* 08h */
501 U8 SenseData[52]; /* Pad the IU to 64 bytes */ /* 0Ch */
502 } MPI_TARGET_SCSI_SPI_STATUS_IU, MPI_POINTER PTR_MPI_TARGET_SCSI_SPI_STATUS_IU,
503 TargetScsiSpiStatusIU_t, MPI_POINTER pTargetScsiSpiStatusIU_t;
506 * NOTE: The SSP status IU is big-endian. When used on a little-endian system,
507 * this structure properly orders the bytes.
509 typedef struct _MPI_TARGET_SSP_RSP_IU
511 U32 Reserved0[6]; /* reserved for SSP header */ /* 00h */
512 /* start of RESPONSE information unit */
513 U32 Reserved1; /* 18h */
514 U32 Reserved2; /* 1Ch */
515 U16 Reserved3; /* 20h */
516 U8 DataPres; /* lower 2 bits */ /* 22h */
517 U8 Status; /* 23h */
518 U32 Reserved4; /* 24h */
519 U32 SenseDataLength; /* 28h */
520 U32 ResponseDataLength; /* 2Ch */
521 U8 ResponseSenseData[4]; /* 30h */
522 } MPI_TARGET_SSP_RSP_IU, MPI_POINTER PTR_MPI_TARGET_SSP_RSP_IU,
523 MpiTargetSspRspIu_t, MPI_POINTER pMpiTargetSspRspIu_t;
526 /****************************************************************************/
527 /* Target Mode Abort Request */
528 /****************************************************************************/
530 typedef struct _MSG_TARGET_MODE_ABORT_REQUEST
532 U8 AbortType; /* 00h */
533 U8 Reserved; /* 01h */
534 U8 ChainOffset; /* 02h */
535 U8 Function; /* 03h */
536 U16 Reserved1; /* 04h */
537 U8 Reserved2; /* 06h */
538 U8 MsgFlags; /* 07h */
539 U32 MsgContext; /* 08h */
540 U32 ReplyWord; /* 0Ch */
541 U32 MsgContextToAbort; /* 10h */
542 } MSG_TARGET_MODE_ABORT, MPI_POINTER PTR_MSG_TARGET_MODE_ABORT,
543 TargetModeAbort_t, MPI_POINTER pTargetModeAbort_t;
545 #define TARGET_MODE_ABORT_TYPE_ALL_CMD_BUFFERS (0x00)
546 #define TARGET_MODE_ABORT_TYPE_ALL_IO (0x01)
547 #define TARGET_MODE_ABORT_TYPE_EXACT_IO (0x02)
548 #define TARGET_MODE_ABORT_TYPE_EXACT_IO_REQUEST (0x03)
550 /* Target Mode Abort Reply */
552 typedef struct _MSG_TARGET_MODE_ABORT_REPLY
554 U16 Reserved; /* 00h */
555 U8 MsgLength; /* 02h */
556 U8 Function; /* 03h */
557 U16 Reserved1; /* 04h */
558 U8 Reserved2; /* 06h */
559 U8 MsgFlags; /* 07h */
560 U32 MsgContext; /* 08h */
561 U16 Reserved3; /* 0Ch */
562 U16 IOCStatus; /* 0Eh */
563 U32 IOCLogInfo; /* 10h */
564 U32 AbortCount; /* 14h */
565 } MSG_TARGET_MODE_ABORT_REPLY, MPI_POINTER PTR_MSG_TARGET_MODE_ABORT_REPLY,
566 TargetModeAbortReply_t, MPI_POINTER pTargetModeAbortReply_t;
569 /****************************************************************************/
570 /* Target Mode Context Reply */
571 /****************************************************************************/
573 #define TARGET_MODE_REPLY_IO_INDEX_MASK (0x00003FFF)
574 #define TARGET_MODE_REPLY_IO_INDEX_SHIFT (0)
575 #define TARGET_MODE_REPLY_INITIATOR_INDEX_MASK (0x03FFC000)
576 #define TARGET_MODE_REPLY_INITIATOR_INDEX_SHIFT (14)
577 #define TARGET_MODE_REPLY_ALIAS_MASK (0x04000000)
578 #define TARGET_MODE_REPLY_ALIAS_SHIFT (26)
579 #define TARGET_MODE_REPLY_PORT_MASK (0x10000000)
580 #define TARGET_MODE_REPLY_PORT_SHIFT (28)
583 #define GET_IO_INDEX(x) (((x) & TARGET_MODE_REPLY_IO_INDEX_MASK) \
584 >> TARGET_MODE_REPLY_IO_INDEX_SHIFT)
586 #define SET_IO_INDEX(t, i) \
587 ((t) = ((t) & ~TARGET_MODE_REPLY_IO_INDEX_MASK) | \
588 (((i) << TARGET_MODE_REPLY_IO_INDEX_SHIFT) & \
589 TARGET_MODE_REPLY_IO_INDEX_MASK))
591 #define GET_INITIATOR_INDEX(x) (((x) & TARGET_MODE_REPLY_INITIATOR_INDEX_MASK) \
592 >> TARGET_MODE_REPLY_INITIATOR_INDEX_SHIFT)
594 #define SET_INITIATOR_INDEX(t, ii) \
595 ((t) = ((t) & ~TARGET_MODE_REPLY_INITIATOR_INDEX_MASK) | \
596 (((ii) << TARGET_MODE_REPLY_INITIATOR_INDEX_SHIFT) & \
597 TARGET_MODE_REPLY_INITIATOR_INDEX_MASK))
599 #define GET_ALIAS(x) (((x) & TARGET_MODE_REPLY_ALIAS_MASK) \
600 >> TARGET_MODE_REPLY_ALIAS_SHIFT)
602 #define SET_ALIAS(t, a) ((t) = ((t) & ~TARGET_MODE_REPLY_ALIAS_MASK) | \
603 (((a) << TARGET_MODE_REPLY_ALIAS_SHIFT) & \
604 TARGET_MODE_REPLY_ALIAS_MASK))
606 #define GET_PORT(x) (((x) & TARGET_MODE_REPLY_PORT_MASK) \
607 >> TARGET_MODE_REPLY_PORT_SHIFT)
609 #define SET_PORT(t, p) ((t) = ((t) & ~TARGET_MODE_REPLY_PORT_MASK) | \
610 (((p) << TARGET_MODE_REPLY_PORT_SHIFT) & \
611 TARGET_MODE_REPLY_PORT_MASK))
613 /* the following obsolete values are for MPI v1.0 support */
614 #define TARGET_MODE_REPLY_0100_MASK_HOST_INDEX (0x000003FF)
615 #define TARGET_MODE_REPLY_0100_SHIFT_HOST_INDEX (0)
616 #define TARGET_MODE_REPLY_0100_MASK_IOC_INDEX (0x001FF800)
617 #define TARGET_MODE_REPLY_0100_SHIFT_IOC_INDEX (11)
618 #define TARGET_MODE_REPLY_0100_PORT_MASK (0x00400000)
619 #define TARGET_MODE_REPLY_0100_PORT_SHIFT (22)
620 #define TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX (0x1F800000)
621 #define TARGET_MODE_REPLY_0100_SHIFT_INITIATOR_INDEX (23)
623 #define GET_HOST_INDEX_0100(x) (((x) & TARGET_MODE_REPLY_0100_MASK_HOST_INDEX) \
624 >> TARGET_MODE_REPLY_0100_SHIFT_HOST_INDEX)
626 #define SET_HOST_INDEX_0100(t, hi) \
627 ((t) = ((t) & ~TARGET_MODE_REPLY_0100_MASK_HOST_INDEX) | \
628 (((hi) << TARGET_MODE_REPLY_0100_SHIFT_HOST_INDEX) & \
629 TARGET_MODE_REPLY_0100_MASK_HOST_INDEX))
631 #define GET_IOC_INDEX_0100(x) (((x) & TARGET_MODE_REPLY_0100_MASK_IOC_INDEX) \
632 >> TARGET_MODE_REPLY_0100_SHIFT_IOC_INDEX)
634 #define SET_IOC_INDEX_0100(t, ii) \
635 ((t) = ((t) & ~TARGET_MODE_REPLY_0100_MASK_IOC_INDEX) | \
636 (((ii) << TARGET_MODE_REPLY_0100_SHIFT_IOC_INDEX) & \
637 TARGET_MODE_REPLY_0100_MASK_IOC_INDEX))
639 #define GET_INITIATOR_INDEX_0100(x) \
640 (((x) & TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX) \
641 >> TARGET_MODE_REPLY_0100_SHIFT_INITIATOR_INDEX)
643 #define SET_INITIATOR_INDEX_0100(t, ii) \
644 ((t) = ((t) & ~TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX) | \
645 (((ii) << TARGET_MODE_REPLY_0100_SHIFT_INITIATOR_INDEX) & \
646 TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX))
649 #endif