2 * linux/drivers/mtd/maps/pci.c
4 * Copyright (C) 2001 Russell King, All rights reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * Generic PCI memory map driver. We support the following boards:
11 * - Intel IQ80310 ATU.
12 * - Intel EBSA285 (blank rom programming mode). Tested working 27/09/2001
14 #include <linux/module.h>
15 #include <linux/kernel.h>
16 #include <linux/pci.h>
17 #include <linux/init.h>
18 #include <linux/slab.h>
20 #include <linux/mtd/mtd.h>
21 #include <linux/mtd/map.h>
22 #include <linux/mtd/partitions.h>
27 int (*init
)(struct pci_dev
*dev
, struct map_pci_info
*map
);
28 void (*exit
)(struct pci_dev
*dev
, struct map_pci_info
*map
);
29 unsigned long (*translate
)(struct map_pci_info
*map
, unsigned long ofs
);
36 void (*exit
)(struct pci_dev
*dev
, struct map_pci_info
*map
);
37 unsigned long (*translate
)(struct map_pci_info
*map
, unsigned long ofs
);
41 static map_word
mtd_pci_read8(struct map_info
*_map
, unsigned long ofs
)
43 struct map_pci_info
*map
= (struct map_pci_info
*)_map
;
45 val
.x
[0]= readb(map
->base
+ map
->translate(map
, ofs
));
46 // printk("read8 : %08lx => %02x\n", ofs, val.x[0]);
51 static map_word
mtd_pci_read16(struct map_info
*_map
, unsigned long ofs
)
53 struct map_pci_info
*map
= (struct map_pci_info
*)_map
;
55 val
.x
[0] = readw(map
->base
+ map
->translate(map
, ofs
));
56 // printk("read16: %08lx => %04x\n", ofs, val.x[0]);
60 static map_word
mtd_pci_read32(struct map_info
*_map
, unsigned long ofs
)
62 struct map_pci_info
*map
= (struct map_pci_info
*)_map
;
64 val
.x
[0] = readl(map
->base
+ map
->translate(map
, ofs
));
65 // printk("read32: %08lx => %08x\n", ofs, val.x[0]);
69 static void mtd_pci_copyfrom(struct map_info
*_map
, void *to
, unsigned long from
, ssize_t len
)
71 struct map_pci_info
*map
= (struct map_pci_info
*)_map
;
72 memcpy_fromio(to
, map
->base
+ map
->translate(map
, from
), len
);
75 static void mtd_pci_write8(struct map_info
*_map
, map_word val
, unsigned long ofs
)
77 struct map_pci_info
*map
= (struct map_pci_info
*)_map
;
78 // printk("write8 : %08lx <= %02x\n", ofs, val.x[0]);
79 writeb(val
.x
[0], map
->base
+ map
->translate(map
, ofs
));
83 static void mtd_pci_write16(struct map_info
*_map
, map_word val
, unsigned long ofs
)
85 struct map_pci_info
*map
= (struct map_pci_info
*)_map
;
86 // printk("write16: %08lx <= %04x\n", ofs, val.x[0]);
87 writew(val
.x
[0], map
->base
+ map
->translate(map
, ofs
));
90 static void mtd_pci_write32(struct map_info
*_map
, map_word val
, unsigned long ofs
)
92 struct map_pci_info
*map
= (struct map_pci_info
*)_map
;
93 // printk("write32: %08lx <= %08x\n", ofs, val.x[0]);
94 writel(val
.x
[0], map
->base
+ map
->translate(map
, ofs
));
97 static void mtd_pci_copyto(struct map_info
*_map
, unsigned long to
, const void *from
, ssize_t len
)
99 struct map_pci_info
*map
= (struct map_pci_info
*)_map
;
100 memcpy_toio(map
->base
+ map
->translate(map
, to
), from
, len
);
103 static const struct map_info mtd_pci_map
= {
105 .copy_from
= mtd_pci_copyfrom
,
106 .copy_to
= mtd_pci_copyto
,
110 * Intel IOP80310 Flash driver
114 intel_iq80310_init(struct pci_dev
*dev
, struct map_pci_info
*map
)
118 map
->map
.bankwidth
= 1;
119 map
->map
.read
= mtd_pci_read8
,
120 map
->map
.write
= mtd_pci_write8
,
122 map
->map
.size
= 0x00800000;
123 map
->base
= ioremap_nocache(pci_resource_start(dev
, 0),
124 pci_resource_len(dev
, 0));
130 * We want to base the memory window at Xscale
131 * bus address 0, not 0x1000.
133 pci_read_config_dword(dev
, 0x44, &win_base
);
134 pci_write_config_dword(dev
, 0x44, 0);
136 map
->map
.map_priv_2
= win_base
;
142 intel_iq80310_exit(struct pci_dev
*dev
, struct map_pci_info
*map
)
146 pci_write_config_dword(dev
, 0x44, map
->map
.map_priv_2
);
150 intel_iq80310_translate(struct map_pci_info
*map
, unsigned long ofs
)
152 unsigned long page_addr
= ofs
& 0x00400000;
155 * This mundges the flash location so we avoid
156 * the first 80 bytes (they appear to read nonsense).
159 writel(0x00000008, map
->base
+ 0x1558);
160 writel(0x00000000, map
->base
+ 0x1550);
162 writel(0x00000007, map
->base
+ 0x1558);
163 writel(0x00800000, map
->base
+ 0x1550);
170 static struct mtd_pci_info intel_iq80310_info
= {
171 .init
= intel_iq80310_init
,
172 .exit
= intel_iq80310_exit
,
173 .translate
= intel_iq80310_translate
,
174 .map_name
= "cfi_probe",
178 * Intel DC21285 driver
182 intel_dc21285_init(struct pci_dev
*dev
, struct map_pci_info
*map
)
184 unsigned long base
, len
;
186 base
= pci_resource_start(dev
, PCI_ROM_RESOURCE
);
187 len
= pci_resource_len(dev
, PCI_ROM_RESOURCE
);
193 base
= pci_resource_start(dev
, 2);
194 len
= pci_resource_len(dev
, 2);
197 * We need to re-allocate PCI BAR2 address range to the
198 * PCI ROM BAR, and disable PCI BAR2.
202 * Hmm, if an address was allocated to the ROM resource, but
203 * not enabled, should we be allocating a new resource for it
204 * or simply enabling it?
207 printk("%s: enabling expansion ROM\n", pci_name(dev
));
213 map
->map
.bankwidth
= 4;
214 map
->map
.read
= mtd_pci_read32
,
215 map
->map
.write
= mtd_pci_write32
,
217 map
->base
= ioremap_nocache(base
, len
);
226 intel_dc21285_exit(struct pci_dev
*dev
, struct map_pci_info
*map
)
232 * We need to undo the PCI BAR2/PCI ROM BAR address alteration.
234 pci_disable_rom(dev
);
238 intel_dc21285_translate(struct map_pci_info
*map
, unsigned long ofs
)
240 return ofs
& 0x00ffffc0 ? ofs
: (ofs
^ (1 << 5));
243 static struct mtd_pci_info intel_dc21285_info
= {
244 .init
= intel_dc21285_init
,
245 .exit
= intel_dc21285_exit
,
246 .translate
= intel_dc21285_translate
,
247 .map_name
= "jedec_probe",
251 * PCI device ID table
254 static struct pci_device_id mtd_pci_ids
[] = {
256 .vendor
= PCI_VENDOR_ID_INTEL
,
258 .subvendor
= PCI_ANY_ID
,
259 .subdevice
= PCI_ANY_ID
,
260 .class = PCI_CLASS_MEMORY_OTHER
<< 8,
261 .class_mask
= 0xffff00,
262 .driver_data
= (unsigned long)&intel_iq80310_info
,
265 .vendor
= PCI_VENDOR_ID_DEC
,
266 .device
= PCI_DEVICE_ID_DEC_21285
,
267 .subvendor
= 0, /* DC21285 defaults to 0 on reset */
268 .subdevice
= 0, /* DC21285 defaults to 0 on reset */
269 .driver_data
= (unsigned long)&intel_dc21285_info
,
275 * Generic code follows.
279 mtd_pci_probe(struct pci_dev
*dev
, const struct pci_device_id
*id
)
281 struct mtd_pci_info
*info
= (struct mtd_pci_info
*)id
->driver_data
;
282 struct map_pci_info
*map
= NULL
;
283 struct mtd_info
*mtd
= NULL
;
286 err
= pci_enable_device(dev
);
290 err
= pci_request_regions(dev
, "pci mtd");
294 map
= kmalloc(sizeof(*map
), GFP_KERNEL
);
299 map
->map
= mtd_pci_map
;
300 map
->map
.name
= pci_name(dev
);
302 map
->exit
= info
->exit
;
303 map
->translate
= info
->translate
;
305 err
= info
->init(dev
, map
);
309 /* tsk - do_map_probe should take const char * */
310 mtd
= do_map_probe((char *)info
->map_name
, &map
->map
);
315 mtd
->owner
= THIS_MODULE
;
318 pci_set_drvdata(dev
, mtd
);
328 pci_release_regions(dev
);
333 static void __devexit
334 mtd_pci_remove(struct pci_dev
*dev
)
336 struct mtd_info
*mtd
= pci_get_drvdata(dev
);
337 struct map_pci_info
*map
= mtd
->priv
;
344 pci_set_drvdata(dev
, NULL
);
345 pci_release_regions(dev
);
348 static struct pci_driver mtd_pci_driver
= {
350 .probe
= mtd_pci_probe
,
351 .remove
= __devexit_p(mtd_pci_remove
),
352 .id_table
= mtd_pci_ids
,
355 static int __init
mtd_pci_maps_init(void)
357 return pci_register_driver(&mtd_pci_driver
);
360 static void __exit
mtd_pci_maps_exit(void)
362 pci_unregister_driver(&mtd_pci_driver
);
365 module_init(mtd_pci_maps_init
);
366 module_exit(mtd_pci_maps_exit
);
368 MODULE_LICENSE("GPL");
369 MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
370 MODULE_DESCRIPTION("Generic PCI map driver");
371 MODULE_DEVICE_TABLE(pci
, mtd_pci_ids
);