drivers/usb/otg/twl4030-usb.c

   1 /*
   2  * twl4030_usb - TWL4030 USB transceiver, talking to OMAP OTG controller
   3  *
   4  * Copyright (C) 2004-2007 Texas Instruments
   5  * Copyright (C) 2008 Nokia Corporation
   6  * Contact: Felipe Balbi <felipe.balbi@nokia.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  *
  22  * Current status:
  23  *      - HS USB ULPI mode works.
  24  *      - 3-pin mode support may be added in future.
  25  */
  26
  27 #include <linux/module.h>
  28 #include <linux/init.h>
  29 #include <linux/interrupt.h>
  30 #include <linux/platform_device.h>
  31 #include <linux/spinlock.h>
  32 #include <linux/workqueue.h>
  33 #include <linux/io.h>
  34 #include <linux/delay.h>
  35 #include <linux/usb/otg.h>
  36 #include <linux/i2c/twl4030.h>
  37 #include <linux/regulator/consumer.h>
  38 #include <linux/err.h>
  39
  40
  41 /* Register defines */
  42
  43 #define VENDOR_ID_LO                    0x00
  44 #define VENDOR_ID_HI                    0x01
  45 #define PRODUCT_ID_LO                   0x02
  46 #define PRODUCT_ID_HI                   0x03
  47
  48 #define FUNC_CTRL                       0x04
  49 #define FUNC_CTRL_SET                   0x05
  50 #define FUNC_CTRL_CLR                   0x06
  51 #define FUNC_CTRL_SUSPENDM              (1 << 6)
  52 #define FUNC_CTRL_RESET                 (1 << 5)
  53 #define FUNC_CTRL_OPMODE_MASK           (3 << 3) /* bits 3 and 4 */
  54 #define FUNC_CTRL_OPMODE_NORMAL         (0 << 3)
  55 #define FUNC_CTRL_OPMODE_NONDRIVING     (1 << 3)
  56 #define FUNC_CTRL_OPMODE_DISABLE_BIT_NRZI       (2 << 3)
  57 #define FUNC_CTRL_TERMSELECT            (1 << 2)
  58 #define FUNC_CTRL_XCVRSELECT_MASK       (3 << 0) /* bits 0 and 1 */
  59 #define FUNC_CTRL_XCVRSELECT_HS         (0 << 0)
  60 #define FUNC_CTRL_XCVRSELECT_FS         (1 << 0)
  61 #define FUNC_CTRL_XCVRSELECT_LS         (2 << 0)
  62 #define FUNC_CTRL_XCVRSELECT_FS4LS      (3 << 0)
  63
  64 #define IFC_CTRL                        0x07
  65 #define IFC_CTRL_SET                    0x08
  66 #define IFC_CTRL_CLR                    0x09
  67 #define IFC_CTRL_INTERFACE_PROTECT_DISABLE      (1 << 7)
  68 #define IFC_CTRL_AUTORESUME             (1 << 4)
  69 #define IFC_CTRL_CLOCKSUSPENDM          (1 << 3)
  70 #define IFC_CTRL_CARKITMODE             (1 << 2)
  71 #define IFC_CTRL_FSLSSERIALMODE_3PIN    (1 << 1)
  72
  73 #define TWL4030_OTG_CTRL                0x0A
  74 #define TWL4030_OTG_CTRL_SET            0x0B
  75 #define TWL4030_OTG_CTRL_CLR            0x0C
  76 #define TWL4030_OTG_CTRL_DRVVBUS        (1 << 5)
  77 #define TWL4030_OTG_CTRL_CHRGVBUS       (1 << 4)
  78 #define TWL4030_OTG_CTRL_DISCHRGVBUS    (1 << 3)
  79 #define TWL4030_OTG_CTRL_DMPULLDOWN     (1 << 2)
  80 #define TWL4030_OTG_CTRL_DPPULLDOWN     (1 << 1)
  81 #define TWL4030_OTG_CTRL_IDPULLUP       (1 << 0)
  82
  83 #define USB_INT_EN_RISE                 0x0D
  84 #define USB_INT_EN_RISE_SET             0x0E
  85 #define USB_INT_EN_RISE_CLR             0x0F
  86 #define USB_INT_EN_FALL                 0x10
  87 #define USB_INT_EN_FALL_SET             0x11
  88 #define USB_INT_EN_FALL_CLR             0x12
  89 #define USB_INT_STS                     0x13
  90 #define USB_INT_LATCH                   0x14
  91 #define USB_INT_IDGND                   (1 << 4)
  92 #define USB_INT_SESSEND                 (1 << 3)
  93 #define USB_INT_SESSVALID               (1 << 2)
  94 #define USB_INT_VBUSVALID               (1 << 1)
  95 #define USB_INT_HOSTDISCONNECT          (1 << 0)
  96
  97 #define CARKIT_CTRL                     0x19
  98 #define CARKIT_CTRL_SET                 0x1A
  99 #define CARKIT_CTRL_CLR                 0x1B
 100 #define CARKIT_CTRL_MICEN               (1 << 6)
 101 #define CARKIT_CTRL_SPKRIGHTEN          (1 << 5)
 102 #define CARKIT_CTRL_SPKLEFTEN           (1 << 4)
 103 #define CARKIT_CTRL_RXDEN               (1 << 3)
 104 #define CARKIT_CTRL_TXDEN               (1 << 2)
 105 #define CARKIT_CTRL_IDGNDDRV            (1 << 1)
 106 #define CARKIT_CTRL_CARKITPWR           (1 << 0)
 107 #define CARKIT_PLS_CTRL                 0x22
 108 #define CARKIT_PLS_CTRL_SET             0x23
 109 #define CARKIT_PLS_CTRL_CLR             0x24
 110 #define CARKIT_PLS_CTRL_SPKRRIGHT_BIASEN        (1 << 3)
 111 #define CARKIT_PLS_CTRL_SPKRLEFT_BIASEN (1 << 2)
 112 #define CARKIT_PLS_CTRL_RXPLSEN         (1 << 1)
 113 #define CARKIT_PLS_CTRL_TXPLSEN         (1 << 0)
 114
 115 #define MCPC_CTRL                       0x30
 116 #define MCPC_CTRL_SET                   0x31
 117 #define MCPC_CTRL_CLR                   0x32
 118 #define MCPC_CTRL_RTSOL                 (1 << 7)
 119 #define MCPC_CTRL_EXTSWR                (1 << 6)
 120 #define MCPC_CTRL_EXTSWC                (1 << 5)
 121 #define MCPC_CTRL_VOICESW               (1 << 4)
 122 #define MCPC_CTRL_OUT64K                (1 << 3)
 123 #define MCPC_CTRL_RTSCTSSW              (1 << 2)
 124 #define MCPC_CTRL_HS_UART               (1 << 0)
 125
 126 #define MCPC_IO_CTRL                    0x33
 127 #define MCPC_IO_CTRL_SET                0x34
 128 #define MCPC_IO_CTRL_CLR                0x35
 129 #define MCPC_IO_CTRL_MICBIASEN          (1 << 5)
 130 #define MCPC_IO_CTRL_CTS_NPU            (1 << 4)
 131 #define MCPC_IO_CTRL_RXD_PU             (1 << 3)
 132 #define MCPC_IO_CTRL_TXDTYP             (1 << 2)
 133 #define MCPC_IO_CTRL_CTSTYP             (1 << 1)
 134 #define MCPC_IO_CTRL_RTSTYP             (1 << 0)
 135
 136 #define MCPC_CTRL2                      0x36
 137 #define MCPC_CTRL2_SET                  0x37
 138 #define MCPC_CTRL2_CLR                  0x38
 139 #define MCPC_CTRL2_MCPC_CK_EN           (1 << 0)
 140
 141 #define OTHER_FUNC_CTRL                 0x80
 142 #define OTHER_FUNC_CTRL_SET             0x81
 143 #define OTHER_FUNC_CTRL_CLR             0x82
 144 #define OTHER_FUNC_CTRL_BDIS_ACON_EN    (1 << 4)
 145 #define OTHER_FUNC_CTRL_FIVEWIRE_MODE   (1 << 2)
 146
 147 #define OTHER_IFC_CTRL                  0x83
 148 #define OTHER_IFC_CTRL_SET              0x84
 149 #define OTHER_IFC_CTRL_CLR              0x85
 150 #define OTHER_IFC_CTRL_OE_INT_EN        (1 << 6)
 151 #define OTHER_IFC_CTRL_CEA2011_MODE     (1 << 5)
 152 #define OTHER_IFC_CTRL_FSLSSERIALMODE_4PIN      (1 << 4)
 153 #define OTHER_IFC_CTRL_HIZ_ULPI_60MHZ_OUT       (1 << 3)
 154 #define OTHER_IFC_CTRL_HIZ_ULPI         (1 << 2)
 155 #define OTHER_IFC_CTRL_ALT_INT_REROUTE  (1 << 0)
 156
 157 #define OTHER_INT_EN_RISE               0x86
 158 #define OTHER_INT_EN_RISE_SET           0x87
 159 #define OTHER_INT_EN_RISE_CLR           0x88
 160 #define OTHER_INT_EN_FALL               0x89
 161 #define OTHER_INT_EN_FALL_SET           0x8A
 162 #define OTHER_INT_EN_FALL_CLR           0x8B
 163 #define OTHER_INT_STS                   0x8C
 164 #define OTHER_INT_LATCH                 0x8D
 165 #define OTHER_INT_VB_SESS_VLD           (1 << 7)
 166 #define OTHER_INT_DM_HI                 (1 << 6) /* not valid for "latch" reg */
 167 #define OTHER_INT_DP_HI                 (1 << 5) /* not valid for "latch" reg */
 168 #define OTHER_INT_BDIS_ACON             (1 << 3) /* not valid for "fall" regs */
 169 #define OTHER_INT_MANU                  (1 << 1)
 170 #define OTHER_INT_ABNORMAL_STRESS       (1 << 0)
 171
 172 #define ID_STATUS                       0x96
 173 #define ID_RES_FLOAT                    (1 << 4)
 174 #define ID_RES_440K                     (1 << 3)
 175 #define ID_RES_200K                     (1 << 2)
 176 #define ID_RES_102K                     (1 << 1)
 177 #define ID_RES_GND                      (1 << 0)
 178
 179 #define POWER_CTRL                      0xAC
 180 #define POWER_CTRL_SET                  0xAD
 181 #define POWER_CTRL_CLR                  0xAE
 182 #define POWER_CTRL_OTG_ENAB             (1 << 5)
 183
 184 #define OTHER_IFC_CTRL2                 0xAF
 185 #define OTHER_IFC_CTRL2_SET             0xB0
 186 #define OTHER_IFC_CTRL2_CLR             0xB1
 187 #define OTHER_IFC_CTRL2_ULPI_STP_LOW    (1 << 4)
 188 #define OTHER_IFC_CTRL2_ULPI_TXEN_POL   (1 << 3)
 189 #define OTHER_IFC_CTRL2_ULPI_4PIN_2430  (1 << 2)
 190 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_MASK     (3 << 0) /* bits 0 and 1 */
 191 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT1N    (0 << 0)
 192 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT2N    (1 << 0)
 193
 194 #define REG_CTRL_EN                     0xB2
 195 #define REG_CTRL_EN_SET                 0xB3
 196 #define REG_CTRL_EN_CLR                 0xB4
 197 #define REG_CTRL_ERROR                  0xB5
 198 #define ULPI_I2C_CONFLICT_INTEN         (1 << 0)
 199
 200 #define OTHER_FUNC_CTRL2                0xB8
 201 #define OTHER_FUNC_CTRL2_SET            0xB9
 202 #define OTHER_FUNC_CTRL2_CLR            0xBA
 203 #define OTHER_FUNC_CTRL2_VBAT_TIMER_EN  (1 << 0)
 204
 205 /* following registers do not have separate _clr and _set registers */
 206 #define VBUS_DEBOUNCE                   0xC0
 207 #define ID_DEBOUNCE                     0xC1
 208 #define VBAT_TIMER                      0xD3
 209 #define PHY_PWR_CTRL                    0xFD
 210 #define PHY_PWR_PHYPWD                  (1 << 0)
 211 #define PHY_CLK_CTRL                    0xFE
 212 #define PHY_CLK_CTRL_CLOCKGATING_EN     (1 << 2)
 213 #define PHY_CLK_CTRL_CLK32K_EN          (1 << 1)
 214 #define REQ_PHY_DPLL_CLK                (1 << 0)
 215 #define PHY_CLK_CTRL_STS                0xFF
 216 #define PHY_DPLL_CLK                    (1 << 0)
 217
 218 /* In module TWL4030_MODULE_PM_MASTER */
 219 #define PROTECT_KEY                     0x0E
 220
 221 /* In module TWL4030_MODULE_PM_RECEIVER */
 222 #define VUSB_DEDICATED1                 0x7D
 223 #define VUSB_DEDICATED2                 0x7E
 224 #define VUSB1V5_DEV_GRP                 0x71
 225 #define VUSB1V5_TYPE                    0x72
 226 #define VUSB1V5_REMAP                   0x73
 227 #define VUSB1V8_DEV_GRP                 0x74
 228 #define VUSB1V8_TYPE                    0x75
 229 #define VUSB1V8_REMAP                   0x76
 230 #define VUSB3V1_DEV_GRP                 0x77
 231 #define VUSB3V1_TYPE                    0x78
 232 #define VUSB3V1_REMAP                   0x79
 233
 234 /* In module TWL4030_MODULE_INTBR */
 235 #define PMBR1                           0x0D
 236 #define GPIO_USB_4PIN_ULPI_2430C        (3 << 0)
 237
 238
 239
 240 enum linkstat {
 241         USB_LINK_UNKNOWN = 0,
 242         USB_LINK_NONE,
 243         USB_LINK_VBUS,
 244         USB_LINK_ID,
 245 };
 246
 247 struct twl4030_usb {
 248         struct otg_transceiver  otg;
 249         struct device           *dev;
 250
 251         /* TWL4030 internal USB regulator supplies */
 252         struct regulator        *usb1v5;
 253         struct regulator        *usb1v8;
 254         struct regulator        *usb3v1;
 255
 256         /* for vbus reporting with irqs disabled */
 257         spinlock_t              lock;
 258
 259         /* pin configuration */
 260         enum twl4030_usb_mode   usb_mode;
 261
 262         int                     irq;
 263         u8                      linkstat;
 264         u8                      asleep;
 265         bool                    irq_enabled;
 266 };
 267
 268 /* internal define on top of container_of */
 269 #define xceiv_to_twl(x)         container_of((x), struct twl4030_usb, otg);
 270
 271 /*-------------------------------------------------------------------------*/
 272
 273 static int twl4030_i2c_write_u8_verify(struct twl4030_usb *twl,
 274                 u8 module, u8 data, u8 address)
 275 {
 276         u8 check;
 277
 278         if ((twl4030_i2c_write_u8(module, data, address) >= 0) &&
 279             (twl4030_i2c_read_u8(module, &check, address) >= 0) &&
 280                                                 (check == data))
 281                 return 0;
 282         dev_dbg(twl->dev, "Write%d[%d,0x%x] wrote %02x but read %02x\n",
 283                         1, module, address, check, data);
 284
 285         /* Failed once: Try again */
 286         if ((twl4030_i2c_write_u8(module, data, address) >= 0) &&
 287             (twl4030_i2c_read_u8(module, &check, address) >= 0) &&
 288                                                 (check == data))
 289                 return 0;
 290         dev_dbg(twl->dev, "Write%d[%d,0x%x] wrote %02x but read %02x\n",
 291                         2, module, address, check, data);
 292
 293         /* Failed again: Return error */
 294         return -EBUSY;
 295 }
 296
 297 #define twl4030_usb_write_verify(twl, address, data)    \
 298         twl4030_i2c_write_u8_verify(twl, TWL4030_MODULE_USB, (data), (address))
 299
 300 static inline int twl4030_usb_write(struct twl4030_usb *twl,
 301                 u8 address, u8 data)
 302 {
 303         int ret = 0;
 304
 305         ret = twl4030_i2c_write_u8(TWL4030_MODULE_USB, data, address);
 306         if (ret < 0)
 307                 dev_dbg(twl->dev,
 308                         "TWL4030:USB:Write[0x%x] Error %d\n", address, ret);
 309         return ret;
 310 }
 311
 312 static inline int twl4030_readb(struct twl4030_usb *twl, u8 module, u8 address)
 313 {
 314         u8 data;
 315         int ret = 0;
 316
 317         ret = twl4030_i2c_read_u8(module, &data, address);
 318         if (ret >= 0)
 319                 ret = data;
 320         else
 321                 dev_dbg(twl->dev,
 322                         "TWL4030:readb[0x%x,0x%x] Error %d\n",
 323                                         module, address, ret);
 324
 325         return ret;
 326 }
 327
 328 static inline int twl4030_usb_read(struct twl4030_usb *twl, u8 address)
 329 {
 330         return twl4030_readb(twl, TWL4030_MODULE_USB, address);
 331 }
 332
 333 /*-------------------------------------------------------------------------*/
 334
 335 static inline int
 336 twl4030_usb_set_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
 337 {
 338         return twl4030_usb_write(twl, reg + 1, bits);
 339 }
 340
 341 static inline int
 342 twl4030_usb_clear_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
 343 {
 344         return twl4030_usb_write(twl, reg + 2, bits);
 345 }
 346
 347 /*-------------------------------------------------------------------------*/
 348
 349 static enum linkstat twl4030_usb_linkstat(struct twl4030_usb *twl)
 350 {
 351         int     status;
 352         int     linkstat = USB_LINK_UNKNOWN;
 353
 354         /* STS_HW_CONDITIONS */
 355         status = twl4030_readb(twl, TWL4030_MODULE_PM_MASTER, 0x0f);
 356         if (status < 0)
 357                 dev_err(twl->dev, "USB link status err %d\n", status);
 358         else if (status & BIT(7))
 359                 linkstat = USB_LINK_VBUS;
 360         else if (status & BIT(2))
 361                 linkstat = USB_LINK_ID;
 362         else
 363                 linkstat = USB_LINK_NONE;
 364
 365         dev_dbg(twl->dev, "HW_CONDITIONS 0x%02x/%d; link %d\n",
 366                         status, status, linkstat);
 367
 368         /* REVISIT this assumes host and peripheral controllers
 369          * are registered, and that both are active...
 370          */
 371
 372         spin_lock_irq(&twl->lock);
 373         twl->linkstat = linkstat;
 374         if (linkstat == USB_LINK_ID) {
 375                 twl->otg.default_a = true;
 376                 twl->otg.state = OTG_STATE_A_IDLE;
 377         } else {
 378                 twl->otg.default_a = false;
 379                 twl->otg.state = OTG_STATE_B_IDLE;
 380         }
 381         spin_unlock_irq(&twl->lock);
 382
 383         return linkstat;
 384 }
 385
 386 static void twl4030_usb_set_mode(struct twl4030_usb *twl, int mode)
 387 {
 388         twl->usb_mode = mode;
 389
 390         switch (mode) {
 391         case T2_USB_MODE_ULPI:
 392                 twl4030_usb_clear_bits(twl, IFC_CTRL, IFC_CTRL_CARKITMODE);
 393                 twl4030_usb_set_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
 394                 twl4030_usb_clear_bits(twl, FUNC_CTRL,
 395                                         FUNC_CTRL_XCVRSELECT_MASK |
 396                                         FUNC_CTRL_OPMODE_MASK);
 397                 break;
 398         case -1:
 399                 /* FIXME: power on defaults */
 400                 break;
 401         default:
 402                 dev_err(twl->dev, "unsupported T2 transceiver mode %d\n",
 403                                 mode);
 404                 break;
 405         };
 406 }
 407
 408 static void twl4030_i2c_access(struct twl4030_usb *twl, int on)
 409 {
 410         unsigned long timeout;
 411         int val = twl4030_usb_read(twl, PHY_CLK_CTRL);
 412
 413         if (val >= 0) {
 414                 if (on) {
 415                         /* enable DPLL to access PHY registers over I2C */
 416                         val |= REQ_PHY_DPLL_CLK;
 417                         WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL,
 418                                                 (u8)val) < 0);
 419
 420                         timeout = jiffies + HZ;
 421                         while (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) &
 422                                                         PHY_DPLL_CLK)
 423                                 && time_before(jiffies, timeout))
 424                                         udelay(10);
 425                         if (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) &
 426                                                         PHY_DPLL_CLK))
 427                                 dev_err(twl->dev, "Timeout setting T2 HSUSB "
 428                                                 "PHY DPLL clock\n");
 429                 } else {
 430                         /* let ULPI control the DPLL clock */
 431                         val &= ~REQ_PHY_DPLL_CLK;
 432                         WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL,
 433                                                 (u8)val) < 0);
 434                 }
 435         }
 436 }
 437
 438 static void twl4030_phy_power(struct twl4030_usb *twl, int on)
 439 {
 440         u8 pwr;
 441
 442         pwr = twl4030_usb_read(twl, PHY_PWR_CTRL);
 443         if (on) {
 444                 regulator_enable(twl->usb3v1);
 445                 regulator_enable(twl->usb1v8);
 446                 /*
 447                  * Disabling usb3v1 regulator (= writing 0 to VUSB3V1_DEV_GRP
 448                  * in twl4030) resets the VUSB_DEDICATED2 register. This reset
 449                  * enables VUSB3V1_SLEEP bit that remaps usb3v1 ACTIVE state to
 450                  * SLEEP. We work around this by clearing the bit after usv3v1
 451                  * is re-activated. This ensures that VUSB3V1 is really active.
 452                  */
 453                 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0,
 454                                                         VUSB_DEDICATED2);
 455                 regulator_enable(twl->usb1v5);
 456                 pwr &= ~PHY_PWR_PHYPWD;
 457                 WARN_ON(twl4030_usb_write_verify(twl, PHY_PWR_CTRL, pwr) < 0);
 458                 twl4030_usb_write(twl, PHY_CLK_CTRL,
 459                                   twl4030_usb_read(twl, PHY_CLK_CTRL) |
 460                                         (PHY_CLK_CTRL_CLOCKGATING_EN |
 461                                                 PHY_CLK_CTRL_CLK32K_EN));
 462         } else  {
 463                 pwr |= PHY_PWR_PHYPWD;
 464                 WARN_ON(twl4030_usb_write_verify(twl, PHY_PWR_CTRL, pwr) < 0);
 465                 regulator_disable(twl->usb1v5);
 466                 regulator_disable(twl->usb1v8);
 467                 regulator_disable(twl->usb3v1);
 468         }
 469 }
 470
 471 static void twl4030_phy_suspend(struct twl4030_usb *twl, int controller_off)
 472 {
 473         if (twl->asleep)
 474                 return;
 475
 476         twl4030_phy_power(twl, 0);
 477         twl->asleep = 1;
 478 }
 479
 480 static void twl4030_phy_resume(struct twl4030_usb *twl)
 481 {
 482         if (!twl->asleep)
 483                 return;
 484
 485         twl4030_phy_power(twl, 1);
 486         twl4030_i2c_access(twl, 1);
 487         twl4030_usb_set_mode(twl, twl->usb_mode);
 488         if (twl->usb_mode == T2_USB_MODE_ULPI)
 489                 twl4030_i2c_access(twl, 0);
 490         twl->asleep = 0;
 491 }
 492
 493 static int twl4030_usb_ldo_init(struct twl4030_usb *twl)
 494 {
 495         /* Enable writing to power configuration registers */
 496         twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0xC0, PROTECT_KEY);
 497         twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0x0C, PROTECT_KEY);
 498
 499         /* put VUSB3V1 LDO in active state */
 500         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2);
 501
 502         /* input to VUSB3V1 LDO is from VBAT, not VBUS */
 503         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x14, VUSB_DEDICATED1);
 504
 505         /* Initialize 3.1V regulator */
 506         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB3V1_DEV_GRP);
 507
 508         twl->usb3v1 = regulator_get(twl->dev, "usb3v1");
 509         if (IS_ERR(twl->usb3v1))
 510                 return -ENODEV;
 511
 512         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB3V1_TYPE);
 513
 514         /* Initialize 1.5V regulator */
 515         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V5_DEV_GRP);
 516
 517         twl->usb1v5 = regulator_get(twl->dev, "usb1v5");
 518         if (IS_ERR(twl->usb1v5))
 519                 goto fail1;
 520
 521         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V5_TYPE);
 522
 523         /* Initialize 1.8V regulator */
 524         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V8_DEV_GRP);
 525
 526         twl->usb1v8 = regulator_get(twl->dev, "usb1v8");
 527         if (IS_ERR(twl->usb1v8))
 528                 goto fail2;
 529
 530         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V8_TYPE);
 531
 532         /* disable access to power configuration registers */
 533         twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0, PROTECT_KEY);
 534
 535         return 0;
 536
 537 fail2:
 538         regulator_put(twl->usb1v5);
 539         twl->usb1v5 = NULL;
 540 fail1:
 541         regulator_put(twl->usb3v1);
 542         twl->usb3v1 = NULL;
 543         return -ENODEV;
 544 }
 545
 546 static ssize_t twl4030_usb_vbus_show(struct device *dev,
 547                 struct device_attribute *attr, char *buf)
 548 {
 549         struct twl4030_usb *twl = dev_get_drvdata(dev);
 550         unsigned long flags;
 551         int ret = -EINVAL;
 552
 553         spin_lock_irqsave(&twl->lock, flags);
 554         ret = sprintf(buf, "%s\n",
 555                         (twl->linkstat == USB_LINK_VBUS) ? "on" : "off");
 556         spin_unlock_irqrestore(&twl->lock, flags);
 557
 558         return ret;
 559 }
 560 static DEVICE_ATTR(vbus, 0444, twl4030_usb_vbus_show, NULL);
 561
 562 static irqreturn_t twl4030_usb_irq(int irq, void *_twl)
 563 {
 564         struct twl4030_usb *twl = _twl;
 565         int status;
 566
 567 #ifdef CONFIG_LOCKDEP
 568         /* WORKAROUND for lockdep forcing IRQF_DISABLED on us, which
 569          * we don't want and can't tolerate.  Although it might be
 570          * friendlier not to borrow this thread context...
 571          */
 572         local_irq_enable();
 573 #endif
 574
 575         status = twl4030_usb_linkstat(twl);
 576         if (status != USB_LINK_UNKNOWN) {
 577
 578                 /* FIXME add a set_power() method so that B-devices can
 579                  * configure the charger appropriately.  It's not always
 580                  * correct to consume VBUS power, and how much current to
 581                  * consume is a function of the USB configuration chosen
 582                  * by the host.
 583                  *
 584                  * REVISIT usb_gadget_vbus_connect(...) as needed, ditto
 585                  * its disconnect() sibling, when changing to/from the
 586                  * USB_LINK_VBUS state.  musb_hdrc won't care until it
 587                  * starts to handle softconnect right.
 588                  */
 589                 twl4030charger_usb_en(status == USB_LINK_VBUS);
 590
 591                 if (status == USB_LINK_NONE)
 592                         twl4030_phy_suspend(twl, 0);
 593                 else
 594                         twl4030_phy_resume(twl);
 595         }
 596         sysfs_notify(&twl->dev->kobj, NULL, "vbus");
 597
 598         return IRQ_HANDLED;
 599 }
 600
 601 static int twl4030_set_suspend(struct otg_transceiver *x, int suspend)
 602 {
 603         struct twl4030_usb *twl = xceiv_to_twl(x);
 604
 605         if (suspend)
 606                 twl4030_phy_suspend(twl, 1);
 607         else
 608                 twl4030_phy_resume(twl);
 609
 610         return 0;
 611 }
 612
 613 static int twl4030_set_peripheral(struct otg_transceiver *x,
 614                 struct usb_gadget *gadget)
 615 {
 616         struct twl4030_usb *twl;
 617
 618         if (!x)
 619                 return -ENODEV;
 620
 621         twl = xceiv_to_twl(x);
 622         twl->otg.gadget = gadget;
 623         if (!gadget)
 624                 twl->otg.state = OTG_STATE_UNDEFINED;
 625
 626         return 0;
 627 }
 628
 629 static int twl4030_set_host(struct otg_transceiver *x, struct usb_bus *host)
 630 {
 631         struct twl4030_usb *twl;
 632
 633         if (!x)
 634                 return -ENODEV;
 635
 636         twl = xceiv_to_twl(x);
 637         twl->otg.host = host;
 638         if (!host)
 639                 twl->otg.state = OTG_STATE_UNDEFINED;
 640
 641         return 0;
 642 }
 643
 644 static int __init twl4030_usb_probe(struct platform_device *pdev)
 645 {
 646         struct twl4030_usb_data *pdata = pdev->dev.platform_data;
 647         struct twl4030_usb      *twl;
 648         int                     status, err;
 649
 650         if (!pdata) {
 651                 dev_dbg(&pdev->dev, "platform_data not available\n");
 652                 return -EINVAL;
 653         }
 654
 655         twl = kzalloc(sizeof *twl, GFP_KERNEL);
 656         if (!twl)
 657                 return -ENOMEM;
 658
 659         twl->dev                = &pdev->dev;
 660         twl->irq                = platform_get_irq(pdev, 0);
 661         twl->otg.dev            = twl->dev;
 662         twl->otg.label          = "twl4030";
 663         twl->otg.set_host       = twl4030_set_host;
 664         twl->otg.set_peripheral = twl4030_set_peripheral;
 665         twl->otg.set_suspend    = twl4030_set_suspend;
 666         twl->usb_mode           = pdata->usb_mode;
 667         twl->asleep             = 1;
 668
 669         /* init spinlock for workqueue */
 670         spin_lock_init(&twl->lock);
 671
 672         err = twl4030_usb_ldo_init(twl);
 673         if (err) {
 674                 dev_err(&pdev->dev, "ldo init failed\n");
 675                 kfree(twl);
 676                 return err;
 677         }
 678         otg_set_transceiver(&twl->otg);
 679
 680         platform_set_drvdata(pdev, twl);
 681         if (device_create_file(&pdev->dev, &dev_attr_vbus))
 682                 dev_warn(&pdev->dev, "could not create sysfs file\n");
 683
 684         /* Our job is to use irqs and status from the power module
 685          * to keep the transceiver disabled when nothing's connected.
 686          *
 687          * FIXME we actually shouldn't start enabling it until the
 688          * USB controller drivers have said they're ready, by calling
 689          * set_host() and/or set_peripheral() ... OTG_capable boards
 690          * need both handles, otherwise just one suffices.
 691          */
 692         twl->irq_enabled = true;
 693         status = request_irq(twl->irq, twl4030_usb_irq,
 694                         IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
 695                         "twl4030_usb", twl);
 696         if (status < 0) {
 697                 dev_dbg(&pdev->dev, "can't get IRQ %d, err %d\n",
 698                         twl->irq, status);
 699                 kfree(twl);
 700                 return status;
 701         }
 702
 703         /* The IRQ handler just handles changes from the previous states
 704          * of the ID and VBUS pins ... in probe() we must initialize that
 705          * previous state.  The easy way:  fake an IRQ.
 706          *
 707          * REVISIT:  a real IRQ might have happened already, if PREEMPT is
 708          * enabled.  Else the IRQ may not yet be configured or enabled,
 709          * because of scheduling delays.
 710          */
 711         twl4030_usb_irq(twl->irq, twl);
 712
 713         dev_info(&pdev->dev, "Initialized TWL4030 USB module\n");
 714         return 0;
 715 }
 716
 717 static int __exit twl4030_usb_remove(struct platform_device *pdev)
 718 {
 719         struct twl4030_usb *twl = platform_get_drvdata(pdev);
 720         int val;
 721
 722         free_irq(twl->irq, twl);
 723         device_remove_file(twl->dev, &dev_attr_vbus);
 724
 725         /* set transceiver mode to power on defaults */
 726         twl4030_usb_set_mode(twl, -1);
 727
 728         /* autogate 60MHz ULPI clock,
 729          * clear dpll clock request for i2c access,
 730          * disable 32KHz
 731          */
 732         val = twl4030_usb_read(twl, PHY_CLK_CTRL);
 733         if (val >= 0) {
 734                 val |= PHY_CLK_CTRL_CLOCKGATING_EN;
 735                 val &= ~(PHY_CLK_CTRL_CLK32K_EN | REQ_PHY_DPLL_CLK);
 736                 twl4030_usb_write(twl, PHY_CLK_CTRL, (u8)val);
 737         }
 738
 739         /* disable complete OTG block */
 740         twl4030_usb_clear_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
 741
 742         twl4030_phy_power(twl, 0);
 743         regulator_put(twl->usb1v5);
 744         regulator_put(twl->usb1v8);
 745         regulator_put(twl->usb3v1);
 746
 747         kfree(twl);
 748
 749         return 0;
 750 }
 751
 752 static struct platform_driver twl4030_usb_driver = {
 753         .probe          = twl4030_usb_probe,
 754         .remove         = __exit_p(twl4030_usb_remove),
 755         .driver         = {
 756                 .name   = "twl4030_usb",
 757                 .owner  = THIS_MODULE,
 758         },
 759 };
 760
 761 static int __init twl4030_usb_init(void)
 762 {
 763         return platform_driver_register(&twl4030_usb_driver);
 764 }
 765 subsys_initcall(twl4030_usb_init);
 766
 767 static void __exit twl4030_usb_exit(void)
 768 {
 769         platform_driver_unregister(&twl4030_usb_driver);
 770 }
 771 module_exit(twl4030_usb_exit);
 772
 773 MODULE_ALIAS("platform:twl4030_usb");
 774 MODULE_AUTHOR("Texas Instruments, Inc, Nokia Corporation");
 775 MODULE_DESCRIPTION("TWL4030 USB transceiver driver");
 776 MODULE_LICENSE("GPL");