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IPVS: fix netns if reading ip_vs_* procfs entries
[linux-2.6/linux-mips.git] / drivers / net / bna / bnad_ethtool.c
blob142d6047da2795c879b3b2d54c862ad7d30a7e86
1 /*
2 * Linux network driver for Brocade Converged Network Adapter.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License (GPL) Version 2 as
6 * published by the Free Software Foundation
7 *
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
12 */
13 /*
14 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
15 * All rights reserved
16 * www.brocade.com
17 */
18
19 #include "cna.h"
20
21 #include <linux/netdevice.h>
22 #include <linux/skbuff.h>
23 #include <linux/ethtool.h>
24 #include <linux/rtnetlink.h>
25
26 #include "bna.h"
27
28 #include "bnad.h"
29
30 #define BNAD_NUM_TXF_COUNTERS 12
31 #define BNAD_NUM_RXF_COUNTERS 10
32 #define BNAD_NUM_CQ_COUNTERS 3
33 #define BNAD_NUM_RXQ_COUNTERS 6
34 #define BNAD_NUM_TXQ_COUNTERS 5
35
36 #define BNAD_ETHTOOL_STATS_NUM \
37 (sizeof(struct rtnl_link_stats64) / sizeof(u64) + \
38 sizeof(struct bnad_drv_stats) / sizeof(u64) + \
39 offsetof(struct bfi_ll_stats, rxf_stats[0]) / sizeof(u64))
40
41 static char *bnad_net_stats_strings[BNAD_ETHTOOL_STATS_NUM] = {
42 "rx_packets",
43 "tx_packets",
44 "rx_bytes",
45 "tx_bytes",
46 "rx_errors",
47 "tx_errors",
48 "rx_dropped",
49 "tx_dropped",
50 "multicast",
51 "collisions",
52
53 "rx_length_errors",
54 "rx_over_errors",
55 "rx_crc_errors",
56 "rx_frame_errors",
57 "rx_fifo_errors",
58 "rx_missed_errors",
59
60 "tx_aborted_errors",
61 "tx_carrier_errors",
62 "tx_fifo_errors",
63 "tx_heartbeat_errors",
64 "tx_window_errors",
65
66 "rx_compressed",
67 "tx_compressed",
68
69 "netif_queue_stop",
70 "netif_queue_wakeup",
71 "netif_queue_stopped",
72 "tso4",
73 "tso6",
74 "tso_err",
75 "tcpcsum_offload",
76 "udpcsum_offload",
77 "csum_help",
78 "csum_help_err",
79 "hw_stats_updates",
80 "netif_rx_schedule",
81 "netif_rx_complete",
82 "netif_rx_dropped",
83
84 "link_toggle",
85 "cee_up",
86
87 "rxp_info_alloc_failed",
88 "mbox_intr_disabled",
89 "mbox_intr_enabled",
90 "tx_unmap_q_alloc_failed",
91 "rx_unmap_q_alloc_failed",
92 "rxbuf_alloc_failed",
93
94 "mac_frame_64",
95 "mac_frame_65_127",
96 "mac_frame_128_255",
97 "mac_frame_256_511",
98 "mac_frame_512_1023",
99 "mac_frame_1024_1518",
100 "mac_frame_1518_1522",
101 "mac_rx_bytes",
102 "mac_rx_packets",
103 "mac_rx_fcs_error",
104 "mac_rx_multicast",
105 "mac_rx_broadcast",
106 "mac_rx_control_frames",
107 "mac_rx_pause",
108 "mac_rx_unknown_opcode",
109 "mac_rx_alignment_error",
110 "mac_rx_frame_length_error",
111 "mac_rx_code_error",
112 "mac_rx_carrier_sense_error",
113 "mac_rx_undersize",
114 "mac_rx_oversize",
115 "mac_rx_fragments",
116 "mac_rx_jabber",
117 "mac_rx_drop",
118
119 "mac_tx_bytes",
120 "mac_tx_packets",
121 "mac_tx_multicast",
122 "mac_tx_broadcast",
123 "mac_tx_pause",
124 "mac_tx_deferral",
125 "mac_tx_excessive_deferral",
126 "mac_tx_single_collision",
127 "mac_tx_muliple_collision",
128 "mac_tx_late_collision",
129 "mac_tx_excessive_collision",
130 "mac_tx_total_collision",
131 "mac_tx_pause_honored",
132 "mac_tx_drop",
133 "mac_tx_jabber",
134 "mac_tx_fcs_error",
135 "mac_tx_control_frame",
136 "mac_tx_oversize",
137 "mac_tx_undersize",
138 "mac_tx_fragments",
139
140 "bpc_tx_pause_0",
141 "bpc_tx_pause_1",
142 "bpc_tx_pause_2",
143 "bpc_tx_pause_3",
144 "bpc_tx_pause_4",
145 "bpc_tx_pause_5",
146 "bpc_tx_pause_6",
147 "bpc_tx_pause_7",
148 "bpc_tx_zero_pause_0",
149 "bpc_tx_zero_pause_1",
150 "bpc_tx_zero_pause_2",
151 "bpc_tx_zero_pause_3",
152 "bpc_tx_zero_pause_4",
153 "bpc_tx_zero_pause_5",
154 "bpc_tx_zero_pause_6",
155 "bpc_tx_zero_pause_7",
156 "bpc_tx_first_pause_0",
157 "bpc_tx_first_pause_1",
158 "bpc_tx_first_pause_2",
159 "bpc_tx_first_pause_3",
160 "bpc_tx_first_pause_4",
161 "bpc_tx_first_pause_5",
162 "bpc_tx_first_pause_6",
163 "bpc_tx_first_pause_7",
164
165 "bpc_rx_pause_0",
166 "bpc_rx_pause_1",
167 "bpc_rx_pause_2",
168 "bpc_rx_pause_3",
169 "bpc_rx_pause_4",
170 "bpc_rx_pause_5",
171 "bpc_rx_pause_6",
172 "bpc_rx_pause_7",
173 "bpc_rx_zero_pause_0",
174 "bpc_rx_zero_pause_1",
175 "bpc_rx_zero_pause_2",
176 "bpc_rx_zero_pause_3",
177 "bpc_rx_zero_pause_4",
178 "bpc_rx_zero_pause_5",
179 "bpc_rx_zero_pause_6",
180 "bpc_rx_zero_pause_7",
181 "bpc_rx_first_pause_0",
182 "bpc_rx_first_pause_1",
183 "bpc_rx_first_pause_2",
184 "bpc_rx_first_pause_3",
185 "bpc_rx_first_pause_4",
186 "bpc_rx_first_pause_5",
187 "bpc_rx_first_pause_6",
188 "bpc_rx_first_pause_7",
189
190 "rad_rx_frames",
191 "rad_rx_octets",
192 "rad_rx_vlan_frames",
193 "rad_rx_ucast",
194 "rad_rx_ucast_octets",
195 "rad_rx_ucast_vlan",
196 "rad_rx_mcast",
197 "rad_rx_mcast_octets",
198 "rad_rx_mcast_vlan",
199 "rad_rx_bcast",
200 "rad_rx_bcast_octets",
201 "rad_rx_bcast_vlan",
202 "rad_rx_drops",
203
204 "fc_rx_ucast_octets",
205 "fc_rx_ucast",
206 "fc_rx_ucast_vlan",
207 "fc_rx_mcast_octets",
208 "fc_rx_mcast",
209 "fc_rx_mcast_vlan",
210 "fc_rx_bcast_octets",
211 "fc_rx_bcast",
212 "fc_rx_bcast_vlan",
213
214 "fc_tx_ucast_octets",
215 "fc_tx_ucast",
216 "fc_tx_ucast_vlan",
217 "fc_tx_mcast_octets",
218 "fc_tx_mcast",
219 "fc_tx_mcast_vlan",
220 "fc_tx_bcast_octets",
221 "fc_tx_bcast",
222 "fc_tx_bcast_vlan",
223 "fc_tx_parity_errors",
224 "fc_tx_timeout",
225 "fc_tx_fid_parity_errors",
226 };
227
228 static int
229 bnad_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
230 {
231 cmd->supported = SUPPORTED_10000baseT_Full;
232 cmd->advertising = ADVERTISED_10000baseT_Full;
233 cmd->autoneg = AUTONEG_DISABLE;
234 cmd->supported |= SUPPORTED_FIBRE;
235 cmd->advertising |= ADVERTISED_FIBRE;
236 cmd->port = PORT_FIBRE;
237 cmd->phy_address = 0;
238
239 if (netif_carrier_ok(netdev)) {
240 cmd->speed = SPEED_10000;
241 cmd->duplex = DUPLEX_FULL;
242 } else {
243 cmd->speed = -1;
244 cmd->duplex = -1;
245 }
246 cmd->transceiver = XCVR_EXTERNAL;
247 cmd->maxtxpkt = 0;
248 cmd->maxrxpkt = 0;
249
250 return 0;
251 }
252
253 static int
254 bnad_set_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
255 {
256 /* 10G full duplex setting supported only */
257 if (cmd->autoneg == AUTONEG_ENABLE)
258 return -EOPNOTSUPP; else {
259 if ((cmd->speed == SPEED_10000) && (cmd->duplex == DUPLEX_FULL))
260 return 0;
261 }
262
263 return -EOPNOTSUPP;
264 }
265
266 static void
267 bnad_get_drvinfo(struct net_device *netdev, struct ethtool_drvinfo *drvinfo)
268 {
269 struct bnad *bnad = netdev_priv(netdev);
270 struct bfa_ioc_attr *ioc_attr;
271 unsigned long flags;
272
273 strcpy(drvinfo->driver, BNAD_NAME);
274 strcpy(drvinfo->version, BNAD_VERSION);
275
276 ioc_attr = kzalloc(sizeof(*ioc_attr), GFP_KERNEL);
277 if (ioc_attr) {
278 spin_lock_irqsave(&bnad->bna_lock, flags);
279 bfa_nw_ioc_get_attr(&bnad->bna.device.ioc, ioc_attr);
280 spin_unlock_irqrestore(&bnad->bna_lock, flags);
281
282 strncpy(drvinfo->fw_version, ioc_attr->adapter_attr.fw_ver,
283 sizeof(drvinfo->fw_version) - 1);
284 kfree(ioc_attr);
285 }
286
287 strncpy(drvinfo->bus_info, pci_name(bnad->pcidev), ETHTOOL_BUSINFO_LEN);
288 }
289
290 static int
291 get_regs(struct bnad *bnad, u32 * regs)
292 {
293 int num = 0, i;
294 u32 reg_addr;
295 unsigned long flags;
296
297 #define BNAD_GET_REG(addr) \
298 do { \
299 if (regs) \
300 regs[num++] = readl(bnad->bar0 + (addr)); \
301 else \
302 num++; \
303 } while (0)
304
305 spin_lock_irqsave(&bnad->bna_lock, flags);
306
307 /* DMA Block Internal Registers */
308 BNAD_GET_REG(DMA_CTRL_REG0);
309 BNAD_GET_REG(DMA_CTRL_REG1);
310 BNAD_GET_REG(DMA_ERR_INT_STATUS);
311 BNAD_GET_REG(DMA_ERR_INT_ENABLE);
312 BNAD_GET_REG(DMA_ERR_INT_STATUS_SET);
313
314 /* APP Block Register Address Offset from BAR0 */
315 BNAD_GET_REG(HOSTFN0_INT_STATUS);
316 BNAD_GET_REG(HOSTFN0_INT_MASK);
317 BNAD_GET_REG(HOST_PAGE_NUM_FN0);
318 BNAD_GET_REG(HOST_MSIX_ERR_INDEX_FN0);
319 BNAD_GET_REG(FN0_PCIE_ERR_REG);
320 BNAD_GET_REG(FN0_ERR_TYPE_STATUS_REG);
321 BNAD_GET_REG(FN0_ERR_TYPE_MSK_STATUS_REG);
322
323 BNAD_GET_REG(HOSTFN1_INT_STATUS);
324 BNAD_GET_REG(HOSTFN1_INT_MASK);
325 BNAD_GET_REG(HOST_PAGE_NUM_FN1);
326 BNAD_GET_REG(HOST_MSIX_ERR_INDEX_FN1);
327 BNAD_GET_REG(FN1_PCIE_ERR_REG);
328 BNAD_GET_REG(FN1_ERR_TYPE_STATUS_REG);
329 BNAD_GET_REG(FN1_ERR_TYPE_MSK_STATUS_REG);
330
331 BNAD_GET_REG(PCIE_MISC_REG);
332
333 BNAD_GET_REG(HOST_SEM0_INFO_REG);
334 BNAD_GET_REG(HOST_SEM1_INFO_REG);
335 BNAD_GET_REG(HOST_SEM2_INFO_REG);
336 BNAD_GET_REG(HOST_SEM3_INFO_REG);
337
338 BNAD_GET_REG(TEMPSENSE_CNTL_REG);
339 BNAD_GET_REG(TEMPSENSE_STAT_REG);
340
341 BNAD_GET_REG(APP_LOCAL_ERR_STAT);
342 BNAD_GET_REG(APP_LOCAL_ERR_MSK);
343
344 BNAD_GET_REG(PCIE_LNK_ERR_STAT);
345 BNAD_GET_REG(PCIE_LNK_ERR_MSK);
346
347 BNAD_GET_REG(FCOE_FIP_ETH_TYPE);
348 BNAD_GET_REG(RESV_ETH_TYPE);
349
350 BNAD_GET_REG(HOSTFN2_INT_STATUS);
351 BNAD_GET_REG(HOSTFN2_INT_MASK);
352 BNAD_GET_REG(HOST_PAGE_NUM_FN2);
353 BNAD_GET_REG(HOST_MSIX_ERR_INDEX_FN2);
354 BNAD_GET_REG(FN2_PCIE_ERR_REG);
355 BNAD_GET_REG(FN2_ERR_TYPE_STATUS_REG);
356 BNAD_GET_REG(FN2_ERR_TYPE_MSK_STATUS_REG);
357
358 BNAD_GET_REG(HOSTFN3_INT_STATUS);
359 BNAD_GET_REG(HOSTFN3_INT_MASK);
360 BNAD_GET_REG(HOST_PAGE_NUM_FN3);
361 BNAD_GET_REG(HOST_MSIX_ERR_INDEX_FN3);
362 BNAD_GET_REG(FN3_PCIE_ERR_REG);
363 BNAD_GET_REG(FN3_ERR_TYPE_STATUS_REG);
364 BNAD_GET_REG(FN3_ERR_TYPE_MSK_STATUS_REG);
365
366 /* Host Command Status Registers */
367 reg_addr = HOST_CMDSTS0_CLR_REG;
368 for (i = 0; i < 16; i++) {
369 BNAD_GET_REG(reg_addr);
370 BNAD_GET_REG(reg_addr + 4);
371 BNAD_GET_REG(reg_addr + 8);
372 reg_addr += 0x10;
373 }
374
375 /* Function ID register */
376 BNAD_GET_REG(FNC_ID_REG);
377
378 /* Function personality register */
379 BNAD_GET_REG(FNC_PERS_REG);
380
381 /* Operation mode register */
382 BNAD_GET_REG(OP_MODE);
383
384 /* LPU0 Registers */
385 BNAD_GET_REG(LPU0_MBOX_CTL_REG);
386 BNAD_GET_REG(LPU0_MBOX_CMD_REG);
387 BNAD_GET_REG(LPU0_MBOX_LINK_0REG);
388 BNAD_GET_REG(LPU1_MBOX_LINK_0REG);
389 BNAD_GET_REG(LPU0_MBOX_STATUS_0REG);
390 BNAD_GET_REG(LPU1_MBOX_STATUS_0REG);
391 BNAD_GET_REG(LPU0_ERR_STATUS_REG);
392 BNAD_GET_REG(LPU0_ERR_SET_REG);
393
394 /* LPU1 Registers */
395 BNAD_GET_REG(LPU1_MBOX_CTL_REG);
396 BNAD_GET_REG(LPU1_MBOX_CMD_REG);
397 BNAD_GET_REG(LPU0_MBOX_LINK_1REG);
398 BNAD_GET_REG(LPU1_MBOX_LINK_1REG);
399 BNAD_GET_REG(LPU0_MBOX_STATUS_1REG);
400 BNAD_GET_REG(LPU1_MBOX_STATUS_1REG);
401 BNAD_GET_REG(LPU1_ERR_STATUS_REG);
402 BNAD_GET_REG(LPU1_ERR_SET_REG);
403
404 /* PSS Registers */
405 BNAD_GET_REG(PSS_CTL_REG);
406 BNAD_GET_REG(PSS_ERR_STATUS_REG);
407 BNAD_GET_REG(ERR_STATUS_SET);
408 BNAD_GET_REG(PSS_RAM_ERR_STATUS_REG);
409
410 /* Catapult CPQ Registers */
411 BNAD_GET_REG(HOSTFN0_LPU0_MBOX0_CMD_STAT);
412 BNAD_GET_REG(HOSTFN0_LPU1_MBOX0_CMD_STAT);
413 BNAD_GET_REG(LPU0_HOSTFN0_MBOX0_CMD_STAT);
414 BNAD_GET_REG(LPU1_HOSTFN0_MBOX0_CMD_STAT);
415
416 BNAD_GET_REG(HOSTFN0_LPU0_MBOX1_CMD_STAT);
417 BNAD_GET_REG(HOSTFN0_LPU1_MBOX1_CMD_STAT);
418 BNAD_GET_REG(LPU0_HOSTFN0_MBOX1_CMD_STAT);
419 BNAD_GET_REG(LPU1_HOSTFN0_MBOX1_CMD_STAT);
420
421 BNAD_GET_REG(HOSTFN1_LPU0_MBOX0_CMD_STAT);
422 BNAD_GET_REG(HOSTFN1_LPU1_MBOX0_CMD_STAT);
423 BNAD_GET_REG(LPU0_HOSTFN1_MBOX0_CMD_STAT);
424 BNAD_GET_REG(LPU1_HOSTFN1_MBOX0_CMD_STAT);
425
426 BNAD_GET_REG(HOSTFN1_LPU0_MBOX1_CMD_STAT);
427 BNAD_GET_REG(HOSTFN1_LPU1_MBOX1_CMD_STAT);
428 BNAD_GET_REG(LPU0_HOSTFN1_MBOX1_CMD_STAT);
429 BNAD_GET_REG(LPU1_HOSTFN1_MBOX1_CMD_STAT);
430
431 BNAD_GET_REG(HOSTFN2_LPU0_MBOX0_CMD_STAT);
432 BNAD_GET_REG(HOSTFN2_LPU1_MBOX0_CMD_STAT);
433 BNAD_GET_REG(LPU0_HOSTFN2_MBOX0_CMD_STAT);
434 BNAD_GET_REG(LPU1_HOSTFN2_MBOX0_CMD_STAT);
435
436 BNAD_GET_REG(HOSTFN2_LPU0_MBOX1_CMD_STAT);
437 BNAD_GET_REG(HOSTFN2_LPU1_MBOX1_CMD_STAT);
438 BNAD_GET_REG(LPU0_HOSTFN2_MBOX1_CMD_STAT);
439 BNAD_GET_REG(LPU1_HOSTFN2_MBOX1_CMD_STAT);
440
441 BNAD_GET_REG(HOSTFN3_LPU0_MBOX0_CMD_STAT);
442 BNAD_GET_REG(HOSTFN3_LPU1_MBOX0_CMD_STAT);
443 BNAD_GET_REG(LPU0_HOSTFN3_MBOX0_CMD_STAT);
444 BNAD_GET_REG(LPU1_HOSTFN3_MBOX0_CMD_STAT);
445
446 BNAD_GET_REG(HOSTFN3_LPU0_MBOX1_CMD_STAT);
447 BNAD_GET_REG(HOSTFN3_LPU1_MBOX1_CMD_STAT);
448 BNAD_GET_REG(LPU0_HOSTFN3_MBOX1_CMD_STAT);
449 BNAD_GET_REG(LPU1_HOSTFN3_MBOX1_CMD_STAT);
450
451 /* Host Function Force Parity Error Registers */
452 BNAD_GET_REG(HOSTFN0_LPU_FORCE_PERR);
453 BNAD_GET_REG(HOSTFN1_LPU_FORCE_PERR);
454 BNAD_GET_REG(HOSTFN2_LPU_FORCE_PERR);
455 BNAD_GET_REG(HOSTFN3_LPU_FORCE_PERR);
456
457 /* LL Port[0|1] Halt Mask Registers */
458 BNAD_GET_REG(LL_HALT_MSK_P0);
459 BNAD_GET_REG(LL_HALT_MSK_P1);
460
461 /* LL Port[0|1] Error Mask Registers */
462 BNAD_GET_REG(LL_ERR_MSK_P0);
463 BNAD_GET_REG(LL_ERR_MSK_P1);
464
465 /* EMC FLI Registers */
466 BNAD_GET_REG(FLI_CMD_REG);
467 BNAD_GET_REG(FLI_ADDR_REG);
468 BNAD_GET_REG(FLI_CTL_REG);
469 BNAD_GET_REG(FLI_WRDATA_REG);
470 BNAD_GET_REG(FLI_RDDATA_REG);
471 BNAD_GET_REG(FLI_DEV_STATUS_REG);
472 BNAD_GET_REG(FLI_SIG_WD_REG);
473
474 BNAD_GET_REG(FLI_DEV_VENDOR_REG);
475 BNAD_GET_REG(FLI_ERR_STATUS_REG);
476
477 /* RxAdm 0 Registers */
478 BNAD_GET_REG(RAD0_CTL_REG);
479 BNAD_GET_REG(RAD0_PE_PARM_REG);
480 BNAD_GET_REG(RAD0_BCN_REG);
481 BNAD_GET_REG(RAD0_DEFAULT_REG);
482 BNAD_GET_REG(RAD0_PROMISC_REG);
483 BNAD_GET_REG(RAD0_BCNQ_REG);
484 BNAD_GET_REG(RAD0_DEFAULTQ_REG);
485
486 BNAD_GET_REG(RAD0_ERR_STS);
487 BNAD_GET_REG(RAD0_SET_ERR_STS);
488 BNAD_GET_REG(RAD0_ERR_INT_EN);
489 BNAD_GET_REG(RAD0_FIRST_ERR);
490 BNAD_GET_REG(RAD0_FORCE_ERR);
491
492 BNAD_GET_REG(RAD0_MAC_MAN_1H);
493 BNAD_GET_REG(RAD0_MAC_MAN_1L);
494 BNAD_GET_REG(RAD0_MAC_MAN_2H);
495 BNAD_GET_REG(RAD0_MAC_MAN_2L);
496 BNAD_GET_REG(RAD0_MAC_MAN_3H);
497 BNAD_GET_REG(RAD0_MAC_MAN_3L);
498 BNAD_GET_REG(RAD0_MAC_MAN_4H);
499 BNAD_GET_REG(RAD0_MAC_MAN_4L);
500
501 BNAD_GET_REG(RAD0_LAST4_IP);
502
503 /* RxAdm 1 Registers */
504 BNAD_GET_REG(RAD1_CTL_REG);
505 BNAD_GET_REG(RAD1_PE_PARM_REG);
506 BNAD_GET_REG(RAD1_BCN_REG);
507 BNAD_GET_REG(RAD1_DEFAULT_REG);
508 BNAD_GET_REG(RAD1_PROMISC_REG);
509 BNAD_GET_REG(RAD1_BCNQ_REG);
510 BNAD_GET_REG(RAD1_DEFAULTQ_REG);
511
512 BNAD_GET_REG(RAD1_ERR_STS);
513 BNAD_GET_REG(RAD1_SET_ERR_STS);
514 BNAD_GET_REG(RAD1_ERR_INT_EN);
515
516 /* TxA0 Registers */
517 BNAD_GET_REG(TXA0_CTRL_REG);
518 /* TxA0 TSO Sequence # Registers (RO) */
519 for (i = 0; i < 8; i++) {
520 BNAD_GET_REG(TXA0_TSO_TCP_SEQ_REG(i));
521 BNAD_GET_REG(TXA0_TSO_IP_INFO_REG(i));
522 }
523
524 /* TxA1 Registers */
525 BNAD_GET_REG(TXA1_CTRL_REG);
526 /* TxA1 TSO Sequence # Registers (RO) */
527 for (i = 0; i < 8; i++) {
528 BNAD_GET_REG(TXA1_TSO_TCP_SEQ_REG(i));
529 BNAD_GET_REG(TXA1_TSO_IP_INFO_REG(i));
530 }
531
532 /* RxA Registers */
533 BNAD_GET_REG(RXA0_CTL_REG);
534 BNAD_GET_REG(RXA1_CTL_REG);
535
536 /* PLB0 Registers */
537 BNAD_GET_REG(PLB0_ECM_TIMER_REG);
538 BNAD_GET_REG(PLB0_RL_CTL);
539 for (i = 0; i < 8; i++)
540 BNAD_GET_REG(PLB0_RL_MAX_BC(i));
541 BNAD_GET_REG(PLB0_RL_TU_PRIO);
542 for (i = 0; i < 8; i++)
543 BNAD_GET_REG(PLB0_RL_BYTE_CNT(i));
544 BNAD_GET_REG(PLB0_RL_MIN_REG);
545 BNAD_GET_REG(PLB0_RL_MAX_REG);
546 BNAD_GET_REG(PLB0_EMS_ADD_REG);
547
548 /* PLB1 Registers */
549 BNAD_GET_REG(PLB1_ECM_TIMER_REG);
550 BNAD_GET_REG(PLB1_RL_CTL);
551 for (i = 0; i < 8; i++)
552 BNAD_GET_REG(PLB1_RL_MAX_BC(i));
553 BNAD_GET_REG(PLB1_RL_TU_PRIO);
554 for (i = 0; i < 8; i++)
555 BNAD_GET_REG(PLB1_RL_BYTE_CNT(i));
556 BNAD_GET_REG(PLB1_RL_MIN_REG);
557 BNAD_GET_REG(PLB1_RL_MAX_REG);
558 BNAD_GET_REG(PLB1_EMS_ADD_REG);
559
560 /* HQM Control Register */
561 BNAD_GET_REG(HQM0_CTL_REG);
562 BNAD_GET_REG(HQM0_RXQ_STOP_SEM);
563 BNAD_GET_REG(HQM0_TXQ_STOP_SEM);
564 BNAD_GET_REG(HQM1_CTL_REG);
565 BNAD_GET_REG(HQM1_RXQ_STOP_SEM);
566 BNAD_GET_REG(HQM1_TXQ_STOP_SEM);
567
568 /* LUT Registers */
569 BNAD_GET_REG(LUT0_ERR_STS);
570 BNAD_GET_REG(LUT0_SET_ERR_STS);
571 BNAD_GET_REG(LUT1_ERR_STS);
572 BNAD_GET_REG(LUT1_SET_ERR_STS);
573
574 /* TRC Registers */
575 BNAD_GET_REG(TRC_CTL_REG);
576 BNAD_GET_REG(TRC_MODS_REG);
577 BNAD_GET_REG(TRC_TRGC_REG);
578 BNAD_GET_REG(TRC_CNT1_REG);
579 BNAD_GET_REG(TRC_CNT2_REG);
580 BNAD_GET_REG(TRC_NXTS_REG);
581 BNAD_GET_REG(TRC_DIRR_REG);
582 for (i = 0; i < 10; i++)
583 BNAD_GET_REG(TRC_TRGM_REG(i));
584 for (i = 0; i < 10; i++)
585 BNAD_GET_REG(TRC_NXTM_REG(i));
586 for (i = 0; i < 10; i++)
587 BNAD_GET_REG(TRC_STRM_REG(i));
588
589 spin_unlock_irqrestore(&bnad->bna_lock, flags);
590 #undef BNAD_GET_REG
591 return num;
592 }
593 static int
594 bnad_get_regs_len(struct net_device *netdev)
595 {
596 int ret = get_regs(netdev_priv(netdev), NULL) * sizeof(u32);
597 return ret;
598 }
599
600 static void
601 bnad_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *buf)
602 {
603 memset(buf, 0, bnad_get_regs_len(netdev));
604 get_regs(netdev_priv(netdev), buf);
605 }
606
607 static void
608 bnad_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wolinfo)
609 {
610 wolinfo->supported = 0;
611 wolinfo->wolopts = 0;
612 }
613
614 static int
615 bnad_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *coalesce)
616 {
617 struct bnad *bnad = netdev_priv(netdev);
618 unsigned long flags;
619
620 /* Lock rqd. to access bnad->bna_lock */
621 spin_lock_irqsave(&bnad->bna_lock, flags);
622 coalesce->use_adaptive_rx_coalesce =
623 (bnad->cfg_flags & BNAD_CF_DIM_ENABLED) ? true : false;
624 spin_unlock_irqrestore(&bnad->bna_lock, flags);
625
626 coalesce->rx_coalesce_usecs = bnad->rx_coalescing_timeo *
627 BFI_COALESCING_TIMER_UNIT;
628 coalesce->tx_coalesce_usecs = bnad->tx_coalescing_timeo *
629 BFI_COALESCING_TIMER_UNIT;
630 coalesce->tx_max_coalesced_frames = BFI_TX_INTERPKT_COUNT;
631
632 return 0;
633 }
634
635 static int
636 bnad_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *coalesce)
637 {
638 struct bnad *bnad = netdev_priv(netdev);
639 unsigned long flags;
640 int dim_timer_del = 0;
641
642 if (coalesce->rx_coalesce_usecs == 0 ||
643 coalesce->rx_coalesce_usecs >
644 BFI_MAX_COALESCING_TIMEO * BFI_COALESCING_TIMER_UNIT)
645 return -EINVAL;
646
647 if (coalesce->tx_coalesce_usecs == 0 ||
648 coalesce->tx_coalesce_usecs >
649 BFI_MAX_COALESCING_TIMEO * BFI_COALESCING_TIMER_UNIT)
650 return -EINVAL;
651
652 mutex_lock(&bnad->conf_mutex);
653 /*
654 * Do not need to store rx_coalesce_usecs here
655 * Every time DIM is disabled, we can get it from the
656 * stack.
657 */
658 spin_lock_irqsave(&bnad->bna_lock, flags);
659 if (coalesce->use_adaptive_rx_coalesce) {
660 if (!(bnad->cfg_flags & BNAD_CF_DIM_ENABLED)) {
661 bnad->cfg_flags |= BNAD_CF_DIM_ENABLED;
662 bnad_dim_timer_start(bnad);
663 }
664 } else {
665 if (bnad->cfg_flags & BNAD_CF_DIM_ENABLED) {
666 bnad->cfg_flags &= ~BNAD_CF_DIM_ENABLED;
667 dim_timer_del = bnad_dim_timer_running(bnad);
668 if (dim_timer_del) {
669 clear_bit(BNAD_RF_DIM_TIMER_RUNNING,
670 &bnad->run_flags);
671 spin_unlock_irqrestore(&bnad->bna_lock, flags);
672 del_timer_sync(&bnad->dim_timer);
673 spin_lock_irqsave(&bnad->bna_lock, flags);
674 }
675 bnad_rx_coalescing_timeo_set(bnad);
676 }
677 }
678 if (bnad->tx_coalescing_timeo != coalesce->tx_coalesce_usecs /
679 BFI_COALESCING_TIMER_UNIT) {
680 bnad->tx_coalescing_timeo = coalesce->tx_coalesce_usecs /
681 BFI_COALESCING_TIMER_UNIT;
682 bnad_tx_coalescing_timeo_set(bnad);
683 }
684
685 if (bnad->rx_coalescing_timeo != coalesce->rx_coalesce_usecs /
686 BFI_COALESCING_TIMER_UNIT) {
687 bnad->rx_coalescing_timeo = coalesce->rx_coalesce_usecs /
688 BFI_COALESCING_TIMER_UNIT;
689
690 if (!(bnad->cfg_flags & BNAD_CF_DIM_ENABLED))
691 bnad_rx_coalescing_timeo_set(bnad);
692
693 }
694
695 /* Add Tx Inter-pkt DMA count? */
696
697 spin_unlock_irqrestore(&bnad->bna_lock, flags);
698
699 mutex_unlock(&bnad->conf_mutex);
700 return 0;
701 }
702
703 static void
704 bnad_get_ringparam(struct net_device *netdev,
705 struct ethtool_ringparam *ringparam)
706 {
707 struct bnad *bnad = netdev_priv(netdev);
708
709 ringparam->rx_max_pending = BNAD_MAX_Q_DEPTH / bnad_rxqs_per_cq;
710 ringparam->rx_mini_max_pending = 0;
711 ringparam->rx_jumbo_max_pending = 0;
712 ringparam->tx_max_pending = BNAD_MAX_Q_DEPTH;
713
714 ringparam->rx_pending = bnad->rxq_depth;
715 ringparam->rx_mini_max_pending = 0;
716 ringparam->rx_jumbo_max_pending = 0;
717 ringparam->tx_pending = bnad->txq_depth;
718 }
719
720 static int
721 bnad_set_ringparam(struct net_device *netdev,
722 struct ethtool_ringparam *ringparam)
723 {
724 int i, current_err, err = 0;
725 struct bnad *bnad = netdev_priv(netdev);
726
727 mutex_lock(&bnad->conf_mutex);
728 if (ringparam->rx_pending == bnad->rxq_depth &&
729 ringparam->tx_pending == bnad->txq_depth) {
730 mutex_unlock(&bnad->conf_mutex);
731 return 0;
732 }
733
734 if (ringparam->rx_pending < BNAD_MIN_Q_DEPTH ||
735 ringparam->rx_pending > BNAD_MAX_Q_DEPTH / bnad_rxqs_per_cq ||
736 !BNA_POWER_OF_2(ringparam->rx_pending)) {
737 mutex_unlock(&bnad->conf_mutex);
738 return -EINVAL;
739 }
740 if (ringparam->tx_pending < BNAD_MIN_Q_DEPTH ||
741 ringparam->tx_pending > BNAD_MAX_Q_DEPTH ||
742 !BNA_POWER_OF_2(ringparam->tx_pending)) {
743 mutex_unlock(&bnad->conf_mutex);
744 return -EINVAL;
745 }
746
747 if (ringparam->rx_pending != bnad->rxq_depth) {
748 bnad->rxq_depth = ringparam->rx_pending;
749 for (i = 0; i < bnad->num_rx; i++) {
750 if (!bnad->rx_info[i].rx)
751 continue;
752 bnad_cleanup_rx(bnad, i);
753 current_err = bnad_setup_rx(bnad, i);
754 if (current_err && !err)
755 err = current_err;
756 }
757 }
758 if (ringparam->tx_pending != bnad->txq_depth) {
759 bnad->txq_depth = ringparam->tx_pending;
760 for (i = 0; i < bnad->num_tx; i++) {
761 if (!bnad->tx_info[i].tx)
762 continue;
763 bnad_cleanup_tx(bnad, i);
764 current_err = bnad_setup_tx(bnad, i);
765 if (current_err && !err)
766 err = current_err;
767 }
768 }
769
770 mutex_unlock(&bnad->conf_mutex);
771 return err;
772 }
773
774 static void
775 bnad_get_pauseparam(struct net_device *netdev,
776 struct ethtool_pauseparam *pauseparam)
777 {
778 struct bnad *bnad = netdev_priv(netdev);
779
780 pauseparam->autoneg = 0;
781 pauseparam->rx_pause = bnad->bna.port.pause_config.rx_pause;
782 pauseparam->tx_pause = bnad->bna.port.pause_config.tx_pause;
783 }
784
785 static int
786 bnad_set_pauseparam(struct net_device *netdev,
787 struct ethtool_pauseparam *pauseparam)
788 {
789 struct bnad *bnad = netdev_priv(netdev);
790 struct bna_pause_config pause_config;
791 unsigned long flags;
792
793 if (pauseparam->autoneg == AUTONEG_ENABLE)
794 return -EINVAL;
795
796 mutex_lock(&bnad->conf_mutex);
797 if (pauseparam->rx_pause != bnad->bna.port.pause_config.rx_pause ||
798 pauseparam->tx_pause != bnad->bna.port.pause_config.tx_pause) {
799 pause_config.rx_pause = pauseparam->rx_pause;
800 pause_config.tx_pause = pauseparam->tx_pause;
801 spin_lock_irqsave(&bnad->bna_lock, flags);
802 bna_port_pause_config(&bnad->bna.port, &pause_config, NULL);
803 spin_unlock_irqrestore(&bnad->bna_lock, flags);
804 }
805 mutex_unlock(&bnad->conf_mutex);
806 return 0;
807 }
808
809 static u32
810 bnad_get_rx_csum(struct net_device *netdev)
811 {
812 u32 rx_csum;
813 struct bnad *bnad = netdev_priv(netdev);
814
815 rx_csum = bnad->rx_csum;
816 return rx_csum;
817 }
818
819 static int
820 bnad_set_rx_csum(struct net_device *netdev, u32 rx_csum)
821 {
822 struct bnad *bnad = netdev_priv(netdev);
823
824 mutex_lock(&bnad->conf_mutex);
825 bnad->rx_csum = rx_csum;
826 mutex_unlock(&bnad->conf_mutex);
827 return 0;
828 }
829
830 static int
831 bnad_set_tx_csum(struct net_device *netdev, u32 tx_csum)
832 {
833 struct bnad *bnad = netdev_priv(netdev);
834
835 mutex_lock(&bnad->conf_mutex);
836 if (tx_csum) {
837 netdev->features |= NETIF_F_IP_CSUM;
838 netdev->features |= NETIF_F_IPV6_CSUM;
839 } else {
840 netdev->features &= ~NETIF_F_IP_CSUM;
841 netdev->features &= ~NETIF_F_IPV6_CSUM;
842 }
843 mutex_unlock(&bnad->conf_mutex);
844 return 0;
845 }
846
847 static int
848 bnad_set_tso(struct net_device *netdev, u32 tso)
849 {
850 struct bnad *bnad = netdev_priv(netdev);
851
852 mutex_lock(&bnad->conf_mutex);
853 if (tso) {
854 netdev->features |= NETIF_F_TSO;
855 netdev->features |= NETIF_F_TSO6;
856 } else {
857 netdev->features &= ~NETIF_F_TSO;
858 netdev->features &= ~NETIF_F_TSO6;
859 }
860 mutex_unlock(&bnad->conf_mutex);
861 return 0;
862 }
863
864 static void
865 bnad_get_strings(struct net_device *netdev, u32 stringset, u8 * string)
866 {
867 struct bnad *bnad = netdev_priv(netdev);
868 int i, j, q_num;
869 u64 bmap;
870
871 mutex_lock(&bnad->conf_mutex);
872
873 switch (stringset) {
874 case ETH_SS_STATS:
875 for (i = 0; i < BNAD_ETHTOOL_STATS_NUM; i++) {
876 BUG_ON(!(strlen(bnad_net_stats_strings[i]) <
877 ETH_GSTRING_LEN));
878 memcpy(string, bnad_net_stats_strings[i],
879 ETH_GSTRING_LEN);
880 string += ETH_GSTRING_LEN;
881 }
882 bmap = (u64)bnad->bna.tx_mod.txf_bmap[0] |
883 ((u64)bnad->bna.tx_mod.txf_bmap[1] << 32);
884 for (i = 0; bmap && (i < BFI_LL_TXF_ID_MAX); i++) {
885 if (bmap & 1) {
886 sprintf(string, "txf%d_ucast_octets", i);
887 string += ETH_GSTRING_LEN;
888 sprintf(string, "txf%d_ucast", i);
889 string += ETH_GSTRING_LEN;
890 sprintf(string, "txf%d_ucast_vlan", i);
891 string += ETH_GSTRING_LEN;
892 sprintf(string, "txf%d_mcast_octets", i);
893 string += ETH_GSTRING_LEN;
894 sprintf(string, "txf%d_mcast", i);
895 string += ETH_GSTRING_LEN;
896 sprintf(string, "txf%d_mcast_vlan", i);
897 string += ETH_GSTRING_LEN;
898 sprintf(string, "txf%d_bcast_octets", i);
899 string += ETH_GSTRING_LEN;
900 sprintf(string, "txf%d_bcast", i);
901 string += ETH_GSTRING_LEN;
902 sprintf(string, "txf%d_bcast_vlan", i);
903 string += ETH_GSTRING_LEN;
904 sprintf(string, "txf%d_errors", i);
905 string += ETH_GSTRING_LEN;
906 sprintf(string, "txf%d_filter_vlan", i);
907 string += ETH_GSTRING_LEN;
908 sprintf(string, "txf%d_filter_mac_sa", i);
909 string += ETH_GSTRING_LEN;
910 }
911 bmap >>= 1;
912 }
913
914 bmap = (u64)bnad->bna.rx_mod.rxf_bmap[0] |
915 ((u64)bnad->bna.rx_mod.rxf_bmap[1] << 32);
916 for (i = 0; bmap && (i < BFI_LL_RXF_ID_MAX); i++) {
917 if (bmap & 1) {
918 sprintf(string, "rxf%d_ucast_octets", i);
919 string += ETH_GSTRING_LEN;
920 sprintf(string, "rxf%d_ucast", i);
921 string += ETH_GSTRING_LEN;
922 sprintf(string, "rxf%d_ucast_vlan", i);
923 string += ETH_GSTRING_LEN;
924 sprintf(string, "rxf%d_mcast_octets", i);
925 string += ETH_GSTRING_LEN;
926 sprintf(string, "rxf%d_mcast", i);
927 string += ETH_GSTRING_LEN;
928 sprintf(string, "rxf%d_mcast_vlan", i);
929 string += ETH_GSTRING_LEN;
930 sprintf(string, "rxf%d_bcast_octets", i);
931 string += ETH_GSTRING_LEN;
932 sprintf(string, "rxf%d_bcast", i);
933 string += ETH_GSTRING_LEN;
934 sprintf(string, "rxf%d_bcast_vlan", i);
935 string += ETH_GSTRING_LEN;
936 sprintf(string, "rxf%d_frame_drops", i);
937 string += ETH_GSTRING_LEN;
938 }
939 bmap >>= 1;
940 }
941
942 q_num = 0;
943 for (i = 0; i < bnad->num_rx; i++) {
944 if (!bnad->rx_info[i].rx)
945 continue;
946 for (j = 0; j < bnad->num_rxp_per_rx; j++) {
947 sprintf(string, "cq%d_producer_index", q_num);
948 string += ETH_GSTRING_LEN;
949 sprintf(string, "cq%d_consumer_index", q_num);
950 string += ETH_GSTRING_LEN;
951 sprintf(string, "cq%d_hw_producer_index",
952 q_num);
953 string += ETH_GSTRING_LEN;
954 q_num++;
955 }
956 }
957
958 q_num = 0;
959 for (i = 0; i < bnad->num_rx; i++) {
960 if (!bnad->rx_info[i].rx)
961 continue;
962 for (j = 0; j < bnad->num_rxp_per_rx; j++) {
963 sprintf(string, "rxq%d_packets", q_num);
964 string += ETH_GSTRING_LEN;
965 sprintf(string, "rxq%d_bytes", q_num);
966 string += ETH_GSTRING_LEN;
967 sprintf(string, "rxq%d_packets_with_error",
968 q_num);
969 string += ETH_GSTRING_LEN;
970 sprintf(string, "rxq%d_allocbuf_failed", q_num);
971 string += ETH_GSTRING_LEN;
972 sprintf(string, "rxq%d_producer_index", q_num);
973 string += ETH_GSTRING_LEN;
974 sprintf(string, "rxq%d_consumer_index", q_num);
975 string += ETH_GSTRING_LEN;
976 q_num++;
977 if (bnad->rx_info[i].rx_ctrl[j].ccb &&
978 bnad->rx_info[i].rx_ctrl[j].ccb->
979 rcb[1] &&
980 bnad->rx_info[i].rx_ctrl[j].ccb->
981 rcb[1]->rxq) {
982 sprintf(string, "rxq%d_packets", q_num);
983 string += ETH_GSTRING_LEN;
984 sprintf(string, "rxq%d_bytes", q_num);
985 string += ETH_GSTRING_LEN;
986 sprintf(string,
987 "rxq%d_packets_with_error", q_num);
988 string += ETH_GSTRING_LEN;
989 sprintf(string, "rxq%d_allocbuf_failed",
990 q_num);
991 string += ETH_GSTRING_LEN;
992 sprintf(string, "rxq%d_producer_index",
993 q_num);
994 string += ETH_GSTRING_LEN;
995 sprintf(string, "rxq%d_consumer_index",
996 q_num);
997 string += ETH_GSTRING_LEN;
998 q_num++;
999 }
1000 }
1001 }
1002
1003 q_num = 0;
1004 for (i = 0; i < bnad->num_tx; i++) {
1005 if (!bnad->tx_info[i].tx)
1006 continue;
1007 for (j = 0; j < bnad->num_txq_per_tx; j++) {
1008 sprintf(string, "txq%d_packets", q_num);
1009 string += ETH_GSTRING_LEN;
1010 sprintf(string, "txq%d_bytes", q_num);
1011 string += ETH_GSTRING_LEN;
1012 sprintf(string, "txq%d_producer_index", q_num);
1013 string += ETH_GSTRING_LEN;
1014 sprintf(string, "txq%d_consumer_index", q_num);
1015 string += ETH_GSTRING_LEN;
1016 sprintf(string, "txq%d_hw_consumer_index",
1017 q_num);
1018 string += ETH_GSTRING_LEN;
1019 q_num++;
1020 }
1021 }
1022
1023 break;
1024
1025 default:
1026 break;
1027 }
1028
1029 mutex_unlock(&bnad->conf_mutex);
1030 }
1031
1032 static int
1033 bnad_get_stats_count_locked(struct net_device *netdev)
1034 {
1035 struct bnad *bnad = netdev_priv(netdev);
1036 int i, j, count, rxf_active_num = 0, txf_active_num = 0;
1037 u64 bmap;
1038
1039 bmap = (u64)bnad->bna.tx_mod.txf_bmap[0] |
1040 ((u64)bnad->bna.tx_mod.txf_bmap[1] << 32);
1041 for (i = 0; bmap && (i < BFI_LL_TXF_ID_MAX); i++) {
1042 if (bmap & 1)
1043 txf_active_num++;
1044 bmap >>= 1;
1045 }
1046 bmap = (u64)bnad->bna.rx_mod.rxf_bmap[0] |
1047 ((u64)bnad->bna.rx_mod.rxf_bmap[1] << 32);
1048 for (i = 0; bmap && (i < BFI_LL_RXF_ID_MAX); i++) {
1049 if (bmap & 1)
1050 rxf_active_num++;
1051 bmap >>= 1;
1052 }
1053 count = BNAD_ETHTOOL_STATS_NUM +
1054 txf_active_num * BNAD_NUM_TXF_COUNTERS +
1055 rxf_active_num * BNAD_NUM_RXF_COUNTERS;
1056
1057 for (i = 0; i < bnad->num_rx; i++) {
1058 if (!bnad->rx_info[i].rx)
1059 continue;
1060 count += bnad->num_rxp_per_rx * BNAD_NUM_CQ_COUNTERS;
1061 count += bnad->num_rxp_per_rx * BNAD_NUM_RXQ_COUNTERS;
1062 for (j = 0; j < bnad->num_rxp_per_rx; j++)
1063 if (bnad->rx_info[i].rx_ctrl[j].ccb &&
1064 bnad->rx_info[i].rx_ctrl[j].ccb->rcb[1] &&
1065 bnad->rx_info[i].rx_ctrl[j].ccb->rcb[1]->rxq)
1066 count += BNAD_NUM_RXQ_COUNTERS;
1067 }
1068
1069 for (i = 0; i < bnad->num_tx; i++) {
1070 if (!bnad->tx_info[i].tx)
1071 continue;
1072 count += bnad->num_txq_per_tx * BNAD_NUM_TXQ_COUNTERS;
1073 }
1074 return count;
1075 }
1076
1077 static int
1078 bnad_per_q_stats_fill(struct bnad *bnad, u64 *buf, int bi)
1079 {
1080 int i, j;
1081 struct bna_rcb *rcb = NULL;
1082 struct bna_tcb *tcb = NULL;
1083
1084 for (i = 0; i < bnad->num_rx; i++) {
1085 if (!bnad->rx_info[i].rx)
1086 continue;
1087 for (j = 0; j < bnad->num_rxp_per_rx; j++)
1088 if (bnad->rx_info[i].rx_ctrl[j].ccb &&
1089 bnad->rx_info[i].rx_ctrl[j].ccb->rcb[0] &&
1090 bnad->rx_info[i].rx_ctrl[j].ccb->rcb[0]->rxq) {
1091 buf[bi++] = bnad->rx_info[i].rx_ctrl[j].
1092 ccb->producer_index;
1093 buf[bi++] = 0; /* ccb->consumer_index */
1094 buf[bi++] = *(bnad->rx_info[i].rx_ctrl[j].
1095 ccb->hw_producer_index);
1096 }
1097 }
1098 for (i = 0; i < bnad->num_rx; i++) {
1099 if (!bnad->rx_info[i].rx)
1100 continue;
1101 for (j = 0; j < bnad->num_rxp_per_rx; j++)
1102 if (bnad->rx_info[i].rx_ctrl[j].ccb) {
1103 if (bnad->rx_info[i].rx_ctrl[j].ccb->rcb[0] &&
1104 bnad->rx_info[i].rx_ctrl[j].ccb->
1105 rcb[0]->rxq) {
1106 rcb = bnad->rx_info[i].rx_ctrl[j].
1107 ccb->rcb[0];
1108 buf[bi++] = rcb->rxq->rx_packets;
1109 buf[bi++] = rcb->rxq->rx_bytes;
1110 buf[bi++] = rcb->rxq->
1111 rx_packets_with_error;
1112 buf[bi++] = rcb->rxq->
1113 rxbuf_alloc_failed;
1114 buf[bi++] = rcb->producer_index;
1115 buf[bi++] = rcb->consumer_index;
1116 }
1117 if (bnad->rx_info[i].rx_ctrl[j].ccb->rcb[1] &&
1118 bnad->rx_info[i].rx_ctrl[j].ccb->
1119 rcb[1]->rxq) {
1120 rcb = bnad->rx_info[i].rx_ctrl[j].
1121 ccb->rcb[1];
1122 buf[bi++] = rcb->rxq->rx_packets;
1123 buf[bi++] = rcb->rxq->rx_bytes;
1124 buf[bi++] = rcb->rxq->
1125 rx_packets_with_error;
1126 buf[bi++] = rcb->rxq->
1127 rxbuf_alloc_failed;
1128 buf[bi++] = rcb->producer_index;
1129 buf[bi++] = rcb->consumer_index;
1130 }
1131 }
1132 }
1133
1134 for (i = 0; i < bnad->num_tx; i++) {
1135 if (!bnad->tx_info[i].tx)
1136 continue;
1137 for (j = 0; j < bnad->num_txq_per_tx; j++)
1138 if (bnad->tx_info[i].tcb[j] &&
1139 bnad->tx_info[i].tcb[j]->txq) {
1140 tcb = bnad->tx_info[i].tcb[j];
1141 buf[bi++] = tcb->txq->tx_packets;
1142 buf[bi++] = tcb->txq->tx_bytes;
1143 buf[bi++] = tcb->producer_index;
1144 buf[bi++] = tcb->consumer_index;
1145 buf[bi++] = *(tcb->hw_consumer_index);
1146 }
1147 }
1148
1149 return bi;
1150 }
1151
1152 static void
1153 bnad_get_ethtool_stats(struct net_device *netdev, struct ethtool_stats *stats,
1154 u64 *buf)
1155 {
1156 struct bnad *bnad = netdev_priv(netdev);
1157 int i, j, bi;
1158 unsigned long flags;
1159 struct rtnl_link_stats64 *net_stats64;
1160 u64 *stats64;
1161 u64 bmap;
1162
1163 mutex_lock(&bnad->conf_mutex);
1164 if (bnad_get_stats_count_locked(netdev) != stats->n_stats) {
1165 mutex_unlock(&bnad->conf_mutex);
1166 return;
1167 }
1168
1169 /*
1170 * Used bna_lock to sync reads from bna_stats, which is written
1171 * under the same lock
1172 */
1173 spin_lock_irqsave(&bnad->bna_lock, flags);
1174 bi = 0;
1175 memset(buf, 0, stats->n_stats * sizeof(u64));
1176
1177 net_stats64 = (struct rtnl_link_stats64 *)buf;
1178 bnad_netdev_qstats_fill(bnad, net_stats64);
1179 bnad_netdev_hwstats_fill(bnad, net_stats64);
1180
1181 bi = sizeof(*net_stats64) / sizeof(u64);
1182
1183 /* Get netif_queue_stopped from stack */
1184 bnad->stats.drv_stats.netif_queue_stopped = netif_queue_stopped(netdev);
1185
1186 /* Fill driver stats into ethtool buffers */
1187 stats64 = (u64 *)&bnad->stats.drv_stats;
1188 for (i = 0; i < sizeof(struct bnad_drv_stats) / sizeof(u64); i++)
1189 buf[bi++] = stats64[i];
1190
1191 /* Fill hardware stats excluding the rxf/txf into ethtool bufs */
1192 stats64 = (u64 *) bnad->stats.bna_stats->hw_stats;
1193 for (i = 0;
1194 i < offsetof(struct bfi_ll_stats, rxf_stats[0]) / sizeof(u64);
1195 i++)
1196 buf[bi++] = stats64[i];
1197
1198 /* Fill txf stats into ethtool buffers */
1199 bmap = (u64)bnad->bna.tx_mod.txf_bmap[0] |
1200 ((u64)bnad->bna.tx_mod.txf_bmap[1] << 32);
1201 for (i = 0; bmap && (i < BFI_LL_TXF_ID_MAX); i++) {
1202 if (bmap & 1) {
1203 stats64 = (u64 *)&bnad->stats.bna_stats->
1204 hw_stats->txf_stats[i];
1205 for (j = 0; j < sizeof(struct bfi_ll_stats_txf) /
1206 sizeof(u64); j++)
1207 buf[bi++] = stats64[j];
1208 }
1209 bmap >>= 1;
1210 }
1211
1212 /* Fill rxf stats into ethtool buffers */
1213 bmap = (u64)bnad->bna.rx_mod.rxf_bmap[0] |
1214 ((u64)bnad->bna.rx_mod.rxf_bmap[1] << 32);
1215 for (i = 0; bmap && (i < BFI_LL_RXF_ID_MAX); i++) {
1216 if (bmap & 1) {
1217 stats64 = (u64 *)&bnad->stats.bna_stats->
1218 hw_stats->rxf_stats[i];
1219 for (j = 0; j < sizeof(struct bfi_ll_stats_rxf) /
1220 sizeof(u64); j++)
1221 buf[bi++] = stats64[j];
1222 }
1223 bmap >>= 1;
1224 }
1225
1226 /* Fill per Q stats into ethtool buffers */
1227 bi = bnad_per_q_stats_fill(bnad, buf, bi);
1228
1229 spin_unlock_irqrestore(&bnad->bna_lock, flags);
1230
1231 mutex_unlock(&bnad->conf_mutex);
1232 }
1233
1234 static int
1235 bnad_get_sset_count(struct net_device *netdev, int sset)
1236 {
1237 switch (sset) {
1238 case ETH_SS_STATS:
1239 return bnad_get_stats_count_locked(netdev);
1240 default:
1241 return -EOPNOTSUPP;
1242 }
1243 }
1244
1245 static struct ethtool_ops bnad_ethtool_ops = {
1246 .get_settings = bnad_get_settings,
1247 .set_settings = bnad_set_settings,
1248 .get_drvinfo = bnad_get_drvinfo,
1249 .get_regs_len = bnad_get_regs_len,
1250 .get_regs = bnad_get_regs,
1251 .get_wol = bnad_get_wol,
1252 .get_link = ethtool_op_get_link,
1253 .get_coalesce = bnad_get_coalesce,
1254 .set_coalesce = bnad_set_coalesce,
1255 .get_ringparam = bnad_get_ringparam,
1256 .set_ringparam = bnad_set_ringparam,
1257 .get_pauseparam = bnad_get_pauseparam,
1258 .set_pauseparam = bnad_set_pauseparam,
1259 .get_rx_csum = bnad_get_rx_csum,
1260 .set_rx_csum = bnad_set_rx_csum,
1261 .get_tx_csum = ethtool_op_get_tx_csum,
1262 .set_tx_csum = bnad_set_tx_csum,
1263 .get_sg = ethtool_op_get_sg,
1264 .set_sg = ethtool_op_set_sg,
1265 .get_tso = ethtool_op_get_tso,
1266 .set_tso = bnad_set_tso,
1267 .get_strings = bnad_get_strings,
1268 .get_ethtool_stats = bnad_get_ethtool_stats,
1269 .get_sset_count = bnad_get_sset_count
1270 };
1271
1272 void
1273 bnad_set_ethtool_ops(struct net_device *netdev)
1274 {
1275 SET_ETHTOOL_OPS(netdev, &bnad_ethtool_ops);
1276 }
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