drivers/usb/host/ohci-pci.c

   1 /*
   2  * OHCI HCD (Host Controller Driver) for USB.
   3  *
   4  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
   5  * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
   6  *
   7  * [ Initialisation is based on Linus'  ]
   8  * [ uhci code and gregs ohci fragments ]
   9  * [ (C) Copyright 1999 Linus Torvalds  ]
  10  * [ (C) Copyright 1999 Gregory P. Smith]
  11  *
  12  * PCI Bus Glue
  13  *
  14  * This file is licenced under the GPL.
  15  */
  16
  17 #ifndef CONFIG_PCI
  18 #error "This file is PCI bus glue.  CONFIG_PCI must be defined."
  19 #endif
  20
  21 #include <linux/pci.h>
  22 #include <linux/io.h>
  23
  24
  25 /* constants used to work around PM-related transfer
  26  * glitches in some AMD 700 series southbridges
  27  */
  28 #define AB_REG_BAR      0xf0
  29 #define AB_INDX(addr)   ((addr) + 0x00)
  30 #define AB_DATA(addr)   ((addr) + 0x04)
  31 #define AX_INDXC        0X30
  32 #define AX_DATAC        0x34
  33
  34 #define NB_PCIE_INDX_ADDR       0xe0
  35 #define NB_PCIE_INDX_DATA       0xe4
  36 #define PCIE_P_CNTL             0x10040
  37 #define BIF_NB                  0x10002
  38
  39 static struct pci_dev *amd_smbus_dev;
  40 static struct pci_dev *amd_hb_dev;
  41 static int amd_ohci_iso_count;
  42
  43 /*-------------------------------------------------------------------------*/
  44
  45 static int broken_suspend(struct usb_hcd *hcd)
  46 {
  47         device_init_wakeup(&hcd->self.root_hub->dev, 0);
  48         return 0;
  49 }
  50
  51 /* AMD 756, for most chips (early revs), corrupts register
  52  * values on read ... so enable the vendor workaround.
  53  */
  54 static int ohci_quirk_amd756(struct usb_hcd *hcd)
  55 {
  56         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  57
  58         ohci->flags = OHCI_QUIRK_AMD756;
  59         ohci_dbg (ohci, "AMD756 erratum 4 workaround\n");
  60
  61         /* also erratum 10 (suspend/resume issues) */
  62         return broken_suspend(hcd);
  63 }
  64
  65 /* Apple's OHCI driver has a lot of bizarre workarounds
  66  * for this chip.  Evidently control and bulk lists
  67  * can get confused.  (B&W G3 models, and ...)
  68  */
  69 static int ohci_quirk_opti(struct usb_hcd *hcd)
  70 {
  71         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  72
  73         ohci_dbg (ohci, "WARNING: OPTi workarounds unavailable\n");
  74
  75         return 0;
  76 }
  77
  78 /* Check for NSC87560. We have to look at the bridge (fn1) to
  79  * identify the USB (fn2). This quirk might apply to more or
  80  * even all NSC stuff.
  81  */
  82 static int ohci_quirk_ns(struct usb_hcd *hcd)
  83 {
  84         struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
  85         struct pci_dev  *b;
  86
  87         b  = pci_get_slot (pdev->bus, PCI_DEVFN (PCI_SLOT (pdev->devfn), 1));
  88         if (b && b->device == PCI_DEVICE_ID_NS_87560_LIO
  89             && b->vendor == PCI_VENDOR_ID_NS) {
  90                 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  91
  92                 ohci->flags |= OHCI_QUIRK_SUPERIO;
  93                 ohci_dbg (ohci, "Using NSC SuperIO setup\n");
  94         }
  95         pci_dev_put(b);
  96
  97         return 0;
  98 }
  99
 100 /* Check for Compaq's ZFMicro chipset, which needs short
 101  * delays before control or bulk queues get re-activated
 102  * in finish_unlinks()
 103  */
 104 static int ohci_quirk_zfmicro(struct usb_hcd *hcd)
 105 {
 106         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
 107
 108         ohci->flags |= OHCI_QUIRK_ZFMICRO;
 109         ohci_dbg(ohci, "enabled Compaq ZFMicro chipset quirks\n");
 110
 111         return 0;
 112 }
 113
 114 /* Check for Toshiba SCC OHCI which has big endian registers
 115  * and little endian in memory data structures
 116  */
 117 static int ohci_quirk_toshiba_scc(struct usb_hcd *hcd)
 118 {
 119         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
 120
 121         /* That chip is only present in the southbridge of some
 122          * cell based platforms which are supposed to select
 123          * CONFIG_USB_OHCI_BIG_ENDIAN_MMIO. We verify here if
 124          * that was the case though.
 125          */
 126 #ifdef CONFIG_USB_OHCI_BIG_ENDIAN_MMIO
 127         ohci->flags |= OHCI_QUIRK_BE_MMIO;
 128         ohci_dbg (ohci, "enabled big endian Toshiba quirk\n");
 129         return 0;
 130 #else
 131         ohci_err (ohci, "unsupported big endian Toshiba quirk\n");
 132         return -ENXIO;
 133 #endif
 134 }
 135
 136 /* Check for NEC chip and apply quirk for allegedly lost interrupts.
 137  */
 138
 139 static void ohci_quirk_nec_worker(struct work_struct *work)
 140 {
 141         struct ohci_hcd *ohci = container_of(work, struct ohci_hcd, nec_work);
 142         int status;
 143
 144         status = ohci_init(ohci);
 145         if (status != 0) {
 146                 ohci_err(ohci, "Restarting NEC controller failed in %s, %d\n",
 147                          "ohci_init", status);
 148                 return;
 149         }
 150
 151         status = ohci_restart(ohci);
 152         if (status != 0)
 153                 ohci_err(ohci, "Restarting NEC controller failed in %s, %d\n",
 154                          "ohci_restart", status);
 155 }
 156
 157 static int ohci_quirk_nec(struct usb_hcd *hcd)
 158 {
 159         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
 160
 161         ohci->flags |= OHCI_QUIRK_NEC;
 162         INIT_WORK(&ohci->nec_work, ohci_quirk_nec_worker);
 163         ohci_dbg (ohci, "enabled NEC chipset lost interrupt quirk\n");
 164
 165         return 0;
 166 }
 167
 168 static int ohci_quirk_amd700(struct usb_hcd *hcd)
 169 {
 170         struct ohci_hcd *ohci = hcd_to_ohci(hcd);
 171         u8 rev = 0;
 172
 173         if (!amd_smbus_dev)
 174                 amd_smbus_dev = pci_get_device(PCI_VENDOR_ID_ATI,
 175                                 PCI_DEVICE_ID_ATI_SBX00_SMBUS, NULL);
 176         if (!amd_smbus_dev)
 177                 return 0;
 178
 179         pci_read_config_byte(amd_smbus_dev, PCI_REVISION_ID, &rev);
 180
 181         /* SB800 needs pre-fetch fix */
 182         if ((rev >= 0x40) && (rev <= 0x4f)) {
 183                 ohci->flags |= OHCI_QUIRK_AMD_PREFETCH;
 184                 ohci_dbg(ohci, "enabled AMD prefetch quirk\n");
 185         }
 186
 187         if ((rev > 0x3b) || (rev < 0x30)) {
 188                 pci_dev_put(amd_smbus_dev);
 189                 amd_smbus_dev = NULL;
 190                 return 0;
 191         }
 192
 193         amd_ohci_iso_count++;
 194
 195         if (!amd_hb_dev)
 196                 amd_hb_dev = pci_get_device(PCI_VENDOR_ID_AMD, 0x9600, NULL);
 197
 198         ohci->flags |= OHCI_QUIRK_AMD_ISO;
 199         ohci_dbg(ohci, "enabled AMD ISO transfers quirk\n");
 200
 201         return 0;
 202 }
 203
 204 /*
 205  * The hardware normally enables the A-link power management feature, which
 206  * lets the system lower the power consumption in idle states.
 207  *
 208  * Assume the system is configured to have USB 1.1 ISO transfers going
 209  * to or from a USB device.  Without this quirk, that stream may stutter
 210  * or have breaks occasionally.  For transfers going to speakers, this
 211  * makes a very audible mess...
 212  *
 213  * That audio playback corruption is due to the audio stream getting
 214  * interrupted occasionally when the link goes in lower power state
 215  * This USB quirk prevents the link going into that lower power state
 216  * during audio playback or other ISO operations.
 217  */
 218 static void quirk_amd_pll(int on)
 219 {
 220         u32 addr;
 221         u32 val;
 222         u32 bit = (on > 0) ? 1 : 0;
 223
 224         pci_read_config_dword(amd_smbus_dev, AB_REG_BAR, &addr);
 225
 226         /* BIT names/meanings are NDA-protected, sorry ... */
 227
 228         outl(AX_INDXC, AB_INDX(addr));
 229         outl(0x40, AB_DATA(addr));
 230         outl(AX_DATAC, AB_INDX(addr));
 231         val = inl(AB_DATA(addr));
 232         val &= ~((1 << 3) | (1 << 4) | (1 << 9));
 233         val |= (bit << 3) | ((!bit) << 4) | ((!bit) << 9);
 234         outl(val, AB_DATA(addr));
 235
 236         if (amd_hb_dev) {
 237                 addr = PCIE_P_CNTL;
 238                 pci_write_config_dword(amd_hb_dev, NB_PCIE_INDX_ADDR, addr);
 239
 240                 pci_read_config_dword(amd_hb_dev, NB_PCIE_INDX_DATA, &val);
 241                 val &= ~(1 | (1 << 3) | (1 << 4) | (1 << 9) | (1 << 12));
 242                 val |= bit | (bit << 3) | (bit << 12);
 243                 val |= ((!bit) << 4) | ((!bit) << 9);
 244                 pci_write_config_dword(amd_hb_dev, NB_PCIE_INDX_DATA, val);
 245
 246                 addr = BIF_NB;
 247                 pci_write_config_dword(amd_hb_dev, NB_PCIE_INDX_ADDR, addr);
 248
 249                 pci_read_config_dword(amd_hb_dev, NB_PCIE_INDX_DATA, &val);
 250                 val &= ~(1 << 8);
 251                 val |= bit << 8;
 252                 pci_write_config_dword(amd_hb_dev, NB_PCIE_INDX_DATA, val);
 253         }
 254 }
 255
 256 static void amd_iso_dev_put(void)
 257 {
 258         amd_ohci_iso_count--;
 259         if (amd_ohci_iso_count == 0) {
 260                 if (amd_smbus_dev) {
 261                         pci_dev_put(amd_smbus_dev);
 262                         amd_smbus_dev = NULL;
 263                 }
 264                 if (amd_hb_dev) {
 265                         pci_dev_put(amd_hb_dev);
 266                         amd_hb_dev = NULL;
 267                 }
 268         }
 269
 270 }
 271
 272 static void sb800_prefetch(struct ohci_hcd *ohci, int on)
 273 {
 274         struct pci_dev *pdev;
 275         u16 misc;
 276
 277         pdev = to_pci_dev(ohci_to_hcd(ohci)->self.controller);
 278         pci_read_config_word(pdev, 0x50, &misc);
 279         if (on == 0)
 280                 pci_write_config_word(pdev, 0x50, misc & 0xfcff);
 281         else
 282                 pci_write_config_word(pdev, 0x50, misc | 0x0300);
 283 }
 284
 285 /* List of quirks for OHCI */
 286 static const struct pci_device_id ohci_pci_quirks[] = {
 287         {
 288                 PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x740c),
 289                 .driver_data = (unsigned long)ohci_quirk_amd756,
 290         },
 291         {
 292                 PCI_DEVICE(PCI_VENDOR_ID_OPTI, 0xc861),
 293                 .driver_data = (unsigned long)ohci_quirk_opti,
 294         },
 295         {
 296                 PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_ANY_ID),
 297                 .driver_data = (unsigned long)ohci_quirk_ns,
 298         },
 299         {
 300                 PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xa0f8),
 301                 .driver_data = (unsigned long)ohci_quirk_zfmicro,
 302         },
 303         {
 304                 PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, 0x01b6),
 305                 .driver_data = (unsigned long)ohci_quirk_toshiba_scc,
 306         },
 307         {
 308                 PCI_DEVICE(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB),
 309                 .driver_data = (unsigned long)ohci_quirk_nec,
 310         },
 311         {
 312                 /* Toshiba portege 4000 */
 313                 .vendor         = PCI_VENDOR_ID_AL,
 314                 .device         = 0x5237,
 315                 .subvendor      = PCI_VENDOR_ID_TOSHIBA,
 316                 .subdevice      = 0x0004,
 317                 .driver_data    = (unsigned long) broken_suspend,
 318         },
 319         {
 320                 PCI_DEVICE(PCI_VENDOR_ID_ITE, 0x8152),
 321                 .driver_data = (unsigned long) broken_suspend,
 322         },
 323         {
 324                 PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4397),
 325                 .driver_data = (unsigned long)ohci_quirk_amd700,
 326         },
 327         {
 328                 PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4398),
 329                 .driver_data = (unsigned long)ohci_quirk_amd700,
 330         },
 331         {
 332                 PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4399),
 333                 .driver_data = (unsigned long)ohci_quirk_amd700,
 334         },
 335
 336         /* FIXME for some of the early AMD 760 southbridges, OHCI
 337          * won't work at all.  blacklist them.
 338          */
 339
 340         {},
 341 };
 342
 343 static int ohci_pci_reset (struct usb_hcd *hcd)
 344 {
 345         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
 346         int ret = 0;
 347
 348         if (hcd->self.controller) {
 349                 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
 350                 const struct pci_device_id *quirk_id;
 351
 352                 quirk_id = pci_match_id(ohci_pci_quirks, pdev);
 353                 if (quirk_id != NULL) {
 354                         int (*quirk)(struct usb_hcd *ohci);
 355                         quirk = (void *)quirk_id->driver_data;
 356                         ret = quirk(hcd);
 357                 }
 358         }
 359         if (ret == 0) {
 360                 ohci_hcd_init (ohci);
 361                 return ohci_init (ohci);
 362         }
 363         return ret;
 364 }
 365
 366
 367 static int __devinit ohci_pci_start (struct usb_hcd *hcd)
 368 {
 369         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
 370         int             ret;
 371
 372 #ifdef CONFIG_PM /* avoid warnings about unused pdev */
 373         if (hcd->self.controller) {
 374                 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
 375
 376                 /* RWC may not be set for add-in PCI cards, since boot
 377                  * firmware probably ignored them.  This transfers PCI
 378                  * PM wakeup capabilities.
 379                  */
 380                 if (device_can_wakeup(&pdev->dev))
 381                         ohci->hc_control |= OHCI_CTRL_RWC;
 382         }
 383 #endif /* CONFIG_PM */
 384
 385         ret = ohci_run (ohci);
 386         if (ret < 0) {
 387                 ohci_err (ohci, "can't start\n");
 388                 ohci_stop (hcd);
 389         }
 390         return ret;
 391 }
 392
 393 #ifdef  CONFIG_PM
 394
 395 static int ohci_pci_suspend(struct usb_hcd *hcd)
 396 {
 397         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
 398         unsigned long   flags;
 399         int             rc = 0;
 400
 401         /* Root hub was already suspended. Disable irq emission and
 402          * mark HW unaccessible, bail out if RH has been resumed. Use
 403          * the spinlock to properly synchronize with possible pending
 404          * RH suspend or resume activity.
 405          *
 406          * This is still racy as hcd->state is manipulated outside of
 407          * any locks =P But that will be a different fix.
 408          */
 409         spin_lock_irqsave (&ohci->lock, flags);
 410         if (hcd->state != HC_STATE_SUSPENDED) {
 411                 rc = -EINVAL;
 412                 goto bail;
 413         }
 414         ohci_writel(ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 415         (void)ohci_readl(ohci, &ohci->regs->intrdisable);
 416
 417         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
 418  bail:
 419         spin_unlock_irqrestore (&ohci->lock, flags);
 420
 421         return rc;
 422 }
 423
 424
 425 static int ohci_pci_resume(struct usb_hcd *hcd, bool hibernated)
 426 {
 427         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
 428
 429         /* Make sure resume from hibernation re-enumerates everything */
 430         if (hibernated)
 431                 ohci_usb_reset(hcd_to_ohci(hcd));
 432
 433         ohci_finish_controller_resume(hcd);
 434         return 0;
 435 }
 436
 437 #endif  /* CONFIG_PM */
 438
 439
 440 /*-------------------------------------------------------------------------*/
 441
 442 static const struct hc_driver ohci_pci_hc_driver = {
 443         .description =          hcd_name,
 444         .product_desc =         "OHCI Host Controller",
 445         .hcd_priv_size =        sizeof(struct ohci_hcd),
 446
 447         /*
 448          * generic hardware linkage
 449          */
 450         .irq =                  ohci_irq,
 451         .flags =                HCD_MEMORY | HCD_USB11,
 452
 453         /*
 454          * basic lifecycle operations
 455          */
 456         .reset =                ohci_pci_reset,
 457         .start =                ohci_pci_start,
 458         .stop =                 ohci_stop,
 459         .shutdown =             ohci_shutdown,
 460
 461 #ifdef  CONFIG_PM
 462         .pci_suspend =          ohci_pci_suspend,
 463         .pci_resume =           ohci_pci_resume,
 464 #endif
 465
 466         /*
 467          * managing i/o requests and associated device resources
 468          */
 469         .urb_enqueue =          ohci_urb_enqueue,
 470         .urb_dequeue =          ohci_urb_dequeue,
 471         .endpoint_disable =     ohci_endpoint_disable,
 472
 473         /*
 474          * scheduling support
 475          */
 476         .get_frame_number =     ohci_get_frame,
 477
 478         /*
 479          * root hub support
 480          */
 481         .hub_status_data =      ohci_hub_status_data,
 482         .hub_control =          ohci_hub_control,
 483 #ifdef  CONFIG_PM
 484         .bus_suspend =          ohci_bus_suspend,
 485         .bus_resume =           ohci_bus_resume,
 486 #endif
 487         .start_port_reset =     ohci_start_port_reset,
 488 };
 489
 490 /*-------------------------------------------------------------------------*/
 491
 492
 493 static const struct pci_device_id pci_ids [] = { {
 494         /* handle any USB OHCI controller */
 495         PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_OHCI, ~0),
 496         .driver_data =  (unsigned long) &ohci_pci_hc_driver,
 497         }, { /* end: all zeroes */ }
 498 };
 499 MODULE_DEVICE_TABLE (pci, pci_ids);
 500
 501 /* pci driver glue; this is a "new style" PCI driver module */
 502 static struct pci_driver ohci_pci_driver = {
 503         .name =         (char *) hcd_name,
 504         .id_table =     pci_ids,
 505
 506         .probe =        usb_hcd_pci_probe,
 507         .remove =       usb_hcd_pci_remove,
 508         .shutdown =     usb_hcd_pci_shutdown,
 509
 510 #ifdef CONFIG_PM_SLEEP
 511         .driver =       {
 512                 .pm =   &usb_hcd_pci_pm_ops
 513         },
 514 #endif
 515 };