2 * Copyright (c) 2008 Rodolfo Giometti <giometti@linux.it>
3 * Copyright (c) 2008 Eurotech S.p.A. <info@eurtech.it>
5 * This code is *strongly* based on EHCI-HCD code by David Brownell since
6 * the chip is a quasi-EHCI compatible.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/module.h>
24 #include <linux/pci.h>
25 #include <linux/dmapool.h>
26 #include <linux/kernel.h>
27 #include <linux/delay.h>
28 #include <linux/ioport.h>
29 #include <linux/sched.h>
30 #include <linux/slab.h>
31 #include <linux/errno.h>
32 #include <linux/init.h>
33 #include <linux/timer.h>
34 #include <linux/list.h>
35 #include <linux/interrupt.h>
36 #include <linux/usb.h>
37 #include <linux/moduleparam.h>
38 #include <linux/dma-mapping.h>
41 #include "../core/hcd.h"
44 #include <asm/system.h>
45 #include <asm/unaligned.h>
47 #include <linux/irq.h>
48 #include <linux/platform_device.h>
52 #define DRIVER_VERSION "0.0.50"
58 #define oxu_dbg(oxu, fmt, args...) \
59 dev_dbg(oxu_to_hcd(oxu)->self.controller , fmt , ## args)
60 #define oxu_err(oxu, fmt, args...) \
61 dev_err(oxu_to_hcd(oxu)->self.controller , fmt , ## args)
62 #define oxu_info(oxu, fmt, args...) \
63 dev_info(oxu_to_hcd(oxu)->self.controller , fmt , ## args)
65 static inline struct usb_hcd
*oxu_to_hcd(struct oxu_hcd
*oxu
)
67 return container_of((void *) oxu
, struct usb_hcd
, hcd_priv
);
70 static inline struct oxu_hcd
*hcd_to_oxu(struct usb_hcd
*hcd
)
72 return (struct oxu_hcd
*) (hcd
->hcd_priv
);
80 #undef OXU_VERBOSE_DEBUG
82 #ifdef OXU_VERBOSE_DEBUG
83 #define oxu_vdbg oxu_dbg
85 #define oxu_vdbg(oxu, fmt, args...) /* Nop */
90 static int __attribute__((__unused__
))
91 dbg_status_buf(char *buf
, unsigned len
, const char *label
, u32 status
)
93 return scnprintf(buf
, len
, "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s",
94 label
, label
[0] ? " " : "", status
,
95 (status
& STS_ASS
) ? " Async" : "",
96 (status
& STS_PSS
) ? " Periodic" : "",
97 (status
& STS_RECL
) ? " Recl" : "",
98 (status
& STS_HALT
) ? " Halt" : "",
99 (status
& STS_IAA
) ? " IAA" : "",
100 (status
& STS_FATAL
) ? " FATAL" : "",
101 (status
& STS_FLR
) ? " FLR" : "",
102 (status
& STS_PCD
) ? " PCD" : "",
103 (status
& STS_ERR
) ? " ERR" : "",
104 (status
& STS_INT
) ? " INT" : ""
108 static int __attribute__((__unused__
))
109 dbg_intr_buf(char *buf
, unsigned len
, const char *label
, u32 enable
)
111 return scnprintf(buf
, len
, "%s%sintrenable %02x%s%s%s%s%s%s",
112 label
, label
[0] ? " " : "", enable
,
113 (enable
& STS_IAA
) ? " IAA" : "",
114 (enable
& STS_FATAL
) ? " FATAL" : "",
115 (enable
& STS_FLR
) ? " FLR" : "",
116 (enable
& STS_PCD
) ? " PCD" : "",
117 (enable
& STS_ERR
) ? " ERR" : "",
118 (enable
& STS_INT
) ? " INT" : ""
122 static const char *const fls_strings
[] =
123 { "1024", "512", "256", "??" };
125 static int dbg_command_buf(char *buf
, unsigned len
,
126 const char *label
, u32 command
)
128 return scnprintf(buf
, len
,
129 "%s%scommand %06x %s=%d ithresh=%d%s%s%s%s period=%s%s %s",
130 label
, label
[0] ? " " : "", command
,
131 (command
& CMD_PARK
) ? "park" : "(park)",
132 CMD_PARK_CNT(command
),
133 (command
>> 16) & 0x3f,
134 (command
& CMD_LRESET
) ? " LReset" : "",
135 (command
& CMD_IAAD
) ? " IAAD" : "",
136 (command
& CMD_ASE
) ? " Async" : "",
137 (command
& CMD_PSE
) ? " Periodic" : "",
138 fls_strings
[(command
>> 2) & 0x3],
139 (command
& CMD_RESET
) ? " Reset" : "",
140 (command
& CMD_RUN
) ? "RUN" : "HALT"
144 static int dbg_port_buf(char *buf
, unsigned len
, const char *label
,
145 int port
, u32 status
)
149 /* signaling state */
150 switch (status
& (3 << 10)) {
155 sig
= "k"; /* low speed */
165 return scnprintf(buf
, len
,
166 "%s%sport %d status %06x%s%s sig=%s%s%s%s%s%s%s%s%s%s",
167 label
, label
[0] ? " " : "", port
, status
,
168 (status
& PORT_POWER
) ? " POWER" : "",
169 (status
& PORT_OWNER
) ? " OWNER" : "",
171 (status
& PORT_RESET
) ? " RESET" : "",
172 (status
& PORT_SUSPEND
) ? " SUSPEND" : "",
173 (status
& PORT_RESUME
) ? " RESUME" : "",
174 (status
& PORT_OCC
) ? " OCC" : "",
175 (status
& PORT_OC
) ? " OC" : "",
176 (status
& PORT_PEC
) ? " PEC" : "",
177 (status
& PORT_PE
) ? " PE" : "",
178 (status
& PORT_CSC
) ? " CSC" : "",
179 (status
& PORT_CONNECT
) ? " CONNECT" : ""
185 static inline int __attribute__((__unused__
))
186 dbg_status_buf(char *buf
, unsigned len
, const char *label
, u32 status
)
189 static inline int __attribute__((__unused__
))
190 dbg_command_buf(char *buf
, unsigned len
, const char *label
, u32 command
)
193 static inline int __attribute__((__unused__
))
194 dbg_intr_buf(char *buf
, unsigned len
, const char *label
, u32 enable
)
197 static inline int __attribute__((__unused__
))
198 dbg_port_buf(char *buf
, unsigned len
, const char *label
, int port
, u32 status
)
203 /* functions have the "wrong" filename when they're output... */
204 #define dbg_status(oxu, label, status) { \
206 dbg_status_buf(_buf, sizeof _buf, label, status); \
207 oxu_dbg(oxu, "%s\n", _buf); \
210 #define dbg_cmd(oxu, label, command) { \
212 dbg_command_buf(_buf, sizeof _buf, label, command); \
213 oxu_dbg(oxu, "%s\n", _buf); \
216 #define dbg_port(oxu, label, port, status) { \
218 dbg_port_buf(_buf, sizeof _buf, label, port, status); \
219 oxu_dbg(oxu, "%s\n", _buf); \
226 /* Initial IRQ latency: faster than hw default */
227 static int log2_irq_thresh
; /* 0 to 6 */
228 module_param(log2_irq_thresh
, int, S_IRUGO
);
229 MODULE_PARM_DESC(log2_irq_thresh
, "log2 IRQ latency, 1-64 microframes");
231 /* Initial park setting: slower than hw default */
232 static unsigned park
;
233 module_param(park
, uint
, S_IRUGO
);
234 MODULE_PARM_DESC(park
, "park setting; 1-3 back-to-back async packets");
236 /* For flakey hardware, ignore overcurrent indicators */
237 static int ignore_oc
;
238 module_param(ignore_oc
, bool, S_IRUGO
);
239 MODULE_PARM_DESC(ignore_oc
, "ignore bogus hardware overcurrent indications");
242 static void ehci_work(struct oxu_hcd
*oxu
);
243 static int oxu_hub_control(struct usb_hcd
*hcd
,
244 u16 typeReq
, u16 wValue
, u16 wIndex
,
245 char *buf
, u16 wLength
);
251 /* Low level read/write registers functions */
252 static inline u32
oxu_readl(void *base
, u32 reg
)
254 return readl(base
+ reg
);
257 static inline void oxu_writel(void *base
, u32 reg
, u32 val
)
259 writel(val
, base
+ reg
);
262 static inline void timer_action_done(struct oxu_hcd
*oxu
,
263 enum ehci_timer_action action
)
265 clear_bit(action
, &oxu
->actions
);
268 static inline void timer_action(struct oxu_hcd
*oxu
,
269 enum ehci_timer_action action
)
271 if (!test_and_set_bit(action
, &oxu
->actions
)) {
275 case TIMER_IAA_WATCHDOG
:
276 t
= EHCI_IAA_JIFFIES
;
278 case TIMER_IO_WATCHDOG
:
281 case TIMER_ASYNC_OFF
:
282 t
= EHCI_ASYNC_JIFFIES
;
284 case TIMER_ASYNC_SHRINK
:
286 t
= EHCI_SHRINK_JIFFIES
;
290 /* all timings except IAA watchdog can be overridden.
291 * async queue SHRINK often precedes IAA. while it's ready
292 * to go OFF neither can matter, and afterwards the IO
293 * watchdog stops unless there's still periodic traffic.
295 if (action
!= TIMER_IAA_WATCHDOG
296 && t
> oxu
->watchdog
.expires
297 && timer_pending(&oxu
->watchdog
))
299 mod_timer(&oxu
->watchdog
, t
);
304 * handshake - spin reading hc until handshake completes or fails
305 * @ptr: address of hc register to be read
306 * @mask: bits to look at in result of read
307 * @done: value of those bits when handshake succeeds
308 * @usec: timeout in microseconds
310 * Returns negative errno, or zero on success
312 * Success happens when the "mask" bits have the specified value (hardware
313 * handshake done). There are two failure modes: "usec" have passed (major
314 * hardware flakeout), or the register reads as all-ones (hardware removed).
316 * That last failure should_only happen in cases like physical cardbus eject
317 * before driver shutdown. But it also seems to be caused by bugs in cardbus
318 * bridge shutdown: shutting down the bridge before the devices using it.
320 static int handshake(struct oxu_hcd
*oxu
, void __iomem
*ptr
,
321 u32 mask
, u32 done
, int usec
)
327 if (result
== ~(u32
)0) /* card removed */
338 /* Force HC to halt state from unknown (EHCI spec section 2.3) */
339 static int ehci_halt(struct oxu_hcd
*oxu
)
341 u32 temp
= readl(&oxu
->regs
->status
);
343 /* disable any irqs left enabled by previous code */
344 writel(0, &oxu
->regs
->intr_enable
);
346 if ((temp
& STS_HALT
) != 0)
349 temp
= readl(&oxu
->regs
->command
);
351 writel(temp
, &oxu
->regs
->command
);
352 return handshake(oxu
, &oxu
->regs
->status
,
353 STS_HALT
, STS_HALT
, 16 * 125);
356 /* Put TDI/ARC silicon into EHCI mode */
357 static void tdi_reset(struct oxu_hcd
*oxu
)
359 u32 __iomem
*reg_ptr
;
362 reg_ptr
= (u32 __iomem
*)(((u8 __iomem
*)oxu
->regs
) + 0x68);
363 tmp
= readl(reg_ptr
);
365 writel(tmp
, reg_ptr
);
368 /* Reset a non-running (STS_HALT == 1) controller */
369 static int ehci_reset(struct oxu_hcd
*oxu
)
372 u32 command
= readl(&oxu
->regs
->command
);
374 command
|= CMD_RESET
;
375 dbg_cmd(oxu
, "reset", command
);
376 writel(command
, &oxu
->regs
->command
);
377 oxu_to_hcd(oxu
)->state
= HC_STATE_HALT
;
378 oxu
->next_statechange
= jiffies
;
379 retval
= handshake(oxu
, &oxu
->regs
->command
,
380 CMD_RESET
, 0, 250 * 1000);
390 /* Idle the controller (from running) */
391 static void ehci_quiesce(struct oxu_hcd
*oxu
)
396 if (!HC_IS_RUNNING(oxu_to_hcd(oxu
)->state
))
400 /* wait for any schedule enables/disables to take effect */
401 temp
= readl(&oxu
->regs
->command
) << 10;
402 temp
&= STS_ASS
| STS_PSS
;
403 if (handshake(oxu
, &oxu
->regs
->status
, STS_ASS
| STS_PSS
,
404 temp
, 16 * 125) != 0) {
405 oxu_to_hcd(oxu
)->state
= HC_STATE_HALT
;
409 /* then disable anything that's still active */
410 temp
= readl(&oxu
->regs
->command
);
411 temp
&= ~(CMD_ASE
| CMD_IAAD
| CMD_PSE
);
412 writel(temp
, &oxu
->regs
->command
);
414 /* hardware can take 16 microframes to turn off ... */
415 if (handshake(oxu
, &oxu
->regs
->status
, STS_ASS
| STS_PSS
,
417 oxu_to_hcd(oxu
)->state
= HC_STATE_HALT
;
422 static int check_reset_complete(struct oxu_hcd
*oxu
, int index
,
423 u32 __iomem
*status_reg
, int port_status
)
425 if (!(port_status
& PORT_CONNECT
)) {
426 oxu
->reset_done
[index
] = 0;
430 /* if reset finished and it's still not enabled -- handoff */
431 if (!(port_status
& PORT_PE
)) {
432 oxu_dbg(oxu
, "Failed to enable port %d on root hub TT\n",
436 oxu_dbg(oxu
, "port %d high speed\n", index
+ 1);
441 static void ehci_hub_descriptor(struct oxu_hcd
*oxu
,
442 struct usb_hub_descriptor
*desc
)
444 int ports
= HCS_N_PORTS(oxu
->hcs_params
);
447 desc
->bDescriptorType
= 0x29;
448 desc
->bPwrOn2PwrGood
= 10; /* oxu 1.0, 2.3.9 says 20ms max */
449 desc
->bHubContrCurrent
= 0;
451 desc
->bNbrPorts
= ports
;
452 temp
= 1 + (ports
/ 8);
453 desc
->bDescLength
= 7 + 2 * temp
;
455 /* two bitmaps: ports removable, and usb 1.0 legacy PortPwrCtrlMask */
456 memset(&desc
->bitmap
[0], 0, temp
);
457 memset(&desc
->bitmap
[temp
], 0xff, temp
);
459 temp
= 0x0008; /* per-port overcurrent reporting */
460 if (HCS_PPC(oxu
->hcs_params
))
461 temp
|= 0x0001; /* per-port power control */
463 temp
|= 0x0002; /* no power switching */
464 desc
->wHubCharacteristics
= (__force __u16
)cpu_to_le16(temp
);
468 /* Allocate an OXU210HP on-chip memory data buffer
470 * An on-chip memory data buffer is required for each OXU210HP USB transfer.
471 * Each transfer descriptor has one or more on-chip memory data buffers.
473 * Data buffers are allocated from a fix sized pool of data blocks.
474 * To minimise fragmentation and give reasonable memory utlisation,
475 * data buffers are allocated with sizes the power of 2 multiples of
476 * the block size, starting on an address a multiple of the allocated size.
478 * FIXME: callers of this function require a buffer to be allocated for
479 * len=0. This is a waste of on-chip memory and should be fix. Then this
480 * function should be changed to not allocate a buffer for len=0.
482 static int oxu_buf_alloc(struct oxu_hcd
*oxu
, struct ehci_qtd
*qtd
, int len
)
484 int n_blocks
; /* minium blocks needed to hold len */
485 int a_blocks
; /* blocks allocated */
488 /* Don't allocte bigger than supported */
489 if (len
> BUFFER_SIZE
* BUFFER_NUM
) {
490 oxu_err(oxu
, "buffer too big (%d)\n", len
);
494 spin_lock(&oxu
->mem_lock
);
496 /* Number of blocks needed to hold len */
497 n_blocks
= (len
+ BUFFER_SIZE
- 1) / BUFFER_SIZE
;
499 /* Round the number of blocks up to the power of 2 */
500 for (a_blocks
= 1; a_blocks
< n_blocks
; a_blocks
<<= 1)
503 /* Find a suitable available data buffer */
504 for (i
= 0; i
< BUFFER_NUM
;
505 i
+= max(a_blocks
, (int)oxu
->db_used
[i
])) {
507 /* Check all the required blocks are available */
508 for (j
= 0; j
< a_blocks
; j
++)
509 if (oxu
->db_used
[i
+ j
])
515 /* Allocate blocks found! */
516 qtd
->buffer
= (void *) &oxu
->mem
->db_pool
[i
];
517 qtd
->buffer_dma
= virt_to_phys(qtd
->buffer
);
519 qtd
->qtd_buffer_len
= BUFFER_SIZE
* a_blocks
;
520 oxu
->db_used
[i
] = a_blocks
;
522 spin_unlock(&oxu
->mem_lock
);
529 spin_unlock(&oxu
->mem_lock
);
534 static void oxu_buf_free(struct oxu_hcd
*oxu
, struct ehci_qtd
*qtd
)
538 spin_lock(&oxu
->mem_lock
);
540 index
= (qtd
->buffer
- (void *) &oxu
->mem
->db_pool
[0])
542 oxu
->db_used
[index
] = 0;
543 qtd
->qtd_buffer_len
= 0;
547 spin_unlock(&oxu
->mem_lock
);
552 static inline void ehci_qtd_init(struct ehci_qtd
*qtd
, dma_addr_t dma
)
554 memset(qtd
, 0, sizeof *qtd
);
556 qtd
->hw_token
= cpu_to_le32(QTD_STS_HALT
);
557 qtd
->hw_next
= EHCI_LIST_END
;
558 qtd
->hw_alt_next
= EHCI_LIST_END
;
559 INIT_LIST_HEAD(&qtd
->qtd_list
);
562 static inline void oxu_qtd_free(struct oxu_hcd
*oxu
, struct ehci_qtd
*qtd
)
567 oxu_buf_free(oxu
, qtd
);
569 spin_lock(&oxu
->mem_lock
);
571 index
= qtd
- &oxu
->mem
->qtd_pool
[0];
572 oxu
->qtd_used
[index
] = 0;
574 spin_unlock(&oxu
->mem_lock
);
579 static struct ehci_qtd
*ehci_qtd_alloc(struct oxu_hcd
*oxu
)
582 struct ehci_qtd
*qtd
= NULL
;
584 spin_lock(&oxu
->mem_lock
);
586 for (i
= 0; i
< QTD_NUM
; i
++)
587 if (!oxu
->qtd_used
[i
])
591 qtd
= (struct ehci_qtd
*) &oxu
->mem
->qtd_pool
[i
];
592 memset(qtd
, 0, sizeof *qtd
);
594 qtd
->hw_token
= cpu_to_le32(QTD_STS_HALT
);
595 qtd
->hw_next
= EHCI_LIST_END
;
596 qtd
->hw_alt_next
= EHCI_LIST_END
;
597 INIT_LIST_HEAD(&qtd
->qtd_list
);
599 qtd
->qtd_dma
= virt_to_phys(qtd
);
601 oxu
->qtd_used
[i
] = 1;
604 spin_unlock(&oxu
->mem_lock
);
609 static void oxu_qh_free(struct oxu_hcd
*oxu
, struct ehci_qh
*qh
)
613 spin_lock(&oxu
->mem_lock
);
615 index
= qh
- &oxu
->mem
->qh_pool
[0];
616 oxu
->qh_used
[index
] = 0;
618 spin_unlock(&oxu
->mem_lock
);
623 static void qh_destroy(struct kref
*kref
)
625 struct ehci_qh
*qh
= container_of(kref
, struct ehci_qh
, kref
);
626 struct oxu_hcd
*oxu
= qh
->oxu
;
628 /* clean qtds first, and know this is not linked */
629 if (!list_empty(&qh
->qtd_list
) || qh
->qh_next
.ptr
) {
630 oxu_dbg(oxu
, "unused qh not empty!\n");
634 oxu_qtd_free(oxu
, qh
->dummy
);
635 oxu_qh_free(oxu
, qh
);
638 static struct ehci_qh
*oxu_qh_alloc(struct oxu_hcd
*oxu
)
641 struct ehci_qh
*qh
= NULL
;
643 spin_lock(&oxu
->mem_lock
);
645 for (i
= 0; i
< QHEAD_NUM
; i
++)
646 if (!oxu
->qh_used
[i
])
650 qh
= (struct ehci_qh
*) &oxu
->mem
->qh_pool
[i
];
651 memset(qh
, 0, sizeof *qh
);
653 kref_init(&qh
->kref
);
655 qh
->qh_dma
= virt_to_phys(qh
);
656 INIT_LIST_HEAD(&qh
->qtd_list
);
658 /* dummy td enables safe urb queuing */
659 qh
->dummy
= ehci_qtd_alloc(oxu
);
660 if (qh
->dummy
== NULL
) {
661 oxu_dbg(oxu
, "no dummy td\n");
670 spin_unlock(&oxu
->mem_lock
);
675 /* to share a qh (cpu threads, or hc) */
676 static inline struct ehci_qh
*qh_get(struct ehci_qh
*qh
)
682 static inline void qh_put(struct ehci_qh
*qh
)
684 kref_put(&qh
->kref
, qh_destroy
);
687 static void oxu_murb_free(struct oxu_hcd
*oxu
, struct oxu_murb
*murb
)
691 spin_lock(&oxu
->mem_lock
);
693 index
= murb
- &oxu
->murb_pool
[0];
694 oxu
->murb_used
[index
] = 0;
696 spin_unlock(&oxu
->mem_lock
);
701 static struct oxu_murb
*oxu_murb_alloc(struct oxu_hcd
*oxu
)
705 struct oxu_murb
*murb
= NULL
;
707 spin_lock(&oxu
->mem_lock
);
709 for (i
= 0; i
< MURB_NUM
; i
++)
710 if (!oxu
->murb_used
[i
])
714 murb
= &(oxu
->murb_pool
)[i
];
716 oxu
->murb_used
[i
] = 1;
719 spin_unlock(&oxu
->mem_lock
);
724 /* The queue heads and transfer descriptors are managed from pools tied
725 * to each of the "per device" structures.
726 * This is the initialisation and cleanup code.
728 static void ehci_mem_cleanup(struct oxu_hcd
*oxu
)
730 kfree(oxu
->murb_pool
);
731 oxu
->murb_pool
= NULL
;
737 del_timer(&oxu
->urb_timer
);
739 oxu
->periodic
= NULL
;
741 /* shadow periodic table */
746 /* Remember to add cleanup code (above) if you add anything here.
748 static int ehci_mem_init(struct oxu_hcd
*oxu
, gfp_t flags
)
752 for (i
= 0; i
< oxu
->periodic_size
; i
++)
753 oxu
->mem
->frame_list
[i
] = EHCI_LIST_END
;
754 for (i
= 0; i
< QHEAD_NUM
; i
++)
756 for (i
= 0; i
< QTD_NUM
; i
++)
757 oxu
->qtd_used
[i
] = 0;
759 oxu
->murb_pool
= kcalloc(MURB_NUM
, sizeof(struct oxu_murb
), flags
);
763 for (i
= 0; i
< MURB_NUM
; i
++)
764 oxu
->murb_used
[i
] = 0;
766 oxu
->async
= oxu_qh_alloc(oxu
);
770 oxu
->periodic
= (__le32
*) &oxu
->mem
->frame_list
;
771 oxu
->periodic_dma
= virt_to_phys(oxu
->periodic
);
773 for (i
= 0; i
< oxu
->periodic_size
; i
++)
774 oxu
->periodic
[i
] = EHCI_LIST_END
;
776 /* software shadow of hardware table */
777 oxu
->pshadow
= kcalloc(oxu
->periodic_size
, sizeof(void *), flags
);
778 if (oxu
->pshadow
!= NULL
)
782 oxu_dbg(oxu
, "couldn't init memory\n");
783 ehci_mem_cleanup(oxu
);
787 /* Fill a qtd, returning how much of the buffer we were able to queue up.
789 static int qtd_fill(struct ehci_qtd
*qtd
, dma_addr_t buf
, size_t len
,
790 int token
, int maxpacket
)
795 /* one buffer entry per 4K ... first might be short or unaligned */
796 qtd
->hw_buf
[0] = cpu_to_le32((u32
)addr
);
797 qtd
->hw_buf_hi
[0] = cpu_to_le32((u32
)(addr
>> 32));
798 count
= 0x1000 - (buf
& 0x0fff); /* rest of that page */
799 if (likely(len
< count
)) /* ... iff needed */
805 /* per-qtd limit: from 16K to 20K (best alignment) */
806 for (i
= 1; count
< len
&& i
< 5; i
++) {
808 qtd
->hw_buf
[i
] = cpu_to_le32((u32
)addr
);
809 qtd
->hw_buf_hi
[i
] = cpu_to_le32((u32
)(addr
>> 32));
811 if ((count
+ 0x1000) < len
)
817 /* short packets may only terminate transfers */
819 count
-= (count
% maxpacket
);
821 qtd
->hw_token
= cpu_to_le32((count
<< 16) | token
);
827 static inline void qh_update(struct oxu_hcd
*oxu
,
828 struct ehci_qh
*qh
, struct ehci_qtd
*qtd
)
830 /* writes to an active overlay are unsafe */
831 BUG_ON(qh
->qh_state
!= QH_STATE_IDLE
);
833 qh
->hw_qtd_next
= QTD_NEXT(qtd
->qtd_dma
);
834 qh
->hw_alt_next
= EHCI_LIST_END
;
836 /* Except for control endpoints, we make hardware maintain data
837 * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
838 * and set the pseudo-toggle in udev. Only usb_clear_halt() will
841 if (!(qh
->hw_info1
& cpu_to_le32(1 << 14))) {
842 unsigned is_out
, epnum
;
844 is_out
= !(qtd
->hw_token
& cpu_to_le32(1 << 8));
845 epnum
= (le32_to_cpup(&qh
->hw_info1
) >> 8) & 0x0f;
846 if (unlikely(!usb_gettoggle(qh
->dev
, epnum
, is_out
))) {
847 qh
->hw_token
&= ~cpu_to_le32(QTD_TOGGLE
);
848 usb_settoggle(qh
->dev
, epnum
, is_out
, 1);
852 /* HC must see latest qtd and qh data before we clear ACTIVE+HALT */
854 qh
->hw_token
&= cpu_to_le32(QTD_TOGGLE
| QTD_STS_PING
);
857 /* If it weren't for a common silicon quirk (writing the dummy into the qh
858 * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
859 * recovery (including urb dequeue) would need software changes to a QH...
861 static void qh_refresh(struct oxu_hcd
*oxu
, struct ehci_qh
*qh
)
863 struct ehci_qtd
*qtd
;
865 if (list_empty(&qh
->qtd_list
))
868 qtd
= list_entry(qh
->qtd_list
.next
,
869 struct ehci_qtd
, qtd_list
);
870 /* first qtd may already be partially processed */
871 if (cpu_to_le32(qtd
->qtd_dma
) == qh
->hw_current
)
876 qh_update(oxu
, qh
, qtd
);
879 static void qtd_copy_status(struct oxu_hcd
*oxu
, struct urb
*urb
,
880 size_t length
, u32 token
)
882 /* count IN/OUT bytes, not SETUP (even short packets) */
883 if (likely(QTD_PID(token
) != 2))
884 urb
->actual_length
+= length
- QTD_LENGTH(token
);
886 /* don't modify error codes */
887 if (unlikely(urb
->status
!= -EINPROGRESS
))
890 /* force cleanup after short read; not always an error */
891 if (unlikely(IS_SHORT_READ(token
)))
892 urb
->status
= -EREMOTEIO
;
894 /* serious "can't proceed" faults reported by the hardware */
895 if (token
& QTD_STS_HALT
) {
896 if (token
& QTD_STS_BABBLE
) {
897 /* FIXME "must" disable babbling device's port too */
898 urb
->status
= -EOVERFLOW
;
899 } else if (token
& QTD_STS_MMF
) {
900 /* fs/ls interrupt xfer missed the complete-split */
901 urb
->status
= -EPROTO
;
902 } else if (token
& QTD_STS_DBE
) {
903 urb
->status
= (QTD_PID(token
) == 1) /* IN ? */
904 ? -ENOSR
/* hc couldn't read data */
905 : -ECOMM
; /* hc couldn't write data */
906 } else if (token
& QTD_STS_XACT
) {
907 /* timeout, bad crc, wrong PID, etc; retried */
909 urb
->status
= -EPIPE
;
911 oxu_dbg(oxu
, "devpath %s ep%d%s 3strikes\n",
913 usb_pipeendpoint(urb
->pipe
),
914 usb_pipein(urb
->pipe
) ? "in" : "out");
915 urb
->status
= -EPROTO
;
917 /* CERR nonzero + no errors + halt --> stall */
918 } else if (QTD_CERR(token
))
919 urb
->status
= -EPIPE
;
921 urb
->status
= -EPROTO
;
923 oxu_vdbg(oxu
, "dev%d ep%d%s qtd token %08x --> status %d\n",
924 usb_pipedevice(urb
->pipe
),
925 usb_pipeendpoint(urb
->pipe
),
926 usb_pipein(urb
->pipe
) ? "in" : "out",
931 static void ehci_urb_done(struct oxu_hcd
*oxu
, struct urb
*urb
)
932 __releases(oxu
->lock
)
933 __acquires(oxu
->lock
)
935 if (likely(urb
->hcpriv
!= NULL
)) {
936 struct ehci_qh
*qh
= (struct ehci_qh
*) urb
->hcpriv
;
938 /* S-mask in a QH means it's an interrupt urb */
939 if ((qh
->hw_info2
& cpu_to_le32(QH_SMASK
)) != 0) {
941 /* ... update hc-wide periodic stats (for usbfs) */
942 oxu_to_hcd(oxu
)->self
.bandwidth_int_reqs
--;
948 switch (urb
->status
) {
949 case -EINPROGRESS
: /* success */
953 case -EREMOTEIO
: /* fault or normal */
954 if (!(urb
->transfer_flags
& URB_SHORT_NOT_OK
))
957 case -ECONNRESET
: /* canceled */
963 oxu_dbg(oxu
, "%s %s urb %p ep%d%s status %d len %d/%d\n",
964 __func__
, urb
->dev
->devpath
, urb
,
965 usb_pipeendpoint(urb
->pipe
),
966 usb_pipein(urb
->pipe
) ? "in" : "out",
968 urb
->actual_length
, urb
->transfer_buffer_length
);
971 /* complete() can reenter this HCD */
972 spin_unlock(&oxu
->lock
);
973 usb_hcd_giveback_urb(oxu_to_hcd(oxu
), urb
, urb
->status
);
974 spin_lock(&oxu
->lock
);
977 static void start_unlink_async(struct oxu_hcd
*oxu
, struct ehci_qh
*qh
);
978 static void unlink_async(struct oxu_hcd
*oxu
, struct ehci_qh
*qh
);
980 static void intr_deschedule(struct oxu_hcd
*oxu
, struct ehci_qh
*qh
);
981 static int qh_schedule(struct oxu_hcd
*oxu
, struct ehci_qh
*qh
);
983 #define HALT_BIT cpu_to_le32(QTD_STS_HALT)
985 /* Process and free completed qtds for a qh, returning URBs to drivers.
986 * Chases up to qh->hw_current. Returns number of completions called,
987 * indicating how much "real" work we did.
989 static unsigned qh_completions(struct oxu_hcd
*oxu
, struct ehci_qh
*qh
)
991 struct ehci_qtd
*last
= NULL
, *end
= qh
->dummy
;
992 struct list_head
*entry
, *tmp
;
997 struct oxu_murb
*murb
= NULL
;
999 if (unlikely(list_empty(&qh
->qtd_list
)))
1002 /* completions (or tasks on other cpus) must never clobber HALT
1003 * till we've gone through and cleaned everything up, even when
1004 * they add urbs to this qh's queue or mark them for unlinking.
1006 * NOTE: unlinking expects to be done in queue order.
1008 state
= qh
->qh_state
;
1009 qh
->qh_state
= QH_STATE_COMPLETING
;
1010 stopped
= (state
== QH_STATE_IDLE
);
1012 /* remove de-activated QTDs from front of queue.
1013 * after faults (including short reads), cleanup this urb
1014 * then let the queue advance.
1015 * if queue is stopped, handles unlinks.
1017 list_for_each_safe(entry
, tmp
, &qh
->qtd_list
) {
1018 struct ehci_qtd
*qtd
;
1022 qtd
= list_entry(entry
, struct ehci_qtd
, qtd_list
);
1025 /* Clean up any state from previous QTD ...*/
1027 if (likely(last
->urb
!= urb
)) {
1028 if (last
->urb
->complete
== NULL
) {
1029 murb
= (struct oxu_murb
*) last
->urb
;
1030 last
->urb
= murb
->main
;
1032 ehci_urb_done(oxu
, last
->urb
);
1035 oxu_murb_free(oxu
, murb
);
1037 ehci_urb_done(oxu
, last
->urb
);
1041 oxu_qtd_free(oxu
, last
);
1045 /* ignore urbs submitted during completions we reported */
1049 /* hardware copies qtd out of qh overlay */
1051 token
= le32_to_cpu(qtd
->hw_token
);
1053 /* always clean up qtds the hc de-activated */
1054 if ((token
& QTD_STS_ACTIVE
) == 0) {
1056 if ((token
& QTD_STS_HALT
) != 0) {
1059 /* magic dummy for some short reads; qh won't advance.
1060 * that silicon quirk can kick in with this dummy too.
1062 } else if (IS_SHORT_READ(token
) &&
1063 !(qtd
->hw_alt_next
& EHCI_LIST_END
)) {
1068 /* stop scanning when we reach qtds the hc is using */
1069 } else if (likely(!stopped
&&
1070 HC_IS_RUNNING(oxu_to_hcd(oxu
)->state
))) {
1076 if (unlikely(!HC_IS_RUNNING(oxu_to_hcd(oxu
)->state
)))
1077 urb
->status
= -ESHUTDOWN
;
1079 /* ignore active urbs unless some previous qtd
1080 * for the urb faulted (including short read) or
1081 * its urb was canceled. we may patch qh or qtds.
1083 if (likely(urb
->status
== -EINPROGRESS
))
1086 /* issue status after short control reads */
1087 if (unlikely(do_status
!= 0)
1088 && QTD_PID(token
) == 0 /* OUT */) {
1093 /* token in overlay may be most current */
1094 if (state
== QH_STATE_IDLE
1095 && cpu_to_le32(qtd
->qtd_dma
)
1097 token
= le32_to_cpu(qh
->hw_token
);
1099 /* force halt for unlinked or blocked qh, so we'll
1100 * patch the qh later and so that completions can't
1101 * activate it while we "know" it's stopped.
1103 if ((HALT_BIT
& qh
->hw_token
) == 0) {
1105 qh
->hw_token
|= HALT_BIT
;
1110 /* Remove it from the queue */
1111 qtd_copy_status(oxu
, urb
->complete
?
1112 urb
: ((struct oxu_murb
*) urb
)->main
,
1113 qtd
->length
, token
);
1114 if ((usb_pipein(qtd
->urb
->pipe
)) &&
1115 (NULL
!= qtd
->transfer_buffer
))
1116 memcpy(qtd
->transfer_buffer
, qtd
->buffer
, qtd
->length
);
1117 do_status
= (urb
->status
== -EREMOTEIO
)
1118 && usb_pipecontrol(urb
->pipe
);
1120 if (stopped
&& qtd
->qtd_list
.prev
!= &qh
->qtd_list
) {
1121 last
= list_entry(qtd
->qtd_list
.prev
,
1122 struct ehci_qtd
, qtd_list
);
1123 last
->hw_next
= qtd
->hw_next
;
1125 list_del(&qtd
->qtd_list
);
1129 /* last urb's completion might still need calling */
1130 if (likely(last
!= NULL
)) {
1131 if (last
->urb
->complete
== NULL
) {
1132 murb
= (struct oxu_murb
*) last
->urb
;
1133 last
->urb
= murb
->main
;
1135 ehci_urb_done(oxu
, last
->urb
);
1138 oxu_murb_free(oxu
, murb
);
1140 ehci_urb_done(oxu
, last
->urb
);
1143 oxu_qtd_free(oxu
, last
);
1146 /* restore original state; caller must unlink or relink */
1147 qh
->qh_state
= state
;
1149 /* be sure the hardware's done with the qh before refreshing
1150 * it after fault cleanup, or recovering from silicon wrongly
1151 * overlaying the dummy qtd (which reduces DMA chatter).
1153 if (stopped
!= 0 || qh
->hw_qtd_next
== EHCI_LIST_END
) {
1156 qh_refresh(oxu
, qh
);
1158 case QH_STATE_LINKED
:
1159 /* should be rare for periodic transfers,
1160 * except maybe high bandwidth ...
1162 if ((cpu_to_le32(QH_SMASK
)
1163 & qh
->hw_info2
) != 0) {
1164 intr_deschedule(oxu
, qh
);
1165 (void) qh_schedule(oxu
, qh
);
1167 unlink_async(oxu
, qh
);
1169 /* otherwise, unlink already started */
1176 /* High bandwidth multiplier, as encoded in highspeed endpoint descriptors */
1177 #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
1178 /* ... and packet size, for any kind of endpoint descriptor */
1179 #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
1181 /* Reverse of qh_urb_transaction: free a list of TDs.
1182 * used for cleanup after errors, before HC sees an URB's TDs.
1184 static void qtd_list_free(struct oxu_hcd
*oxu
,
1185 struct urb
*urb
, struct list_head
*qtd_list
)
1187 struct list_head
*entry
, *temp
;
1189 list_for_each_safe(entry
, temp
, qtd_list
) {
1190 struct ehci_qtd
*qtd
;
1192 qtd
= list_entry(entry
, struct ehci_qtd
, qtd_list
);
1193 list_del(&qtd
->qtd_list
);
1194 oxu_qtd_free(oxu
, qtd
);
1198 /* Create a list of filled qtds for this URB; won't link into qh.
1200 static struct list_head
*qh_urb_transaction(struct oxu_hcd
*oxu
,
1202 struct list_head
*head
,
1205 struct ehci_qtd
*qtd
, *qtd_prev
;
1210 void *transfer_buf
= NULL
;
1214 * URBs map to sequences of QTDs: one logical transaction
1216 qtd
= ehci_qtd_alloc(oxu
);
1219 list_add_tail(&qtd
->qtd_list
, head
);
1222 token
= QTD_STS_ACTIVE
;
1223 token
|= (EHCI_TUNE_CERR
<< 10);
1224 /* for split transactions, SplitXState initialized to zero */
1226 len
= urb
->transfer_buffer_length
;
1227 is_input
= usb_pipein(urb
->pipe
);
1228 if (!urb
->transfer_buffer
&& urb
->transfer_buffer_length
&& is_input
)
1229 urb
->transfer_buffer
= phys_to_virt(urb
->transfer_dma
);
1231 if (usb_pipecontrol(urb
->pipe
)) {
1233 ret
= oxu_buf_alloc(oxu
, qtd
, sizeof(struct usb_ctrlrequest
));
1237 qtd_fill(qtd
, qtd
->buffer_dma
, sizeof(struct usb_ctrlrequest
),
1238 token
| (2 /* "setup" */ << 8), 8);
1239 memcpy(qtd
->buffer
, qtd
->urb
->setup_packet
,
1240 sizeof(struct usb_ctrlrequest
));
1242 /* ... and always at least one more pid */
1243 token
^= QTD_TOGGLE
;
1245 qtd
= ehci_qtd_alloc(oxu
);
1249 qtd_prev
->hw_next
= QTD_NEXT(qtd
->qtd_dma
);
1250 list_add_tail(&qtd
->qtd_list
, head
);
1252 /* for zero length DATA stages, STATUS is always IN */
1254 token
|= (1 /* "in" */ << 8);
1258 * Data transfer stage: buffer setup
1261 ret
= oxu_buf_alloc(oxu
, qtd
, len
);
1265 buf
= qtd
->buffer_dma
;
1266 transfer_buf
= urb
->transfer_buffer
;
1269 memcpy(qtd
->buffer
, qtd
->urb
->transfer_buffer
, len
);
1272 token
|= (1 /* "in" */ << 8);
1273 /* else it's already initted to "out" pid (0 << 8) */
1275 maxpacket
= max_packet(usb_maxpacket(urb
->dev
, urb
->pipe
, !is_input
));
1278 * buffer gets wrapped in one or more qtds;
1279 * last one may be "short" (including zero len)
1280 * and may serve as a control status ack
1285 this_qtd_len
= qtd_fill(qtd
, buf
, len
, token
, maxpacket
);
1286 qtd
->transfer_buffer
= transfer_buf
;
1287 len
-= this_qtd_len
;
1288 buf
+= this_qtd_len
;
1289 transfer_buf
+= this_qtd_len
;
1291 qtd
->hw_alt_next
= oxu
->async
->hw_alt_next
;
1293 /* qh makes control packets use qtd toggle; maybe switch it */
1294 if ((maxpacket
& (this_qtd_len
+ (maxpacket
- 1))) == 0)
1295 token
^= QTD_TOGGLE
;
1297 if (likely(len
<= 0))
1301 qtd
= ehci_qtd_alloc(oxu
);
1304 if (likely(len
> 0)) {
1305 ret
= oxu_buf_alloc(oxu
, qtd
, len
);
1310 qtd_prev
->hw_next
= QTD_NEXT(qtd
->qtd_dma
);
1311 list_add_tail(&qtd
->qtd_list
, head
);
1314 /* unless the bulk/interrupt caller wants a chance to clean
1315 * up after short reads, hc should advance qh past this urb
1317 if (likely((urb
->transfer_flags
& URB_SHORT_NOT_OK
) == 0
1318 || usb_pipecontrol(urb
->pipe
)))
1319 qtd
->hw_alt_next
= EHCI_LIST_END
;
1322 * control requests may need a terminating data "status" ack;
1323 * bulk ones may need a terminating short packet (zero length).
1325 if (likely(urb
->transfer_buffer_length
!= 0)) {
1328 if (usb_pipecontrol(urb
->pipe
)) {
1330 token
^= 0x0100; /* "in" <--> "out" */
1331 token
|= QTD_TOGGLE
; /* force DATA1 */
1332 } else if (usb_pipebulk(urb
->pipe
)
1333 && (urb
->transfer_flags
& URB_ZERO_PACKET
)
1334 && !(urb
->transfer_buffer_length
% maxpacket
)) {
1339 qtd
= ehci_qtd_alloc(oxu
);
1343 qtd_prev
->hw_next
= QTD_NEXT(qtd
->qtd_dma
);
1344 list_add_tail(&qtd
->qtd_list
, head
);
1346 /* never any data in such packets */
1347 qtd_fill(qtd
, 0, 0, token
, 0);
1351 /* by default, enable interrupt on urb completion */
1352 qtd
->hw_token
|= cpu_to_le32(QTD_IOC
);
1356 qtd_list_free(oxu
, urb
, head
);
1360 /* Each QH holds a qtd list; a QH is used for everything except iso.
1362 * For interrupt urbs, the scheduler must set the microframe scheduling
1363 * mask(s) each time the QH gets scheduled. For highspeed, that's
1364 * just one microframe in the s-mask. For split interrupt transactions
1365 * there are additional complications: c-mask, maybe FSTNs.
1367 static struct ehci_qh
*qh_make(struct oxu_hcd
*oxu
,
1368 struct urb
*urb
, gfp_t flags
)
1370 struct ehci_qh
*qh
= oxu_qh_alloc(oxu
);
1371 u32 info1
= 0, info2
= 0;
1379 * init endpoint/device data for this QH
1381 info1
|= usb_pipeendpoint(urb
->pipe
) << 8;
1382 info1
|= usb_pipedevice(urb
->pipe
) << 0;
1384 is_input
= usb_pipein(urb
->pipe
);
1385 type
= usb_pipetype(urb
->pipe
);
1386 maxp
= usb_maxpacket(urb
->dev
, urb
->pipe
, !is_input
);
1388 /* Compute interrupt scheduling parameters just once, and save.
1389 * - allowing for high bandwidth, how many nsec/uframe are used?
1390 * - split transactions need a second CSPLIT uframe; same question
1391 * - splits also need a schedule gap (for full/low speed I/O)
1392 * - qh has a polling interval
1394 * For control/bulk requests, the HC or TT handles these.
1396 if (type
== PIPE_INTERRUPT
) {
1397 qh
->usecs
= NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH
,
1399 hb_mult(maxp
) * max_packet(maxp
)));
1400 qh
->start
= NO_FRAME
;
1402 if (urb
->dev
->speed
== USB_SPEED_HIGH
) {
1406 qh
->period
= urb
->interval
>> 3;
1407 if (qh
->period
== 0 && urb
->interval
!= 1) {
1408 /* NOTE interval 2 or 4 uframes could work.
1409 * But interval 1 scheduling is simpler, and
1410 * includes high bandwidth.
1412 dbg("intr period %d uframes, NYET!",
1417 struct usb_tt
*tt
= urb
->dev
->tt
;
1420 /* gap is f(FS/LS transfer times) */
1421 qh
->gap_uf
= 1 + usb_calc_bus_time(urb
->dev
->speed
,
1422 is_input
, 0, maxp
) / (125 * 1000);
1424 /* FIXME this just approximates SPLIT/CSPLIT times */
1425 if (is_input
) { /* SPLIT, gap, CSPLIT+DATA */
1426 qh
->c_usecs
= qh
->usecs
+ HS_USECS(0);
1427 qh
->usecs
= HS_USECS(1);
1428 } else { /* SPLIT+DATA, gap, CSPLIT */
1429 qh
->usecs
+= HS_USECS(1);
1430 qh
->c_usecs
= HS_USECS(0);
1433 think_time
= tt
? tt
->think_time
: 0;
1434 qh
->tt_usecs
= NS_TO_US(think_time
+
1435 usb_calc_bus_time(urb
->dev
->speed
,
1436 is_input
, 0, max_packet(maxp
)));
1437 qh
->period
= urb
->interval
;
1441 /* support for tt scheduling, and access to toggles */
1445 switch (urb
->dev
->speed
) {
1447 info1
|= (1 << 12); /* EPS "low" */
1450 case USB_SPEED_FULL
:
1451 /* EPS 0 means "full" */
1452 if (type
!= PIPE_INTERRUPT
)
1453 info1
|= (EHCI_TUNE_RL_TT
<< 28);
1454 if (type
== PIPE_CONTROL
) {
1455 info1
|= (1 << 27); /* for TT */
1456 info1
|= 1 << 14; /* toggle from qtd */
1458 info1
|= maxp
<< 16;
1460 info2
|= (EHCI_TUNE_MULT_TT
<< 30);
1461 info2
|= urb
->dev
->ttport
<< 23;
1463 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
1467 case USB_SPEED_HIGH
: /* no TT involved */
1468 info1
|= (2 << 12); /* EPS "high" */
1469 if (type
== PIPE_CONTROL
) {
1470 info1
|= (EHCI_TUNE_RL_HS
<< 28);
1471 info1
|= 64 << 16; /* usb2 fixed maxpacket */
1472 info1
|= 1 << 14; /* toggle from qtd */
1473 info2
|= (EHCI_TUNE_MULT_HS
<< 30);
1474 } else if (type
== PIPE_BULK
) {
1475 info1
|= (EHCI_TUNE_RL_HS
<< 28);
1476 info1
|= 512 << 16; /* usb2 fixed maxpacket */
1477 info2
|= (EHCI_TUNE_MULT_HS
<< 30);
1478 } else { /* PIPE_INTERRUPT */
1479 info1
|= max_packet(maxp
) << 16;
1480 info2
|= hb_mult(maxp
) << 30;
1484 dbg("bogus dev %p speed %d", urb
->dev
, urb
->dev
->speed
);
1490 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
1492 /* init as live, toggle clear, advance to dummy */
1493 qh
->qh_state
= QH_STATE_IDLE
;
1494 qh
->hw_info1
= cpu_to_le32(info1
);
1495 qh
->hw_info2
= cpu_to_le32(info2
);
1496 usb_settoggle(urb
->dev
, usb_pipeendpoint(urb
->pipe
), !is_input
, 1);
1497 qh_refresh(oxu
, qh
);
1501 /* Move qh (and its qtds) onto async queue; maybe enable queue.
1503 static void qh_link_async(struct oxu_hcd
*oxu
, struct ehci_qh
*qh
)
1505 __le32 dma
= QH_NEXT(qh
->qh_dma
);
1506 struct ehci_qh
*head
;
1508 /* (re)start the async schedule? */
1510 timer_action_done(oxu
, TIMER_ASYNC_OFF
);
1511 if (!head
->qh_next
.qh
) {
1512 u32 cmd
= readl(&oxu
->regs
->command
);
1514 if (!(cmd
& CMD_ASE
)) {
1515 /* in case a clear of CMD_ASE didn't take yet */
1516 (void)handshake(oxu
, &oxu
->regs
->status
,
1518 cmd
|= CMD_ASE
| CMD_RUN
;
1519 writel(cmd
, &oxu
->regs
->command
);
1520 oxu_to_hcd(oxu
)->state
= HC_STATE_RUNNING
;
1521 /* posted write need not be known to HC yet ... */
1525 /* clear halt and/or toggle; and maybe recover from silicon quirk */
1526 if (qh
->qh_state
== QH_STATE_IDLE
)
1527 qh_refresh(oxu
, qh
);
1529 /* splice right after start */
1530 qh
->qh_next
= head
->qh_next
;
1531 qh
->hw_next
= head
->hw_next
;
1534 head
->qh_next
.qh
= qh
;
1535 head
->hw_next
= dma
;
1537 qh
->qh_state
= QH_STATE_LINKED
;
1538 /* qtd completions reported later by interrupt */
1541 #define QH_ADDR_MASK cpu_to_le32(0x7f)
1544 * For control/bulk/interrupt, return QH with these TDs appended.
1545 * Allocates and initializes the QH if necessary.
1546 * Returns null if it can't allocate a QH it needs to.
1547 * If the QH has TDs (urbs) already, that's great.
1549 static struct ehci_qh
*qh_append_tds(struct oxu_hcd
*oxu
,
1550 struct urb
*urb
, struct list_head
*qtd_list
,
1551 int epnum
, void **ptr
)
1553 struct ehci_qh
*qh
= NULL
;
1555 qh
= (struct ehci_qh
*) *ptr
;
1556 if (unlikely(qh
== NULL
)) {
1557 /* can't sleep here, we have oxu->lock... */
1558 qh
= qh_make(oxu
, urb
, GFP_ATOMIC
);
1561 if (likely(qh
!= NULL
)) {
1562 struct ehci_qtd
*qtd
;
1564 if (unlikely(list_empty(qtd_list
)))
1567 qtd
= list_entry(qtd_list
->next
, struct ehci_qtd
,
1570 /* control qh may need patching ... */
1571 if (unlikely(epnum
== 0)) {
1573 /* usb_reset_device() briefly reverts to address 0 */
1574 if (usb_pipedevice(urb
->pipe
) == 0)
1575 qh
->hw_info1
&= ~QH_ADDR_MASK
;
1578 /* just one way to queue requests: swap with the dummy qtd.
1579 * only hc or qh_refresh() ever modify the overlay.
1581 if (likely(qtd
!= NULL
)) {
1582 struct ehci_qtd
*dummy
;
1586 /* to avoid racing the HC, use the dummy td instead of
1587 * the first td of our list (becomes new dummy). both
1588 * tds stay deactivated until we're done, when the
1589 * HC is allowed to fetch the old dummy (4.10.2).
1591 token
= qtd
->hw_token
;
1592 qtd
->hw_token
= HALT_BIT
;
1596 dma
= dummy
->qtd_dma
;
1598 dummy
->qtd_dma
= dma
;
1600 list_del(&qtd
->qtd_list
);
1601 list_add(&dummy
->qtd_list
, qtd_list
);
1602 list_splice(qtd_list
, qh
->qtd_list
.prev
);
1604 ehci_qtd_init(qtd
, qtd
->qtd_dma
);
1607 /* hc must see the new dummy at list end */
1609 qtd
= list_entry(qh
->qtd_list
.prev
,
1610 struct ehci_qtd
, qtd_list
);
1611 qtd
->hw_next
= QTD_NEXT(dma
);
1613 /* let the hc process these next qtds */
1614 dummy
->hw_token
= (token
& ~(0x80));
1616 dummy
->hw_token
= token
;
1618 urb
->hcpriv
= qh_get(qh
);
1624 static int submit_async(struct oxu_hcd
*oxu
, struct urb
*urb
,
1625 struct list_head
*qtd_list
, gfp_t mem_flags
)
1627 struct ehci_qtd
*qtd
;
1629 unsigned long flags
;
1630 struct ehci_qh
*qh
= NULL
;
1633 qtd
= list_entry(qtd_list
->next
, struct ehci_qtd
, qtd_list
);
1634 epnum
= urb
->ep
->desc
.bEndpointAddress
;
1636 #ifdef OXU_URB_TRACE
1637 oxu_dbg(oxu
, "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
1638 __func__
, urb
->dev
->devpath
, urb
,
1639 epnum
& 0x0f, (epnum
& USB_DIR_IN
) ? "in" : "out",
1640 urb
->transfer_buffer_length
,
1641 qtd
, urb
->ep
->hcpriv
);
1644 spin_lock_irqsave(&oxu
->lock
, flags
);
1645 if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE
,
1646 &oxu_to_hcd(oxu
)->flags
))) {
1651 qh
= qh_append_tds(oxu
, urb
, qtd_list
, epnum
, &urb
->ep
->hcpriv
);
1652 if (unlikely(qh
== NULL
)) {
1657 /* Control/bulk operations through TTs don't need scheduling,
1658 * the HC and TT handle it when the TT has a buffer ready.
1660 if (likely(qh
->qh_state
== QH_STATE_IDLE
))
1661 qh_link_async(oxu
, qh_get(qh
));
1663 spin_unlock_irqrestore(&oxu
->lock
, flags
);
1664 if (unlikely(qh
== NULL
))
1665 qtd_list_free(oxu
, urb
, qtd_list
);
1669 /* The async qh for the qtds being reclaimed are now unlinked from the HC */
1671 static void end_unlink_async(struct oxu_hcd
*oxu
)
1673 struct ehci_qh
*qh
= oxu
->reclaim
;
1674 struct ehci_qh
*next
;
1676 timer_action_done(oxu
, TIMER_IAA_WATCHDOG
);
1678 qh
->qh_state
= QH_STATE_IDLE
;
1679 qh
->qh_next
.qh
= NULL
;
1680 qh_put(qh
); /* refcount from reclaim */
1682 /* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
1684 oxu
->reclaim
= next
;
1685 oxu
->reclaim_ready
= 0;
1688 qh_completions(oxu
, qh
);
1690 if (!list_empty(&qh
->qtd_list
)
1691 && HC_IS_RUNNING(oxu_to_hcd(oxu
)->state
))
1692 qh_link_async(oxu
, qh
);
1694 qh_put(qh
); /* refcount from async list */
1696 /* it's not free to turn the async schedule on/off; leave it
1697 * active but idle for a while once it empties.
1699 if (HC_IS_RUNNING(oxu_to_hcd(oxu
)->state
)
1700 && oxu
->async
->qh_next
.qh
== NULL
)
1701 timer_action(oxu
, TIMER_ASYNC_OFF
);
1705 oxu
->reclaim
= NULL
;
1706 start_unlink_async(oxu
, next
);
1710 /* makes sure the async qh will become idle */
1711 /* caller must own oxu->lock */
1713 static void start_unlink_async(struct oxu_hcd
*oxu
, struct ehci_qh
*qh
)
1715 int cmd
= readl(&oxu
->regs
->command
);
1716 struct ehci_qh
*prev
;
1719 assert_spin_locked(&oxu
->lock
);
1720 if (oxu
->reclaim
|| (qh
->qh_state
!= QH_STATE_LINKED
1721 && qh
->qh_state
!= QH_STATE_UNLINK_WAIT
))
1725 /* stop async schedule right now? */
1726 if (unlikely(qh
== oxu
->async
)) {
1727 /* can't get here without STS_ASS set */
1728 if (oxu_to_hcd(oxu
)->state
!= HC_STATE_HALT
1730 /* ... and CMD_IAAD clear */
1731 writel(cmd
& ~CMD_ASE
, &oxu
->regs
->command
);
1733 /* handshake later, if we need to */
1734 timer_action_done(oxu
, TIMER_ASYNC_OFF
);
1739 qh
->qh_state
= QH_STATE_UNLINK
;
1740 oxu
->reclaim
= qh
= qh_get(qh
);
1743 while (prev
->qh_next
.qh
!= qh
)
1744 prev
= prev
->qh_next
.qh
;
1746 prev
->hw_next
= qh
->hw_next
;
1747 prev
->qh_next
= qh
->qh_next
;
1750 if (unlikely(oxu_to_hcd(oxu
)->state
== HC_STATE_HALT
)) {
1751 /* if (unlikely(qh->reclaim != 0))
1752 * this will recurse, probably not much
1754 end_unlink_async(oxu
);
1758 oxu
->reclaim_ready
= 0;
1760 writel(cmd
, &oxu
->regs
->command
);
1761 (void) readl(&oxu
->regs
->command
);
1762 timer_action(oxu
, TIMER_IAA_WATCHDOG
);
1765 static void scan_async(struct oxu_hcd
*oxu
)
1768 enum ehci_timer_action action
= TIMER_IO_WATCHDOG
;
1770 if (!++(oxu
->stamp
))
1772 timer_action_done(oxu
, TIMER_ASYNC_SHRINK
);
1774 qh
= oxu
->async
->qh_next
.qh
;
1775 if (likely(qh
!= NULL
)) {
1777 /* clean any finished work for this qh */
1778 if (!list_empty(&qh
->qtd_list
)
1779 && qh
->stamp
!= oxu
->stamp
) {
1782 /* unlinks could happen here; completion
1783 * reporting drops the lock. rescan using
1784 * the latest schedule, but don't rescan
1785 * qhs we already finished (no looping).
1788 qh
->stamp
= oxu
->stamp
;
1789 temp
= qh_completions(oxu
, qh
);
1795 /* unlink idle entries, reducing HC PCI usage as well
1796 * as HCD schedule-scanning costs. delay for any qh
1797 * we just scanned, there's a not-unusual case that it
1798 * doesn't stay idle for long.
1799 * (plus, avoids some kind of re-activation race.)
1801 if (list_empty(&qh
->qtd_list
)) {
1802 if (qh
->stamp
== oxu
->stamp
)
1803 action
= TIMER_ASYNC_SHRINK
;
1804 else if (!oxu
->reclaim
1805 && qh
->qh_state
== QH_STATE_LINKED
)
1806 start_unlink_async(oxu
, qh
);
1809 qh
= qh
->qh_next
.qh
;
1812 if (action
== TIMER_ASYNC_SHRINK
)
1813 timer_action(oxu
, TIMER_ASYNC_SHRINK
);
1817 * periodic_next_shadow - return "next" pointer on shadow list
1818 * @periodic: host pointer to qh/itd/sitd
1819 * @tag: hardware tag for type of this record
1821 static union ehci_shadow
*periodic_next_shadow(union ehci_shadow
*periodic
,
1827 return &periodic
->qh
->qh_next
;
1831 /* caller must hold oxu->lock */
1832 static void periodic_unlink(struct oxu_hcd
*oxu
, unsigned frame
, void *ptr
)
1834 union ehci_shadow
*prev_p
= &oxu
->pshadow
[frame
];
1835 __le32
*hw_p
= &oxu
->periodic
[frame
];
1836 union ehci_shadow here
= *prev_p
;
1838 /* find predecessor of "ptr"; hw and shadow lists are in sync */
1839 while (here
.ptr
&& here
.ptr
!= ptr
) {
1840 prev_p
= periodic_next_shadow(prev_p
, Q_NEXT_TYPE(*hw_p
));
1841 hw_p
= here
.hw_next
;
1844 /* an interrupt entry (at list end) could have been shared */
1848 /* update shadow and hardware lists ... the old "next" pointers
1849 * from ptr may still be in use, the caller updates them.
1851 *prev_p
= *periodic_next_shadow(&here
, Q_NEXT_TYPE(*hw_p
));
1852 *hw_p
= *here
.hw_next
;
1855 /* how many of the uframe's 125 usecs are allocated? */
1856 static unsigned short periodic_usecs(struct oxu_hcd
*oxu
,
1857 unsigned frame
, unsigned uframe
)
1859 __le32
*hw_p
= &oxu
->periodic
[frame
];
1860 union ehci_shadow
*q
= &oxu
->pshadow
[frame
];
1864 switch (Q_NEXT_TYPE(*hw_p
)) {
1867 /* is it in the S-mask? */
1868 if (q
->qh
->hw_info2
& cpu_to_le32(1 << uframe
))
1869 usecs
+= q
->qh
->usecs
;
1870 /* ... or C-mask? */
1871 if (q
->qh
->hw_info2
& cpu_to_le32(1 << (8 + uframe
)))
1872 usecs
+= q
->qh
->c_usecs
;
1873 hw_p
= &q
->qh
->hw_next
;
1874 q
= &q
->qh
->qh_next
;
1880 oxu_err(oxu
, "uframe %d sched overrun: %d usecs\n",
1881 frame
* 8 + uframe
, usecs
);
1886 static int enable_periodic(struct oxu_hcd
*oxu
)
1891 /* did clearing PSE did take effect yet?
1892 * takes effect only at frame boundaries...
1894 status
= handshake(oxu
, &oxu
->regs
->status
, STS_PSS
, 0, 9 * 125);
1896 oxu_to_hcd(oxu
)->state
= HC_STATE_HALT
;
1900 cmd
= readl(&oxu
->regs
->command
) | CMD_PSE
;
1901 writel(cmd
, &oxu
->regs
->command
);
1902 /* posted write ... PSS happens later */
1903 oxu_to_hcd(oxu
)->state
= HC_STATE_RUNNING
;
1905 /* make sure ehci_work scans these */
1906 oxu
->next_uframe
= readl(&oxu
->regs
->frame_index
)
1907 % (oxu
->periodic_size
<< 3);
1911 static int disable_periodic(struct oxu_hcd
*oxu
)
1916 /* did setting PSE not take effect yet?
1917 * takes effect only at frame boundaries...
1919 status
= handshake(oxu
, &oxu
->regs
->status
, STS_PSS
, STS_PSS
, 9 * 125);
1921 oxu_to_hcd(oxu
)->state
= HC_STATE_HALT
;
1925 cmd
= readl(&oxu
->regs
->command
) & ~CMD_PSE
;
1926 writel(cmd
, &oxu
->regs
->command
);
1927 /* posted write ... */
1929 oxu
->next_uframe
= -1;
1933 /* periodic schedule slots have iso tds (normal or split) first, then a
1934 * sparse tree for active interrupt transfers.
1936 * this just links in a qh; caller guarantees uframe masks are set right.
1937 * no FSTN support (yet; oxu 0.96+)
1939 static int qh_link_periodic(struct oxu_hcd
*oxu
, struct ehci_qh
*qh
)
1942 unsigned period
= qh
->period
;
1944 dev_dbg(&qh
->dev
->dev
,
1945 "link qh%d-%04x/%p start %d [%d/%d us]\n",
1946 period
, le32_to_cpup(&qh
->hw_info2
) & (QH_CMASK
| QH_SMASK
),
1947 qh
, qh
->start
, qh
->usecs
, qh
->c_usecs
);
1949 /* high bandwidth, or otherwise every microframe */
1953 for (i
= qh
->start
; i
< oxu
->periodic_size
; i
+= period
) {
1954 union ehci_shadow
*prev
= &oxu
->pshadow
[i
];
1955 __le32
*hw_p
= &oxu
->periodic
[i
];
1956 union ehci_shadow here
= *prev
;
1959 /* skip the iso nodes at list head */
1961 type
= Q_NEXT_TYPE(*hw_p
);
1962 if (type
== Q_TYPE_QH
)
1964 prev
= periodic_next_shadow(prev
, type
);
1965 hw_p
= &here
.qh
->hw_next
;
1969 /* sorting each branch by period (slow-->fast)
1970 * enables sharing interior tree nodes
1972 while (here
.ptr
&& qh
!= here
.qh
) {
1973 if (qh
->period
> here
.qh
->period
)
1975 prev
= &here
.qh
->qh_next
;
1976 hw_p
= &here
.qh
->hw_next
;
1979 /* link in this qh, unless some earlier pass did that */
1980 if (qh
!= here
.qh
) {
1983 qh
->hw_next
= *hw_p
;
1986 *hw_p
= QH_NEXT(qh
->qh_dma
);
1989 qh
->qh_state
= QH_STATE_LINKED
;
1992 /* update per-qh bandwidth for usbfs */
1993 oxu_to_hcd(oxu
)->self
.bandwidth_allocated
+= qh
->period
1994 ? ((qh
->usecs
+ qh
->c_usecs
) / qh
->period
)
1997 /* maybe enable periodic schedule processing */
1998 if (!oxu
->periodic_sched
++)
1999 return enable_periodic(oxu
);
2004 static void qh_unlink_periodic(struct oxu_hcd
*oxu
, struct ehci_qh
*qh
)
2010 * IF this isn't high speed
2011 * and this qh is active in the current uframe
2012 * (and overlay token SplitXstate is false?)
2014 * qh->hw_info1 |= cpu_to_le32(1 << 7 "ignore");
2017 /* high bandwidth, or otherwise part of every microframe */
2018 period
= qh
->period
;
2022 for (i
= qh
->start
; i
< oxu
->periodic_size
; i
+= period
)
2023 periodic_unlink(oxu
, i
, qh
);
2025 /* update per-qh bandwidth for usbfs */
2026 oxu_to_hcd(oxu
)->self
.bandwidth_allocated
-= qh
->period
2027 ? ((qh
->usecs
+ qh
->c_usecs
) / qh
->period
)
2030 dev_dbg(&qh
->dev
->dev
,
2031 "unlink qh%d-%04x/%p start %d [%d/%d us]\n",
2033 le32_to_cpup(&qh
->hw_info2
) & (QH_CMASK
| QH_SMASK
),
2034 qh
, qh
->start
, qh
->usecs
, qh
->c_usecs
);
2036 /* qh->qh_next still "live" to HC */
2037 qh
->qh_state
= QH_STATE_UNLINK
;
2038 qh
->qh_next
.ptr
= NULL
;
2041 /* maybe turn off periodic schedule */
2042 oxu
->periodic_sched
--;
2043 if (!oxu
->periodic_sched
)
2044 (void) disable_periodic(oxu
);
2047 static void intr_deschedule(struct oxu_hcd
*oxu
, struct ehci_qh
*qh
)
2051 qh_unlink_periodic(oxu
, qh
);
2053 /* simple/paranoid: always delay, expecting the HC needs to read
2054 * qh->hw_next or finish a writeback after SPLIT/CSPLIT ... and
2055 * expect khubd to clean up after any CSPLITs we won't issue.
2056 * active high speed queues may need bigger delays...
2058 if (list_empty(&qh
->qtd_list
)
2059 || (cpu_to_le32(QH_CMASK
) & qh
->hw_info2
) != 0)
2062 wait
= 55; /* worst case: 3 * 1024 */
2065 qh
->qh_state
= QH_STATE_IDLE
;
2066 qh
->hw_next
= EHCI_LIST_END
;
2070 static int check_period(struct oxu_hcd
*oxu
,
2071 unsigned frame
, unsigned uframe
,
2072 unsigned period
, unsigned usecs
)
2076 /* complete split running into next frame?
2077 * given FSTN support, we could sometimes check...
2083 * 80% periodic == 100 usec/uframe available
2084 * convert "usecs we need" to "max already claimed"
2086 usecs
= 100 - usecs
;
2088 /* we "know" 2 and 4 uframe intervals were rejected; so
2089 * for period 0, check _every_ microframe in the schedule.
2091 if (unlikely(period
== 0)) {
2093 for (uframe
= 0; uframe
< 7; uframe
++) {
2094 claimed
= periodic_usecs(oxu
, frame
, uframe
);
2095 if (claimed
> usecs
)
2098 } while ((frame
+= 1) < oxu
->periodic_size
);
2100 /* just check the specified uframe, at that period */
2103 claimed
= periodic_usecs(oxu
, frame
, uframe
);
2104 if (claimed
> usecs
)
2106 } while ((frame
+= period
) < oxu
->periodic_size
);
2112 static int check_intr_schedule(struct oxu_hcd
*oxu
,
2113 unsigned frame
, unsigned uframe
,
2114 const struct ehci_qh
*qh
, __le32
*c_maskp
)
2116 int retval
= -ENOSPC
;
2118 if (qh
->c_usecs
&& uframe
>= 6) /* FSTN territory? */
2121 if (!check_period(oxu
, frame
, uframe
, qh
->period
, qh
->usecs
))
2133 /* "first fit" scheduling policy used the first time through,
2134 * or when the previous schedule slot can't be re-used.
2136 static int qh_schedule(struct oxu_hcd
*oxu
, struct ehci_qh
*qh
)
2141 unsigned frame
; /* 0..(qh->period - 1), or NO_FRAME */
2143 qh_refresh(oxu
, qh
);
2144 qh
->hw_next
= EHCI_LIST_END
;
2147 /* reuse the previous schedule slots, if we can */
2148 if (frame
< qh
->period
) {
2149 uframe
= ffs(le32_to_cpup(&qh
->hw_info2
) & QH_SMASK
);
2150 status
= check_intr_schedule(oxu
, frame
, --uframe
,
2158 /* else scan the schedule to find a group of slots such that all
2159 * uframes have enough periodic bandwidth available.
2162 /* "normal" case, uframing flexible except with splits */
2164 frame
= qh
->period
- 1;
2166 for (uframe
= 0; uframe
< 8; uframe
++) {
2167 status
= check_intr_schedule(oxu
,
2173 } while (status
&& frame
--);
2175 /* qh->period == 0 means every uframe */
2178 status
= check_intr_schedule(oxu
, 0, 0, qh
, &c_mask
);
2184 /* reset S-frame and (maybe) C-frame masks */
2185 qh
->hw_info2
&= cpu_to_le32(~(QH_CMASK
| QH_SMASK
));
2186 qh
->hw_info2
|= qh
->period
2187 ? cpu_to_le32(1 << uframe
)
2188 : cpu_to_le32(QH_SMASK
);
2189 qh
->hw_info2
|= c_mask
;
2191 oxu_dbg(oxu
, "reused qh %p schedule\n", qh
);
2193 /* stuff into the periodic schedule */
2194 status
= qh_link_periodic(oxu
, qh
);
2199 static int intr_submit(struct oxu_hcd
*oxu
, struct urb
*urb
,
2200 struct list_head
*qtd_list
, gfp_t mem_flags
)
2203 unsigned long flags
;
2206 struct list_head empty
;
2208 /* get endpoint and transfer/schedule data */
2209 epnum
= urb
->ep
->desc
.bEndpointAddress
;
2211 spin_lock_irqsave(&oxu
->lock
, flags
);
2213 if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE
,
2214 &oxu_to_hcd(oxu
)->flags
))) {
2215 status
= -ESHUTDOWN
;
2219 /* get qh and force any scheduling errors */
2220 INIT_LIST_HEAD(&empty
);
2221 qh
= qh_append_tds(oxu
, urb
, &empty
, epnum
, &urb
->ep
->hcpriv
);
2226 if (qh
->qh_state
== QH_STATE_IDLE
) {
2227 status
= qh_schedule(oxu
, qh
);
2232 /* then queue the urb's tds to the qh */
2233 qh
= qh_append_tds(oxu
, urb
, qtd_list
, epnum
, &urb
->ep
->hcpriv
);
2236 /* ... update usbfs periodic stats */
2237 oxu_to_hcd(oxu
)->self
.bandwidth_int_reqs
++;
2240 spin_unlock_irqrestore(&oxu
->lock
, flags
);
2242 qtd_list_free(oxu
, urb
, qtd_list
);
2247 static inline int itd_submit(struct oxu_hcd
*oxu
, struct urb
*urb
,
2250 oxu_dbg(oxu
, "iso support is missing!\n");
2254 static inline int sitd_submit(struct oxu_hcd
*oxu
, struct urb
*urb
,
2257 oxu_dbg(oxu
, "split iso support is missing!\n");
2261 static void scan_periodic(struct oxu_hcd
*oxu
)
2263 unsigned frame
, clock
, now_uframe
, mod
;
2266 mod
= oxu
->periodic_size
<< 3;
2269 * When running, scan from last scan point up to "now"
2270 * else clean up by scanning everything that's left.
2271 * Touches as few pages as possible: cache-friendly.
2273 now_uframe
= oxu
->next_uframe
;
2274 if (HC_IS_RUNNING(oxu_to_hcd(oxu
)->state
))
2275 clock
= readl(&oxu
->regs
->frame_index
);
2277 clock
= now_uframe
+ mod
- 1;
2281 union ehci_shadow q
, *q_p
;
2285 /* don't scan past the live uframe */
2286 frame
= now_uframe
>> 3;
2287 if (frame
== (clock
>> 3))
2288 uframes
= now_uframe
& 0x07;
2290 /* safe to scan the whole frame at once */
2296 /* scan each element in frame's queue for completions */
2297 q_p
= &oxu
->pshadow
[frame
];
2298 hw_p
= &oxu
->periodic
[frame
];
2300 type
= Q_NEXT_TYPE(*hw_p
);
2303 while (q
.ptr
!= NULL
) {
2304 union ehci_shadow temp
;
2307 live
= HC_IS_RUNNING(oxu_to_hcd(oxu
)->state
);
2310 /* handle any completions */
2311 temp
.qh
= qh_get(q
.qh
);
2312 type
= Q_NEXT_TYPE(q
.qh
->hw_next
);
2314 modified
= qh_completions(oxu
, temp
.qh
);
2315 if (unlikely(list_empty(&temp
.qh
->qtd_list
)))
2316 intr_deschedule(oxu
, temp
.qh
);
2320 dbg("corrupt type %d frame %d shadow %p",
2321 type
, frame
, q
.ptr
);
2325 /* assume completion callbacks modify the queue */
2326 if (unlikely(modified
))
2330 /* Stop when we catch up to the HC */
2332 /* FIXME: this assumes we won't get lapped when
2333 * latencies climb; that should be rare, but...
2334 * detect it, and just go all the way around.
2335 * FLR might help detect this case, so long as latencies
2336 * don't exceed periodic_size msec (default 1.024 sec).
2339 /* FIXME: likewise assumes HC doesn't halt mid-scan */
2341 if (now_uframe
== clock
) {
2344 if (!HC_IS_RUNNING(oxu_to_hcd(oxu
)->state
))
2346 oxu
->next_uframe
= now_uframe
;
2347 now
= readl(&oxu
->regs
->frame_index
) % mod
;
2348 if (now_uframe
== now
)
2351 /* rescan the rest of this frame, then ... */
2360 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
2361 * The firmware seems to think that powering off is a wakeup event!
2362 * This routine turns off remote wakeup and everything else, on all ports.
2364 static void ehci_turn_off_all_ports(struct oxu_hcd
*oxu
)
2366 int port
= HCS_N_PORTS(oxu
->hcs_params
);
2369 writel(PORT_RWC_BITS
, &oxu
->regs
->port_status
[port
]);
2372 static void ehci_port_power(struct oxu_hcd
*oxu
, int is_on
)
2376 if (!HCS_PPC(oxu
->hcs_params
))
2379 oxu_dbg(oxu
, "...power%s ports...\n", is_on
? "up" : "down");
2380 for (port
= HCS_N_PORTS(oxu
->hcs_params
); port
> 0; )
2381 (void) oxu_hub_control(oxu_to_hcd(oxu
),
2382 is_on
? SetPortFeature
: ClearPortFeature
,
2383 USB_PORT_FEAT_POWER
,
2388 /* Called from some interrupts, timers, and so on.
2389 * It calls driver completion functions, after dropping oxu->lock.
2391 static void ehci_work(struct oxu_hcd
*oxu
)
2393 timer_action_done(oxu
, TIMER_IO_WATCHDOG
);
2394 if (oxu
->reclaim_ready
)
2395 end_unlink_async(oxu
);
2397 /* another CPU may drop oxu->lock during a schedule scan while
2398 * it reports urb completions. this flag guards against bogus
2399 * attempts at re-entrant schedule scanning.
2405 if (oxu
->next_uframe
!= -1)
2409 /* the IO watchdog guards against hardware or driver bugs that
2410 * misplace IRQs, and should let us run completely without IRQs.
2411 * such lossage has been observed on both VT6202 and VT8235.
2413 if (HC_IS_RUNNING(oxu_to_hcd(oxu
)->state
) &&
2414 (oxu
->async
->qh_next
.ptr
!= NULL
||
2415 oxu
->periodic_sched
!= 0))
2416 timer_action(oxu
, TIMER_IO_WATCHDOG
);
2419 static void unlink_async(struct oxu_hcd
*oxu
, struct ehci_qh
*qh
)
2421 /* if we need to use IAA and it's busy, defer */
2422 if (qh
->qh_state
== QH_STATE_LINKED
2424 && HC_IS_RUNNING(oxu_to_hcd(oxu
)->state
)) {
2425 struct ehci_qh
*last
;
2427 for (last
= oxu
->reclaim
;
2429 last
= last
->reclaim
)
2431 qh
->qh_state
= QH_STATE_UNLINK_WAIT
;
2434 /* bypass IAA if the hc can't care */
2435 } else if (!HC_IS_RUNNING(oxu_to_hcd(oxu
)->state
) && oxu
->reclaim
)
2436 end_unlink_async(oxu
);
2438 /* something else might have unlinked the qh by now */
2439 if (qh
->qh_state
== QH_STATE_LINKED
)
2440 start_unlink_async(oxu
, qh
);
2444 * USB host controller methods
2447 static irqreturn_t
oxu210_hcd_irq(struct usb_hcd
*hcd
)
2449 struct oxu_hcd
*oxu
= hcd_to_oxu(hcd
);
2450 u32 status
, pcd_status
= 0;
2453 spin_lock(&oxu
->lock
);
2455 status
= readl(&oxu
->regs
->status
);
2457 /* e.g. cardbus physical eject */
2458 if (status
== ~(u32
) 0) {
2459 oxu_dbg(oxu
, "device removed\n");
2463 status
&= INTR_MASK
;
2464 if (!status
) { /* irq sharing? */
2465 spin_unlock(&oxu
->lock
);
2469 /* clear (just) interrupts */
2470 writel(status
, &oxu
->regs
->status
);
2471 readl(&oxu
->regs
->command
); /* unblock posted write */
2474 #ifdef OXU_VERBOSE_DEBUG
2475 /* unrequested/ignored: Frame List Rollover */
2476 dbg_status(oxu
, "irq", status
);
2479 /* INT, ERR, and IAA interrupt rates can be throttled */
2481 /* normal [4.15.1.2] or error [4.15.1.1] completion */
2482 if (likely((status
& (STS_INT
|STS_ERR
)) != 0))
2485 /* complete the unlinking of some qh [4.15.2.3] */
2486 if (status
& STS_IAA
) {
2487 oxu
->reclaim_ready
= 1;
2491 /* remote wakeup [4.3.1] */
2492 if (status
& STS_PCD
) {
2493 unsigned i
= HCS_N_PORTS(oxu
->hcs_params
);
2494 pcd_status
= status
;
2496 /* resume root hub? */
2497 if (!(readl(&oxu
->regs
->command
) & CMD_RUN
))
2498 usb_hcd_resume_root_hub(hcd
);
2501 int pstatus
= readl(&oxu
->regs
->port_status
[i
]);
2503 if (pstatus
& PORT_OWNER
)
2505 if (!(pstatus
& PORT_RESUME
)
2506 || oxu
->reset_done
[i
] != 0)
2509 /* start 20 msec resume signaling from this port,
2510 * and make khubd collect PORT_STAT_C_SUSPEND to
2511 * stop that signaling.
2513 oxu
->reset_done
[i
] = jiffies
+ msecs_to_jiffies(20);
2514 oxu_dbg(oxu
, "port %d remote wakeup\n", i
+ 1);
2515 mod_timer(&hcd
->rh_timer
, oxu
->reset_done
[i
]);
2519 /* PCI errors [4.15.2.4] */
2520 if (unlikely((status
& STS_FATAL
) != 0)) {
2521 /* bogus "fatal" IRQs appear on some chips... why? */
2522 status
= readl(&oxu
->regs
->status
);
2523 dbg_cmd(oxu
, "fatal", readl(&oxu
->regs
->command
));
2524 dbg_status(oxu
, "fatal", status
);
2525 if (status
& STS_HALT
) {
2526 oxu_err(oxu
, "fatal error\n");
2529 writel(0, &oxu
->regs
->configured_flag
);
2530 /* generic layer kills/unlinks all urbs, then
2531 * uses oxu_stop to clean up the rest
2539 spin_unlock(&oxu
->lock
);
2540 if (pcd_status
& STS_PCD
)
2541 usb_hcd_poll_rh_status(hcd
);
2545 static irqreturn_t
oxu_irq(struct usb_hcd
*hcd
)
2547 struct oxu_hcd
*oxu
= hcd_to_oxu(hcd
);
2548 int ret
= IRQ_HANDLED
;
2550 u32 status
= oxu_readl(hcd
->regs
, OXU_CHIPIRQSTATUS
);
2551 u32 enable
= oxu_readl(hcd
->regs
, OXU_CHIPIRQEN_SET
);
2553 /* Disable all interrupt */
2554 oxu_writel(hcd
->regs
, OXU_CHIPIRQEN_CLR
, enable
);
2556 if ((oxu
->is_otg
&& (status
& OXU_USBOTGI
)) ||
2557 (!oxu
->is_otg
&& (status
& OXU_USBSPHI
)))
2558 oxu210_hcd_irq(hcd
);
2562 /* Enable all interrupt back */
2563 oxu_writel(hcd
->regs
, OXU_CHIPIRQEN_SET
, enable
);
2568 static void oxu_watchdog(unsigned long param
)
2570 struct oxu_hcd
*oxu
= (struct oxu_hcd
*) param
;
2571 unsigned long flags
;
2573 spin_lock_irqsave(&oxu
->lock
, flags
);
2575 /* lost IAA irqs wedge things badly; seen with a vt8235 */
2577 u32 status
= readl(&oxu
->regs
->status
);
2578 if (status
& STS_IAA
) {
2579 oxu_vdbg(oxu
, "lost IAA\n");
2580 writel(STS_IAA
, &oxu
->regs
->status
);
2581 oxu
->reclaim_ready
= 1;
2585 /* stop async processing after it's idled a bit */
2586 if (test_bit(TIMER_ASYNC_OFF
, &oxu
->actions
))
2587 start_unlink_async(oxu
, oxu
->async
);
2589 /* oxu could run by timer, without IRQs ... */
2592 spin_unlock_irqrestore(&oxu
->lock
, flags
);
2595 /* One-time init, only for memory state.
2597 static int oxu_hcd_init(struct usb_hcd
*hcd
)
2599 struct oxu_hcd
*oxu
= hcd_to_oxu(hcd
);
2604 spin_lock_init(&oxu
->lock
);
2606 init_timer(&oxu
->watchdog
);
2607 oxu
->watchdog
.function
= oxu_watchdog
;
2608 oxu
->watchdog
.data
= (unsigned long) oxu
;
2611 * hw default: 1K periodic list heads, one per frame.
2612 * periodic_size can shrink by USBCMD update if hcc_params allows.
2614 oxu
->periodic_size
= DEFAULT_I_TDPS
;
2615 retval
= ehci_mem_init(oxu
, GFP_KERNEL
);
2619 /* controllers may cache some of the periodic schedule ... */
2620 hcc_params
= readl(&oxu
->caps
->hcc_params
);
2621 if (HCC_ISOC_CACHE(hcc_params
)) /* full frame cache */
2623 else /* N microframes cached */
2624 oxu
->i_thresh
= 2 + HCC_ISOC_THRES(hcc_params
);
2626 oxu
->reclaim
= NULL
;
2627 oxu
->reclaim_ready
= 0;
2628 oxu
->next_uframe
= -1;
2631 * dedicate a qh for the async ring head, since we couldn't unlink
2632 * a 'real' qh without stopping the async schedule [4.8]. use it
2633 * as the 'reclamation list head' too.
2634 * its dummy is used in hw_alt_next of many tds, to prevent the qh
2635 * from automatically advancing to the next td after short reads.
2637 oxu
->async
->qh_next
.qh
= NULL
;
2638 oxu
->async
->hw_next
= QH_NEXT(oxu
->async
->qh_dma
);
2639 oxu
->async
->hw_info1
= cpu_to_le32(QH_HEAD
);
2640 oxu
->async
->hw_token
= cpu_to_le32(QTD_STS_HALT
);
2641 oxu
->async
->hw_qtd_next
= EHCI_LIST_END
;
2642 oxu
->async
->qh_state
= QH_STATE_LINKED
;
2643 oxu
->async
->hw_alt_next
= QTD_NEXT(oxu
->async
->dummy
->qtd_dma
);
2645 /* clear interrupt enables, set irq latency */
2646 if (log2_irq_thresh
< 0 || log2_irq_thresh
> 6)
2647 log2_irq_thresh
= 0;
2648 temp
= 1 << (16 + log2_irq_thresh
);
2649 if (HCC_CANPARK(hcc_params
)) {
2650 /* HW default park == 3, on hardware that supports it (like
2651 * NVidia and ALI silicon), maximizes throughput on the async
2652 * schedule by avoiding QH fetches between transfers.
2654 * With fast usb storage devices and NForce2, "park" seems to
2655 * make problems: throughput reduction (!), data errors...
2658 park
= min(park
, (unsigned) 3);
2662 oxu_dbg(oxu
, "park %d\n", park
);
2664 if (HCC_PGM_FRAMELISTLEN(hcc_params
)) {
2665 /* periodic schedule size can be smaller than default */
2667 temp
|= (EHCI_TUNE_FLS
<< 2);
2669 oxu
->command
= temp
;
2674 /* Called during probe() after chip reset completes.
2676 static int oxu_reset(struct usb_hcd
*hcd
)
2678 struct oxu_hcd
*oxu
= hcd_to_oxu(hcd
);
2681 spin_lock_init(&oxu
->mem_lock
);
2682 INIT_LIST_HEAD(&oxu
->urb_list
);
2686 hcd
->self
.controller
->dma_mask
= NULL
;
2689 oxu
->caps
= hcd
->regs
+ OXU_OTG_CAP_OFFSET
;
2690 oxu
->regs
= hcd
->regs
+ OXU_OTG_CAP_OFFSET
+ \
2691 HC_LENGTH(readl(&oxu
->caps
->hc_capbase
));
2693 oxu
->mem
= hcd
->regs
+ OXU_SPH_MEM
;
2695 oxu
->caps
= hcd
->regs
+ OXU_SPH_CAP_OFFSET
;
2696 oxu
->regs
= hcd
->regs
+ OXU_SPH_CAP_OFFSET
+ \
2697 HC_LENGTH(readl(&oxu
->caps
->hc_capbase
));
2699 oxu
->mem
= hcd
->regs
+ OXU_OTG_MEM
;
2702 oxu
->hcs_params
= readl(&oxu
->caps
->hcs_params
);
2705 ret
= oxu_hcd_init(hcd
);
2712 static int oxu_run(struct usb_hcd
*hcd
)
2714 struct oxu_hcd
*oxu
= hcd_to_oxu(hcd
);
2716 u32 temp
, hcc_params
;
2718 hcd
->uses_new_polling
= 1;
2721 /* EHCI spec section 4.1 */
2722 retval
= ehci_reset(oxu
);
2724 ehci_mem_cleanup(oxu
);
2727 writel(oxu
->periodic_dma
, &oxu
->regs
->frame_list
);
2728 writel((u32
) oxu
->async
->qh_dma
, &oxu
->regs
->async_next
);
2730 /* hcc_params controls whether oxu->regs->segment must (!!!)
2731 * be used; it constrains QH/ITD/SITD and QTD locations.
2732 * pci_pool consistent memory always uses segment zero.
2733 * streaming mappings for I/O buffers, like pci_map_single(),
2734 * can return segments above 4GB, if the device allows.
2736 * NOTE: the dma mask is visible through dma_supported(), so
2737 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
2738 * Scsi_Host.highmem_io, and so forth. It's readonly to all
2739 * host side drivers though.
2741 hcc_params
= readl(&oxu
->caps
->hcc_params
);
2742 if (HCC_64BIT_ADDR(hcc_params
))
2743 writel(0, &oxu
->regs
->segment
);
2745 oxu
->command
&= ~(CMD_LRESET
| CMD_IAAD
| CMD_PSE
|
2746 CMD_ASE
| CMD_RESET
);
2747 oxu
->command
|= CMD_RUN
;
2748 writel(oxu
->command
, &oxu
->regs
->command
);
2749 dbg_cmd(oxu
, "init", oxu
->command
);
2752 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
2753 * are explicitly handed to companion controller(s), so no TT is
2754 * involved with the root hub. (Except where one is integrated,
2755 * and there's no companion controller unless maybe for USB OTG.)
2757 hcd
->state
= HC_STATE_RUNNING
;
2758 writel(FLAG_CF
, &oxu
->regs
->configured_flag
);
2759 readl(&oxu
->regs
->command
); /* unblock posted writes */
2761 temp
= HC_VERSION(readl(&oxu
->caps
->hc_capbase
));
2762 oxu_info(oxu
, "USB %x.%x started, quasi-EHCI %x.%02x, driver %s%s\n",
2763 ((oxu
->sbrn
& 0xf0)>>4), (oxu
->sbrn
& 0x0f),
2764 temp
>> 8, temp
& 0xff, DRIVER_VERSION
,
2765 ignore_oc
? ", overcurrent ignored" : "");
2767 writel(INTR_MASK
, &oxu
->regs
->intr_enable
); /* Turn On Interrupts */
2772 static void oxu_stop(struct usb_hcd
*hcd
)
2774 struct oxu_hcd
*oxu
= hcd_to_oxu(hcd
);
2776 /* Turn off port power on all root hub ports. */
2777 ehci_port_power(oxu
, 0);
2779 /* no more interrupts ... */
2780 del_timer_sync(&oxu
->watchdog
);
2782 spin_lock_irq(&oxu
->lock
);
2783 if (HC_IS_RUNNING(hcd
->state
))
2787 writel(0, &oxu
->regs
->intr_enable
);
2788 spin_unlock_irq(&oxu
->lock
);
2790 /* let companion controllers work when we aren't */
2791 writel(0, &oxu
->regs
->configured_flag
);
2793 /* root hub is shut down separately (first, when possible) */
2794 spin_lock_irq(&oxu
->lock
);
2797 spin_unlock_irq(&oxu
->lock
);
2798 ehci_mem_cleanup(oxu
);
2800 dbg_status(oxu
, "oxu_stop completed", readl(&oxu
->regs
->status
));
2803 /* Kick in for silicon on any bus (not just pci, etc).
2804 * This forcibly disables dma and IRQs, helping kexec and other cases
2805 * where the next system software may expect clean state.
2807 static void oxu_shutdown(struct usb_hcd
*hcd
)
2809 struct oxu_hcd
*oxu
= hcd_to_oxu(hcd
);
2811 (void) ehci_halt(oxu
);
2812 ehci_turn_off_all_ports(oxu
);
2814 /* make BIOS/etc use companion controller during reboot */
2815 writel(0, &oxu
->regs
->configured_flag
);
2817 /* unblock posted writes */
2818 readl(&oxu
->regs
->configured_flag
);
2821 /* Non-error returns are a promise to giveback() the urb later
2822 * we drop ownership so next owner (or urb unlink) can get it
2824 * urb + dev is in hcd.self.controller.urb_list
2825 * we're queueing TDs onto software and hardware lists
2827 * hcd-specific init for hcpriv hasn't been done yet
2829 * NOTE: control, bulk, and interrupt share the same code to append TDs
2830 * to a (possibly active) QH, and the same QH scanning code.
2832 static int __oxu_urb_enqueue(struct usb_hcd
*hcd
, struct urb
*urb
,
2835 struct oxu_hcd
*oxu
= hcd_to_oxu(hcd
);
2836 struct list_head qtd_list
;
2838 INIT_LIST_HEAD(&qtd_list
);
2840 switch (usb_pipetype(urb
->pipe
)) {
2844 if (!qh_urb_transaction(oxu
, urb
, &qtd_list
, mem_flags
))
2846 return submit_async(oxu
, urb
, &qtd_list
, mem_flags
);
2848 case PIPE_INTERRUPT
:
2849 if (!qh_urb_transaction(oxu
, urb
, &qtd_list
, mem_flags
))
2851 return intr_submit(oxu
, urb
, &qtd_list
, mem_flags
);
2853 case PIPE_ISOCHRONOUS
:
2854 if (urb
->dev
->speed
== USB_SPEED_HIGH
)
2855 return itd_submit(oxu
, urb
, mem_flags
);
2857 return sitd_submit(oxu
, urb
, mem_flags
);
2861 /* This function is responsible for breaking URBs with big data size
2862 * into smaller size and processing small urbs in sequence.
2864 static int oxu_urb_enqueue(struct usb_hcd
*hcd
, struct urb
*urb
,
2867 struct oxu_hcd
*oxu
= hcd_to_oxu(hcd
);
2869 int transfer_buffer_length
;
2870 void *transfer_buffer
;
2874 /* If not bulk pipe just enqueue the URB */
2875 if (!usb_pipebulk(urb
->pipe
))
2876 return __oxu_urb_enqueue(hcd
, urb
, mem_flags
);
2878 /* Otherwise we should verify the USB transfer buffer size! */
2879 transfer_buffer
= urb
->transfer_buffer
;
2880 transfer_buffer_length
= urb
->transfer_buffer_length
;
2882 num
= urb
->transfer_buffer_length
/ 4096;
2883 rem
= urb
->transfer_buffer_length
% 4096;
2887 /* If URB is smaller than 4096 bytes just enqueue it! */
2889 return __oxu_urb_enqueue(hcd
, urb
, mem_flags
);
2891 /* Ok, we have more job to do! :) */
2893 for (i
= 0; i
< num
- 1; i
++) {
2894 /* Get free micro URB poll till a free urb is recieved */
2897 murb
= (struct urb
*) oxu_murb_alloc(oxu
);
2902 /* Coping the urb */
2903 memcpy(murb
, urb
, sizeof(struct urb
));
2905 murb
->transfer_buffer_length
= 4096;
2906 murb
->transfer_buffer
= transfer_buffer
+ i
* 4096;
2908 /* Null pointer for the encodes that this is a micro urb */
2909 murb
->complete
= NULL
;
2911 ((struct oxu_murb
*) murb
)->main
= urb
;
2912 ((struct oxu_murb
*) murb
)->last
= 0;
2914 /* This loop is to guarantee urb to be processed when there's
2915 * not enough resources at a particular time by retrying.
2918 ret
= __oxu_urb_enqueue(hcd
, murb
, mem_flags
);
2924 /* Last urb requires special handling */
2926 /* Get free micro URB poll till a free urb is recieved */
2928 murb
= (struct urb
*) oxu_murb_alloc(oxu
);
2933 /* Coping the urb */
2934 memcpy(murb
, urb
, sizeof(struct urb
));
2936 murb
->transfer_buffer_length
= rem
> 0 ? rem
: 4096;
2937 murb
->transfer_buffer
= transfer_buffer
+ (num
- 1) * 4096;
2939 /* Null pointer for the encodes that this is a micro urb */
2940 murb
->complete
= NULL
;
2942 ((struct oxu_murb
*) murb
)->main
= urb
;
2943 ((struct oxu_murb
*) murb
)->last
= 1;
2946 ret
= __oxu_urb_enqueue(hcd
, murb
, mem_flags
);
2954 /* Remove from hardware lists.
2955 * Completions normally happen asynchronously
2957 static int oxu_urb_dequeue(struct usb_hcd
*hcd
, struct urb
*urb
, int status
)
2959 struct oxu_hcd
*oxu
= hcd_to_oxu(hcd
);
2961 unsigned long flags
;
2963 spin_lock_irqsave(&oxu
->lock
, flags
);
2964 switch (usb_pipetype(urb
->pipe
)) {
2968 qh
= (struct ehci_qh
*) urb
->hcpriv
;
2971 unlink_async(oxu
, qh
);
2974 case PIPE_INTERRUPT
:
2975 qh
= (struct ehci_qh
*) urb
->hcpriv
;
2978 switch (qh
->qh_state
) {
2979 case QH_STATE_LINKED
:
2980 intr_deschedule(oxu
, qh
);
2983 qh_completions(oxu
, qh
);
2986 oxu_dbg(oxu
, "bogus qh %p state %d\n",
2991 /* reschedule QH iff another request is queued */
2992 if (!list_empty(&qh
->qtd_list
)
2993 && HC_IS_RUNNING(hcd
->state
)) {
2996 status
= qh_schedule(oxu
, qh
);
2997 spin_unlock_irqrestore(&oxu
->lock
, flags
);
3000 /* shouldn't happen often, but ...
3001 * FIXME kill those tds' urbs
3003 err("can't reschedule qh %p, err %d",
3011 spin_unlock_irqrestore(&oxu
->lock
, flags
);
3015 /* Bulk qh holds the data toggle */
3016 static void oxu_endpoint_disable(struct usb_hcd
*hcd
,
3017 struct usb_host_endpoint
*ep
)
3019 struct oxu_hcd
*oxu
= hcd_to_oxu(hcd
);
3020 unsigned long flags
;
3021 struct ehci_qh
*qh
, *tmp
;
3023 /* ASSERT: any requests/urbs are being unlinked */
3024 /* ASSERT: nobody can be submitting urbs for this any more */
3027 spin_lock_irqsave(&oxu
->lock
, flags
);
3032 /* endpoints can be iso streams. for now, we don't
3033 * accelerate iso completions ... so spin a while.
3035 if (qh
->hw_info1
== 0) {
3036 oxu_vdbg(oxu
, "iso delay\n");
3040 if (!HC_IS_RUNNING(hcd
->state
))
3041 qh
->qh_state
= QH_STATE_IDLE
;
3042 switch (qh
->qh_state
) {
3043 case QH_STATE_LINKED
:
3044 for (tmp
= oxu
->async
->qh_next
.qh
;
3046 tmp
= tmp
->qh_next
.qh
)
3048 /* periodic qh self-unlinks on empty */
3051 unlink_async(oxu
, qh
);
3053 case QH_STATE_UNLINK
: /* wait for hw to finish? */
3055 spin_unlock_irqrestore(&oxu
->lock
, flags
);
3056 schedule_timeout_uninterruptible(1);
3058 case QH_STATE_IDLE
: /* fully unlinked */
3059 if (list_empty(&qh
->qtd_list
)) {
3063 /* else FALL THROUGH */
3066 /* caller was supposed to have unlinked any requests;
3067 * that's not our job. just leak this memory.
3069 oxu_err(oxu
, "qh %p (#%02x) state %d%s\n",
3070 qh
, ep
->desc
.bEndpointAddress
, qh
->qh_state
,
3071 list_empty(&qh
->qtd_list
) ? "" : "(has tds)");
3076 spin_unlock_irqrestore(&oxu
->lock
, flags
);
3080 static int oxu_get_frame(struct usb_hcd
*hcd
)
3082 struct oxu_hcd
*oxu
= hcd_to_oxu(hcd
);
3084 return (readl(&oxu
->regs
->frame_index
) >> 3) %
3088 /* Build "status change" packet (one or two bytes) from HC registers */
3089 static int oxu_hub_status_data(struct usb_hcd
*hcd
, char *buf
)
3091 struct oxu_hcd
*oxu
= hcd_to_oxu(hcd
);
3092 u32 temp
, mask
, status
= 0;
3093 int ports
, i
, retval
= 1;
3094 unsigned long flags
;
3096 /* if !USB_SUSPEND, root hub timers won't get shut down ... */
3097 if (!HC_IS_RUNNING(hcd
->state
))
3100 /* init status to no-changes */
3102 ports
= HCS_N_PORTS(oxu
->hcs_params
);
3108 /* Some boards (mostly VIA?) report bogus overcurrent indications,
3109 * causing massive log spam unless we completely ignore them. It
3110 * may be relevant that VIA VT8235 controlers, where PORT_POWER is
3111 * always set, seem to clear PORT_OCC and PORT_CSC when writing to
3112 * PORT_POWER; that's surprising, but maybe within-spec.
3115 mask
= PORT_CSC
| PORT_PEC
| PORT_OCC
;
3117 mask
= PORT_CSC
| PORT_PEC
;
3119 /* no hub change reports (bit 0) for now (power, ...) */
3121 /* port N changes (bit N)? */
3122 spin_lock_irqsave(&oxu
->lock
, flags
);
3123 for (i
= 0; i
< ports
; i
++) {
3124 temp
= readl(&oxu
->regs
->port_status
[i
]);
3127 * Return status information even for ports with OWNER set.
3128 * Otherwise khubd wouldn't see the disconnect event when a
3129 * high-speed device is switched over to the companion
3130 * controller by the user.
3133 if (!(temp
& PORT_CONNECT
))
3134 oxu
->reset_done
[i
] = 0;
3135 if ((temp
& mask
) != 0 || ((temp
& PORT_RESUME
) != 0 &&
3136 time_after_eq(jiffies
, oxu
->reset_done
[i
]))) {
3138 buf
[0] |= 1 << (i
+ 1);
3140 buf
[1] |= 1 << (i
- 7);
3144 /* FIXME autosuspend idle root hubs */
3145 spin_unlock_irqrestore(&oxu
->lock
, flags
);
3146 return status
? retval
: 0;
3149 /* Returns the speed of a device attached to a port on the root hub. */
3150 static inline unsigned int oxu_port_speed(struct oxu_hcd
*oxu
,
3151 unsigned int portsc
)
3153 switch ((portsc
>> 26) & 3) {
3157 return 1 << USB_PORT_FEAT_LOWSPEED
;
3160 return 1 << USB_PORT_FEAT_HIGHSPEED
;
3164 #define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
3165 static int oxu_hub_control(struct usb_hcd
*hcd
, u16 typeReq
,
3166 u16 wValue
, u16 wIndex
, char *buf
, u16 wLength
)
3168 struct oxu_hcd
*oxu
= hcd_to_oxu(hcd
);
3169 int ports
= HCS_N_PORTS(oxu
->hcs_params
);
3170 u32 __iomem
*status_reg
= &oxu
->regs
->port_status
[wIndex
- 1];
3172 unsigned long flags
;
3177 * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR.
3178 * HCS_INDICATOR may say we can change LEDs to off/amber/green.
3179 * (track current state ourselves) ... blink for diagnostics,
3180 * power, "this is the one", etc. EHCI spec supports this.
3183 spin_lock_irqsave(&oxu
->lock
, flags
);
3185 case ClearHubFeature
:
3187 case C_HUB_LOCAL_POWER
:
3188 case C_HUB_OVER_CURRENT
:
3189 /* no hub-wide feature/status flags */
3195 case ClearPortFeature
:
3196 if (!wIndex
|| wIndex
> ports
)
3199 temp
= readl(status_reg
);
3202 * Even if OWNER is set, so the port is owned by the
3203 * companion controller, khubd needs to be able to clear
3204 * the port-change status bits (especially
3205 * USB_PORT_FEAT_C_CONNECTION).
3209 case USB_PORT_FEAT_ENABLE
:
3210 writel(temp
& ~PORT_PE
, status_reg
);
3212 case USB_PORT_FEAT_C_ENABLE
:
3213 writel((temp
& ~PORT_RWC_BITS
) | PORT_PEC
, status_reg
);
3215 case USB_PORT_FEAT_SUSPEND
:
3216 if (temp
& PORT_RESET
)
3218 if (temp
& PORT_SUSPEND
) {
3219 if ((temp
& PORT_PE
) == 0)
3221 /* resume signaling for 20 msec */
3222 temp
&= ~(PORT_RWC_BITS
| PORT_WAKE_BITS
);
3223 writel(temp
| PORT_RESUME
, status_reg
);
3224 oxu
->reset_done
[wIndex
] = jiffies
3225 + msecs_to_jiffies(20);
3228 case USB_PORT_FEAT_C_SUSPEND
:
3229 /* we auto-clear this feature */
3231 case USB_PORT_FEAT_POWER
:
3232 if (HCS_PPC(oxu
->hcs_params
))
3233 writel(temp
& ~(PORT_RWC_BITS
| PORT_POWER
),
3236 case USB_PORT_FEAT_C_CONNECTION
:
3237 writel((temp
& ~PORT_RWC_BITS
) | PORT_CSC
, status_reg
);
3239 case USB_PORT_FEAT_C_OVER_CURRENT
:
3240 writel((temp
& ~PORT_RWC_BITS
) | PORT_OCC
, status_reg
);
3242 case USB_PORT_FEAT_C_RESET
:
3243 /* GetPortStatus clears reset */
3248 readl(&oxu
->regs
->command
); /* unblock posted write */
3250 case GetHubDescriptor
:
3251 ehci_hub_descriptor(oxu
, (struct usb_hub_descriptor
*)
3255 /* no hub-wide feature/status flags */
3259 if (!wIndex
|| wIndex
> ports
)
3263 temp
= readl(status_reg
);
3265 /* wPortChange bits */
3266 if (temp
& PORT_CSC
)
3267 status
|= 1 << USB_PORT_FEAT_C_CONNECTION
;
3268 if (temp
& PORT_PEC
)
3269 status
|= 1 << USB_PORT_FEAT_C_ENABLE
;
3270 if ((temp
& PORT_OCC
) && !ignore_oc
)
3271 status
|= 1 << USB_PORT_FEAT_C_OVER_CURRENT
;
3273 /* whoever resumes must GetPortStatus to complete it!! */
3274 if (temp
& PORT_RESUME
) {
3276 /* Remote Wakeup received? */
3277 if (!oxu
->reset_done
[wIndex
]) {
3278 /* resume signaling for 20 msec */
3279 oxu
->reset_done
[wIndex
] = jiffies
3280 + msecs_to_jiffies(20);
3281 /* check the port again */
3282 mod_timer(&oxu_to_hcd(oxu
)->rh_timer
,
3283 oxu
->reset_done
[wIndex
]);
3286 /* resume completed? */
3287 else if (time_after_eq(jiffies
,
3288 oxu
->reset_done
[wIndex
])) {
3289 status
|= 1 << USB_PORT_FEAT_C_SUSPEND
;
3290 oxu
->reset_done
[wIndex
] = 0;
3292 /* stop resume signaling */
3293 temp
= readl(status_reg
);
3294 writel(temp
& ~(PORT_RWC_BITS
| PORT_RESUME
),
3296 retval
= handshake(oxu
, status_reg
,
3297 PORT_RESUME
, 0, 2000 /* 2msec */);
3300 "port %d resume error %d\n",
3301 wIndex
+ 1, retval
);
3304 temp
&= ~(PORT_SUSPEND
|PORT_RESUME
|(3<<10));
3308 /* whoever resets must GetPortStatus to complete it!! */
3309 if ((temp
& PORT_RESET
)
3310 && time_after_eq(jiffies
,
3311 oxu
->reset_done
[wIndex
])) {
3312 status
|= 1 << USB_PORT_FEAT_C_RESET
;
3313 oxu
->reset_done
[wIndex
] = 0;
3315 /* force reset to complete */
3316 writel(temp
& ~(PORT_RWC_BITS
| PORT_RESET
),
3318 /* REVISIT: some hardware needs 550+ usec to clear
3319 * this bit; seems too long to spin routinely...
3321 retval
= handshake(oxu
, status_reg
,
3322 PORT_RESET
, 0, 750);
3324 oxu_err(oxu
, "port %d reset error %d\n",
3325 wIndex
+ 1, retval
);
3329 /* see what we found out */
3330 temp
= check_reset_complete(oxu
, wIndex
, status_reg
,
3334 /* transfer dedicated ports to the companion hc */
3335 if ((temp
& PORT_CONNECT
) &&
3336 test_bit(wIndex
, &oxu
->companion_ports
)) {
3337 temp
&= ~PORT_RWC_BITS
;
3339 writel(temp
, status_reg
);
3340 oxu_dbg(oxu
, "port %d --> companion\n", wIndex
+ 1);
3341 temp
= readl(status_reg
);
3345 * Even if OWNER is set, there's no harm letting khubd
3346 * see the wPortStatus values (they should all be 0 except
3347 * for PORT_POWER anyway).
3350 if (temp
& PORT_CONNECT
) {
3351 status
|= 1 << USB_PORT_FEAT_CONNECTION
;
3352 /* status may be from integrated TT */
3353 status
|= oxu_port_speed(oxu
, temp
);
3356 status
|= 1 << USB_PORT_FEAT_ENABLE
;
3357 if (temp
& (PORT_SUSPEND
|PORT_RESUME
))
3358 status
|= 1 << USB_PORT_FEAT_SUSPEND
;
3360 status
|= 1 << USB_PORT_FEAT_OVER_CURRENT
;
3361 if (temp
& PORT_RESET
)
3362 status
|= 1 << USB_PORT_FEAT_RESET
;
3363 if (temp
& PORT_POWER
)
3364 status
|= 1 << USB_PORT_FEAT_POWER
;
3366 #ifndef OXU_VERBOSE_DEBUG
3367 if (status
& ~0xffff) /* only if wPortChange is interesting */
3369 dbg_port(oxu
, "GetStatus", wIndex
+ 1, temp
);
3370 put_unaligned(cpu_to_le32(status
), (__le32
*) buf
);
3374 case C_HUB_LOCAL_POWER
:
3375 case C_HUB_OVER_CURRENT
:
3376 /* no hub-wide feature/status flags */
3382 case SetPortFeature
:
3383 selector
= wIndex
>> 8;
3385 if (!wIndex
|| wIndex
> ports
)
3388 temp
= readl(status_reg
);
3389 if (temp
& PORT_OWNER
)
3392 temp
&= ~PORT_RWC_BITS
;
3394 case USB_PORT_FEAT_SUSPEND
:
3395 if ((temp
& PORT_PE
) == 0
3396 || (temp
& PORT_RESET
) != 0)
3398 if (device_may_wakeup(&hcd
->self
.root_hub
->dev
))
3399 temp
|= PORT_WAKE_BITS
;
3400 writel(temp
| PORT_SUSPEND
, status_reg
);
3402 case USB_PORT_FEAT_POWER
:
3403 if (HCS_PPC(oxu
->hcs_params
))
3404 writel(temp
| PORT_POWER
, status_reg
);
3406 case USB_PORT_FEAT_RESET
:
3407 if (temp
& PORT_RESUME
)
3409 /* line status bits may report this as low speed,
3410 * which can be fine if this root hub has a
3411 * transaction translator built in.
3413 oxu_vdbg(oxu
, "port %d reset\n", wIndex
+ 1);
3418 * caller must wait, then call GetPortStatus
3419 * usb 2.0 spec says 50 ms resets on root
3421 oxu
->reset_done
[wIndex
] = jiffies
3422 + msecs_to_jiffies(50);
3423 writel(temp
, status_reg
);
3426 /* For downstream facing ports (these): one hub port is put
3427 * into test mode according to USB2 11.24.2.13, then the hub
3428 * must be reset (which for root hub now means rmmod+modprobe,
3429 * or else system reboot). See EHCI 2.3.9 and 4.14 for info
3430 * about the EHCI-specific stuff.
3432 case USB_PORT_FEAT_TEST
:
3433 if (!selector
|| selector
> 5)
3437 temp
|= selector
<< 16;
3438 writel(temp
, status_reg
);
3444 readl(&oxu
->regs
->command
); /* unblock posted writes */
3449 /* "stall" on error */
3452 spin_unlock_irqrestore(&oxu
->lock
, flags
);
3458 static int oxu_bus_suspend(struct usb_hcd
*hcd
)
3460 struct oxu_hcd
*oxu
= hcd_to_oxu(hcd
);
3464 oxu_dbg(oxu
, "suspend root hub\n");
3466 if (time_before(jiffies
, oxu
->next_statechange
))
3469 port
= HCS_N_PORTS(oxu
->hcs_params
);
3470 spin_lock_irq(&oxu
->lock
);
3472 /* stop schedules, clean any completed work */
3473 if (HC_IS_RUNNING(hcd
->state
)) {
3475 hcd
->state
= HC_STATE_QUIESCING
;
3477 oxu
->command
= readl(&oxu
->regs
->command
);
3479 oxu
->reclaim_ready
= 1;
3482 /* Unlike other USB host controller types, EHCI doesn't have
3483 * any notion of "global" or bus-wide suspend. The driver has
3484 * to manually suspend all the active unsuspended ports, and
3485 * then manually resume them in the bus_resume() routine.
3487 oxu
->bus_suspended
= 0;
3489 u32 __iomem
*reg
= &oxu
->regs
->port_status
[port
];
3490 u32 t1
= readl(reg
) & ~PORT_RWC_BITS
;
3493 /* keep track of which ports we suspend */
3494 if ((t1
& PORT_PE
) && !(t1
& PORT_OWNER
) &&
3495 !(t1
& PORT_SUSPEND
)) {
3497 set_bit(port
, &oxu
->bus_suspended
);
3500 /* enable remote wakeup on all ports */
3501 if (device_may_wakeup(&hcd
->self
.root_hub
->dev
))
3502 t2
|= PORT_WKOC_E
|PORT_WKDISC_E
|PORT_WKCONN_E
;
3504 t2
&= ~(PORT_WKOC_E
|PORT_WKDISC_E
|PORT_WKCONN_E
);
3507 oxu_vdbg(oxu
, "port %d, %08x -> %08x\n",
3513 /* turn off now-idle HC */
3514 del_timer_sync(&oxu
->watchdog
);
3516 hcd
->state
= HC_STATE_SUSPENDED
;
3518 /* allow remote wakeup */
3520 if (!device_may_wakeup(&hcd
->self
.root_hub
->dev
))
3522 writel(mask
, &oxu
->regs
->intr_enable
);
3523 readl(&oxu
->regs
->intr_enable
);
3525 oxu
->next_statechange
= jiffies
+ msecs_to_jiffies(10);
3526 spin_unlock_irq(&oxu
->lock
);
3530 /* Caller has locked the root hub, and should reset/reinit on error */
3531 static int oxu_bus_resume(struct usb_hcd
*hcd
)
3533 struct oxu_hcd
*oxu
= hcd_to_oxu(hcd
);
3537 if (time_before(jiffies
, oxu
->next_statechange
))
3539 spin_lock_irq(&oxu
->lock
);
3541 /* Ideally and we've got a real resume here, and no port's power
3542 * was lost. (For PCI, that means Vaux was maintained.) But we
3543 * could instead be restoring a swsusp snapshot -- so that BIOS was
3544 * the last user of the controller, not reset/pm hardware keeping
3545 * state we gave to it.
3547 temp
= readl(&oxu
->regs
->intr_enable
);
3548 oxu_dbg(oxu
, "resume root hub%s\n", temp
? "" : " after power loss");
3550 /* at least some APM implementations will try to deliver
3551 * IRQs right away, so delay them until we're ready.
3553 writel(0, &oxu
->regs
->intr_enable
);
3555 /* re-init operational registers */
3556 writel(0, &oxu
->regs
->segment
);
3557 writel(oxu
->periodic_dma
, &oxu
->regs
->frame_list
);
3558 writel((u32
) oxu
->async
->qh_dma
, &oxu
->regs
->async_next
);
3560 /* restore CMD_RUN, framelist size, and irq threshold */
3561 writel(oxu
->command
, &oxu
->regs
->command
);
3563 /* Some controller/firmware combinations need a delay during which
3564 * they set up the port statuses. See Bugzilla #8190. */
3567 /* manually resume the ports we suspended during bus_suspend() */
3568 i
= HCS_N_PORTS(oxu
->hcs_params
);
3570 temp
= readl(&oxu
->regs
->port_status
[i
]);
3571 temp
&= ~(PORT_RWC_BITS
3572 | PORT_WKOC_E
| PORT_WKDISC_E
| PORT_WKCONN_E
);
3573 if (test_bit(i
, &oxu
->bus_suspended
) && (temp
& PORT_SUSPEND
)) {
3574 oxu
->reset_done
[i
] = jiffies
+ msecs_to_jiffies(20);
3575 temp
|= PORT_RESUME
;
3577 writel(temp
, &oxu
->regs
->port_status
[i
]);
3579 i
= HCS_N_PORTS(oxu
->hcs_params
);
3582 temp
= readl(&oxu
->regs
->port_status
[i
]);
3583 if (test_bit(i
, &oxu
->bus_suspended
) && (temp
& PORT_SUSPEND
)) {
3584 temp
&= ~(PORT_RWC_BITS
| PORT_RESUME
);
3585 writel(temp
, &oxu
->regs
->port_status
[i
]);
3586 oxu_vdbg(oxu
, "resumed port %d\n", i
+ 1);
3589 (void) readl(&oxu
->regs
->command
);
3591 /* maybe re-activate the schedule(s) */
3593 if (oxu
->async
->qh_next
.qh
)
3595 if (oxu
->periodic_sched
)
3598 oxu
->command
|= temp
;
3599 writel(oxu
->command
, &oxu
->regs
->command
);
3602 oxu
->next_statechange
= jiffies
+ msecs_to_jiffies(5);
3603 hcd
->state
= HC_STATE_RUNNING
;
3605 /* Now we can safely re-enable irqs */
3606 writel(INTR_MASK
, &oxu
->regs
->intr_enable
);
3608 spin_unlock_irq(&oxu
->lock
);
3614 static int oxu_bus_suspend(struct usb_hcd
*hcd
)
3619 static int oxu_bus_resume(struct usb_hcd
*hcd
)
3624 #endif /* CONFIG_PM */
3626 static const struct hc_driver oxu_hc_driver
= {
3627 .description
= "oxu210hp_hcd",
3628 .product_desc
= "oxu210hp HCD",
3629 .hcd_priv_size
= sizeof(struct oxu_hcd
),
3632 * Generic hardware linkage
3635 .flags
= HCD_MEMORY
| HCD_USB2
,
3638 * Basic lifecycle operations
3643 .shutdown
= oxu_shutdown
,
3646 * Managing i/o requests and associated device resources
3648 .urb_enqueue
= oxu_urb_enqueue
,
3649 .urb_dequeue
= oxu_urb_dequeue
,
3650 .endpoint_disable
= oxu_endpoint_disable
,
3653 * Scheduling support
3655 .get_frame_number
= oxu_get_frame
,
3660 .hub_status_data
= oxu_hub_status_data
,
3661 .hub_control
= oxu_hub_control
,
3662 .bus_suspend
= oxu_bus_suspend
,
3663 .bus_resume
= oxu_bus_resume
,
3670 static void oxu_configuration(struct platform_device
*pdev
, void *base
)
3674 /* Initialize top level registers.
3677 oxu_writel(base
, OXU_HOSTIFCONFIG
, 0x0000037D);
3678 oxu_writel(base
, OXU_SOFTRESET
, OXU_SRESET
);
3679 oxu_writel(base
, OXU_HOSTIFCONFIG
, 0x0000037D);
3681 tmp
= oxu_readl(base
, OXU_PIOBURSTREADCTRL
);
3682 oxu_writel(base
, OXU_PIOBURSTREADCTRL
, tmp
| 0x0040);
3684 oxu_writel(base
, OXU_ASO
, OXU_SPHPOEN
| OXU_OVRCCURPUPDEN
|
3685 OXU_COMPARATOR
| OXU_ASO_OP
);
3687 tmp
= oxu_readl(base
, OXU_CLKCTRL_SET
);
3688 oxu_writel(base
, OXU_CLKCTRL_SET
, tmp
| OXU_SYSCLKEN
| OXU_USBOTGCLKEN
);
3690 /* Clear all top interrupt enable */
3691 oxu_writel(base
, OXU_CHIPIRQEN_CLR
, 0xff);
3693 /* Clear all top interrupt status */
3694 oxu_writel(base
, OXU_CHIPIRQSTATUS
, 0xff);
3696 /* Enable all needed top interrupt except OTG SPH core */
3697 oxu_writel(base
, OXU_CHIPIRQEN_SET
, OXU_USBSPHLPWUI
| OXU_USBOTGLPWUI
);
3700 static int oxu_verify_id(struct platform_device
*pdev
, void *base
)
3710 /* Read controller signature register to find a match */
3711 id
= oxu_readl(base
, OXU_DEVICEID
);
3712 dev_info(&pdev
->dev
, "device ID %x\n", id
);
3713 if ((id
& OXU_REV_MASK
) != (OXU_REV_2100
<< OXU_REV_SHIFT
))
3716 dev_info(&pdev
->dev
, "found device %x %s (%04x:%04x)\n",
3717 id
>> OXU_REV_SHIFT
,
3718 bo
[(id
& OXU_BO_MASK
) >> OXU_BO_SHIFT
],
3719 (id
& OXU_MAJ_REV_MASK
) >> OXU_MAJ_REV_SHIFT
,
3720 (id
& OXU_MIN_REV_MASK
) >> OXU_MIN_REV_SHIFT
);
3725 static const struct hc_driver oxu_hc_driver
;
3726 static struct usb_hcd
*oxu_create(struct platform_device
*pdev
,
3727 unsigned long memstart
, unsigned long memlen
,
3728 void *base
, int irq
, int otg
)
3730 struct device
*dev
= &pdev
->dev
;
3732 struct usb_hcd
*hcd
;
3733 struct oxu_hcd
*oxu
;
3736 /* Set endian mode and host mode */
3737 oxu_writel(base
+ (otg
? OXU_OTG_CORE_OFFSET
: OXU_SPH_CORE_OFFSET
),
3739 OXU_CM_HOST_ONLY
| OXU_ES_LITTLE
| OXU_VBPS
);
3741 hcd
= usb_create_hcd(&oxu_hc_driver
, dev
,
3742 otg
? "oxu210hp_otg" : "oxu210hp_sph");
3744 return ERR_PTR(-ENOMEM
);
3746 hcd
->rsrc_start
= memstart
;
3747 hcd
->rsrc_len
= memlen
;
3750 hcd
->state
= HC_STATE_HALT
;
3752 oxu
= hcd_to_oxu(hcd
);
3755 ret
= usb_add_hcd(hcd
, irq
, IRQF_SHARED
);
3757 return ERR_PTR(ret
);
3762 static int oxu_init(struct platform_device
*pdev
,
3763 unsigned long memstart
, unsigned long memlen
,
3764 void *base
, int irq
)
3766 struct oxu_info
*info
= platform_get_drvdata(pdev
);
3767 struct usb_hcd
*hcd
;
3770 /* First time configuration at start up */
3771 oxu_configuration(pdev
, base
);
3773 ret
= oxu_verify_id(pdev
, base
);
3775 dev_err(&pdev
->dev
, "no devices found!\n");
3779 /* Create the OTG controller */
3780 hcd
= oxu_create(pdev
, memstart
, memlen
, base
, irq
, 1);
3782 dev_err(&pdev
->dev
, "cannot create OTG controller!\n");
3784 goto error_create_otg
;
3788 /* Create the SPH host controller */
3789 hcd
= oxu_create(pdev
, memstart
, memlen
, base
, irq
, 0);
3791 dev_err(&pdev
->dev
, "cannot create SPH controller!\n");
3793 goto error_create_sph
;
3797 oxu_writel(base
, OXU_CHIPIRQEN_SET
,
3798 oxu_readl(base
, OXU_CHIPIRQEN_SET
) | 3);
3803 usb_remove_hcd(info
->hcd
[0]);
3804 usb_put_hcd(info
->hcd
[0]);
3810 static int oxu_drv_probe(struct platform_device
*pdev
)
3812 struct resource
*res
;
3814 unsigned long memstart
, memlen
;
3816 struct oxu_info
*info
;
3822 * Get the platform resources
3824 res
= platform_get_resource(pdev
, IORESOURCE_IRQ
, 0);
3827 "no IRQ! Check %s setup!\n", dev_name(&pdev
->dev
));
3831 dev_dbg(&pdev
->dev
, "IRQ resource %d\n", irq
);
3833 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
3835 dev_err(&pdev
->dev
, "no registers address! Check %s setup!\n",
3836 dev_name(&pdev
->dev
));
3839 memstart
= res
->start
;
3840 memlen
= res
->end
- res
->start
+ 1;
3841 dev_dbg(&pdev
->dev
, "MEM resource %lx-%lx\n", memstart
, memlen
);
3842 if (!request_mem_region(memstart
, memlen
,
3843 oxu_hc_driver
.description
)) {
3844 dev_dbg(&pdev
->dev
, "memory area already in use\n");
3848 ret
= set_irq_type(irq
, IRQF_TRIGGER_FALLING
);
3850 dev_err(&pdev
->dev
, "error setting irq type\n");
3852 goto error_set_irq_type
;
3855 base
= ioremap(memstart
, memlen
);
3857 dev_dbg(&pdev
->dev
, "error mapping memory\n");
3862 /* Allocate a driver data struct to hold useful info for both
3865 info
= kzalloc(sizeof(struct oxu_info
), GFP_KERNEL
);
3867 dev_dbg(&pdev
->dev
, "error allocating memory\n");
3871 platform_set_drvdata(pdev
, info
);
3873 ret
= oxu_init(pdev
, memstart
, memlen
, base
, irq
);
3875 dev_dbg(&pdev
->dev
, "cannot init USB devices\n");
3879 dev_info(&pdev
->dev
, "devices enabled and running\n");
3880 platform_set_drvdata(pdev
, info
);
3886 platform_set_drvdata(pdev
, NULL
);
3893 release_mem_region(memstart
, memlen
);
3895 dev_err(&pdev
->dev
, "init %s fail, %d\n", dev_name(&pdev
->dev
), ret
);
3899 static void oxu_remove(struct platform_device
*pdev
, struct usb_hcd
*hcd
)
3901 usb_remove_hcd(hcd
);
3905 static int oxu_drv_remove(struct platform_device
*pdev
)
3907 struct oxu_info
*info
= platform_get_drvdata(pdev
);
3908 unsigned long memstart
= info
->hcd
[0]->rsrc_start
,
3909 memlen
= info
->hcd
[0]->rsrc_len
;
3910 void *base
= info
->hcd
[0]->regs
;
3912 oxu_remove(pdev
, info
->hcd
[0]);
3913 oxu_remove(pdev
, info
->hcd
[1]);
3916 release_mem_region(memstart
, memlen
);
3919 platform_set_drvdata(pdev
, NULL
);
3924 static void oxu_drv_shutdown(struct platform_device
*pdev
)
3926 oxu_drv_remove(pdev
);
3931 static int oxu_drv_suspend(struct device
*dev
)
3933 struct platform_device
*pdev
= to_platform_device(dev
);
3934 struct usb_hcd
*hcd
= dev_get_drvdata(dev
);
3939 static int oxu_drv_resume(struct device
*dev
)
3941 struct platform_device
*pdev
= to_platform_device(dev
);
3942 struct usb_hcd
*hcd
= dev_get_drvdata(dev
);
3947 #define oxu_drv_suspend NULL
3948 #define oxu_drv_resume NULL
3951 static struct platform_driver oxu_driver
= {
3952 .probe
= oxu_drv_probe
,
3953 .remove
= oxu_drv_remove
,
3954 .shutdown
= oxu_drv_shutdown
,
3955 .suspend
= oxu_drv_suspend
,
3956 .resume
= oxu_drv_resume
,
3958 .name
= "oxu210hp-hcd",
3959 .bus
= &platform_bus_type
3963 static int __init
oxu_module_init(void)
3967 retval
= platform_driver_register(&oxu_driver
);
3974 static void __exit
oxu_module_cleanup(void)
3976 platform_driver_unregister(&oxu_driver
);
3979 module_init(oxu_module_init
);
3980 module_exit(oxu_module_cleanup
);
3982 MODULE_DESCRIPTION("Oxford OXU210HP HCD driver - ver. " DRIVER_VERSION
);
3983 MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
3984 MODULE_LICENSE("GPL");