MIPS: Alchemy: DB1200: Remove custom wait implementation
[linux-2.6/linux-mips.git] / drivers / usb / host / uhci-hcd.c
blob09197067fe6bc1032c4859fa557b5b15bb8be92c
1 /*
2 * Universal Host Controller Interface driver for USB.
4 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
6 * (C) Copyright 1999 Linus Torvalds
7 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
8 * (C) Copyright 1999 Randy Dunlap
9 * (C) Copyright 1999 Georg Acher, acher@in.tum.de
10 * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
11 * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
12 * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
13 * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
14 * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
15 * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
16 * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu
18 * Intel documents this fairly well, and as far as I know there
19 * are no royalties or anything like that, but even so there are
20 * people who decided that they want to do the same thing in a
21 * completely different way.
25 #include <linux/module.h>
26 #include <linux/pci.h>
27 #include <linux/kernel.h>
28 #include <linux/init.h>
29 #include <linux/delay.h>
30 #include <linux/ioport.h>
31 #include <linux/slab.h>
32 #include <linux/errno.h>
33 #include <linux/unistd.h>
34 #include <linux/interrupt.h>
35 #include <linux/spinlock.h>
36 #include <linux/debugfs.h>
37 #include <linux/pm.h>
38 #include <linux/dmapool.h>
39 #include <linux/dma-mapping.h>
40 #include <linux/usb.h>
41 #include <linux/bitops.h>
42 #include <linux/dmi.h>
44 #include <asm/uaccess.h>
45 #include <asm/io.h>
46 #include <asm/irq.h>
47 #include <asm/system.h>
49 #include "../core/hcd.h"
50 #include "uhci-hcd.h"
51 #include "pci-quirks.h"
54 * Version Information
56 #define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \
57 Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \
58 Alan Stern"
59 #define DRIVER_DESC "USB Universal Host Controller Interface driver"
61 /* for flakey hardware, ignore overcurrent indicators */
62 static int ignore_oc;
63 module_param(ignore_oc, bool, S_IRUGO);
64 MODULE_PARM_DESC(ignore_oc, "ignore hardware overcurrent indications");
67 * debug = 0, no debugging messages
68 * debug = 1, dump failed URBs except for stalls
69 * debug = 2, dump all failed URBs (including stalls)
70 * show all queues in /sys/kernel/debug/uhci/[pci_addr]
71 * debug = 3, show all TDs in URBs when dumping
73 #ifdef DEBUG
74 #define DEBUG_CONFIGURED 1
75 static int debug = 1;
76 module_param(debug, int, S_IRUGO | S_IWUSR);
77 MODULE_PARM_DESC(debug, "Debug level");
79 #else
80 #define DEBUG_CONFIGURED 0
81 #define debug 0
82 #endif
84 static char *errbuf;
85 #define ERRBUF_LEN (32 * 1024)
87 static struct kmem_cache *uhci_up_cachep; /* urb_priv */
89 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state);
90 static void wakeup_rh(struct uhci_hcd *uhci);
91 static void uhci_get_current_frame_number(struct uhci_hcd *uhci);
94 * Calculate the link pointer DMA value for the first Skeleton QH in a frame.
96 static __le32 uhci_frame_skel_link(struct uhci_hcd *uhci, int frame)
98 int skelnum;
101 * The interrupt queues will be interleaved as evenly as possible.
102 * There's not much to be done about period-1 interrupts; they have
103 * to occur in every frame. But we can schedule period-2 interrupts
104 * in odd-numbered frames, period-4 interrupts in frames congruent
105 * to 2 (mod 4), and so on. This way each frame only has two
106 * interrupt QHs, which will help spread out bandwidth utilization.
108 * ffs (Find First bit Set) does exactly what we need:
109 * 1,3,5,... => ffs = 0 => use period-2 QH = skelqh[8],
110 * 2,6,10,... => ffs = 1 => use period-4 QH = skelqh[7], etc.
111 * ffs >= 7 => not on any high-period queue, so use
112 * period-1 QH = skelqh[9].
113 * Add in UHCI_NUMFRAMES to insure at least one bit is set.
115 skelnum = 8 - (int) __ffs(frame | UHCI_NUMFRAMES);
116 if (skelnum <= 1)
117 skelnum = 9;
118 return LINK_TO_QH(uhci->skelqh[skelnum]);
121 #include "uhci-debug.c"
122 #include "uhci-q.c"
123 #include "uhci-hub.c"
126 * Finish up a host controller reset and update the recorded state.
128 static void finish_reset(struct uhci_hcd *uhci)
130 int port;
132 /* HCRESET doesn't affect the Suspend, Reset, and Resume Detect
133 * bits in the port status and control registers.
134 * We have to clear them by hand.
136 for (port = 0; port < uhci->rh_numports; ++port)
137 outw(0, uhci->io_addr + USBPORTSC1 + (port * 2));
139 uhci->port_c_suspend = uhci->resuming_ports = 0;
140 uhci->rh_state = UHCI_RH_RESET;
141 uhci->is_stopped = UHCI_IS_STOPPED;
142 uhci_to_hcd(uhci)->state = HC_STATE_HALT;
143 uhci_to_hcd(uhci)->poll_rh = 0;
145 uhci->dead = 0; /* Full reset resurrects the controller */
149 * Last rites for a defunct/nonfunctional controller
150 * or one we don't want to use any more.
152 static void uhci_hc_died(struct uhci_hcd *uhci)
154 uhci_get_current_frame_number(uhci);
155 uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr);
156 finish_reset(uhci);
157 uhci->dead = 1;
159 /* The current frame may already be partway finished */
160 ++uhci->frame_number;
164 * Initialize a controller that was newly discovered or has lost power
165 * or otherwise been reset while it was suspended. In none of these cases
166 * can we be sure of its previous state.
168 static void check_and_reset_hc(struct uhci_hcd *uhci)
170 if (uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr))
171 finish_reset(uhci);
175 * Store the basic register settings needed by the controller.
177 static void configure_hc(struct uhci_hcd *uhci)
179 /* Set the frame length to the default: 1 ms exactly */
180 outb(USBSOF_DEFAULT, uhci->io_addr + USBSOF);
182 /* Store the frame list base address */
183 outl(uhci->frame_dma_handle, uhci->io_addr + USBFLBASEADD);
185 /* Set the current frame number */
186 outw(uhci->frame_number & UHCI_MAX_SOF_NUMBER,
187 uhci->io_addr + USBFRNUM);
189 /* Mark controller as not halted before we enable interrupts */
190 uhci_to_hcd(uhci)->state = HC_STATE_SUSPENDED;
191 mb();
193 /* Enable PIRQ */
194 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
195 USBLEGSUP_DEFAULT);
199 static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci)
201 int port;
203 /* If we have to ignore overcurrent events then almost by definition
204 * we can't depend on resume-detect interrupts. */
205 if (ignore_oc)
206 return 1;
208 switch (to_pci_dev(uhci_dev(uhci))->vendor) {
209 default:
210 break;
212 case PCI_VENDOR_ID_GENESYS:
213 /* Genesys Logic's GL880S controllers don't generate
214 * resume-detect interrupts.
216 return 1;
218 case PCI_VENDOR_ID_INTEL:
219 /* Some of Intel's USB controllers have a bug that causes
220 * resume-detect interrupts if any port has an over-current
221 * condition. To make matters worse, some motherboards
222 * hardwire unused USB ports' over-current inputs active!
223 * To prevent problems, we will not enable resume-detect
224 * interrupts if any ports are OC.
226 for (port = 0; port < uhci->rh_numports; ++port) {
227 if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
228 USBPORTSC_OC)
229 return 1;
231 break;
233 return 0;
236 static int global_suspend_mode_is_broken(struct uhci_hcd *uhci)
238 int port;
239 const char *sys_info;
240 static char bad_Asus_board[] = "A7V8X";
242 /* One of Asus's motherboards has a bug which causes it to
243 * wake up immediately from suspend-to-RAM if any of the ports
244 * are connected. In such cases we will not set EGSM.
246 sys_info = dmi_get_system_info(DMI_BOARD_NAME);
247 if (sys_info && !strcmp(sys_info, bad_Asus_board)) {
248 for (port = 0; port < uhci->rh_numports; ++port) {
249 if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
250 USBPORTSC_CCS)
251 return 1;
255 return 0;
258 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state)
259 __releases(uhci->lock)
260 __acquires(uhci->lock)
262 int auto_stop;
263 int int_enable, egsm_enable, wakeup_enable;
264 struct usb_device *rhdev = uhci_to_hcd(uhci)->self.root_hub;
266 auto_stop = (new_state == UHCI_RH_AUTO_STOPPED);
267 dev_dbg(&rhdev->dev, "%s%s\n", __func__,
268 (auto_stop ? " (auto-stop)" : ""));
270 /* Start off by assuming Resume-Detect interrupts and EGSM work
271 * and that remote wakeups should be enabled.
273 egsm_enable = USBCMD_EGSM;
274 uhci->RD_enable = 1;
275 int_enable = USBINTR_RESUME;
276 wakeup_enable = 1;
278 /* In auto-stop mode wakeups must always be detected, but
279 * Resume-Detect interrupts may be prohibited. (In the absence
280 * of CONFIG_PM, they are always disallowed.)
282 if (auto_stop) {
283 if (!device_may_wakeup(&rhdev->dev))
284 int_enable = 0;
286 /* In bus-suspend mode wakeups may be disabled, but if they are
287 * allowed then so are Resume-Detect interrupts.
289 } else {
290 #ifdef CONFIG_PM
291 if (!rhdev->do_remote_wakeup)
292 wakeup_enable = 0;
293 #endif
296 /* EGSM causes the root hub to echo a 'K' signal (resume) out any
297 * port which requests a remote wakeup. According to the USB spec,
298 * every hub is supposed to do this. But if we are ignoring
299 * remote-wakeup requests anyway then there's no point to it.
300 * We also shouldn't enable EGSM if it's broken.
302 if (!wakeup_enable || global_suspend_mode_is_broken(uhci))
303 egsm_enable = 0;
305 /* If we're ignoring wakeup events then there's no reason to
306 * enable Resume-Detect interrupts. We also shouldn't enable
307 * them if they are broken or disallowed.
309 * This logic may lead us to enabling RD but not EGSM. The UHCI
310 * spec foolishly says that RD works only when EGSM is on, but
311 * there's no harm in enabling it anyway -- perhaps some chips
312 * will implement it!
314 if (!wakeup_enable || resume_detect_interrupts_are_broken(uhci) ||
315 !int_enable)
316 uhci->RD_enable = int_enable = 0;
318 outw(int_enable, uhci->io_addr + USBINTR);
319 outw(egsm_enable | USBCMD_CF, uhci->io_addr + USBCMD);
320 mb();
321 udelay(5);
323 /* If we're auto-stopping then no devices have been attached
324 * for a while, so there shouldn't be any active URBs and the
325 * controller should stop after a few microseconds. Otherwise
326 * we will give the controller one frame to stop.
328 if (!auto_stop && !(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) {
329 uhci->rh_state = UHCI_RH_SUSPENDING;
330 spin_unlock_irq(&uhci->lock);
331 msleep(1);
332 spin_lock_irq(&uhci->lock);
333 if (uhci->dead)
334 return;
336 if (!(inw(uhci->io_addr + USBSTS) & USBSTS_HCH))
337 dev_warn(uhci_dev(uhci), "Controller not stopped yet!\n");
339 uhci_get_current_frame_number(uhci);
341 uhci->rh_state = new_state;
342 uhci->is_stopped = UHCI_IS_STOPPED;
344 /* If interrupts don't work and remote wakeup is enabled then
345 * the suspended root hub needs to be polled.
347 uhci_to_hcd(uhci)->poll_rh = (!int_enable && wakeup_enable);
349 uhci_scan_schedule(uhci);
350 uhci_fsbr_off(uhci);
353 static void start_rh(struct uhci_hcd *uhci)
355 uhci_to_hcd(uhci)->state = HC_STATE_RUNNING;
356 uhci->is_stopped = 0;
358 /* Mark it configured and running with a 64-byte max packet.
359 * All interrupts are enabled, even though RESUME won't do anything.
361 outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, uhci->io_addr + USBCMD);
362 outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP,
363 uhci->io_addr + USBINTR);
364 mb();
365 uhci->rh_state = UHCI_RH_RUNNING;
366 uhci_to_hcd(uhci)->poll_rh = 1;
369 static void wakeup_rh(struct uhci_hcd *uhci)
370 __releases(uhci->lock)
371 __acquires(uhci->lock)
373 dev_dbg(&uhci_to_hcd(uhci)->self.root_hub->dev,
374 "%s%s\n", __func__,
375 uhci->rh_state == UHCI_RH_AUTO_STOPPED ?
376 " (auto-start)" : "");
378 /* If we are auto-stopped then no devices are attached so there's
379 * no need for wakeup signals. Otherwise we send Global Resume
380 * for 20 ms.
382 if (uhci->rh_state == UHCI_RH_SUSPENDED) {
383 unsigned egsm;
385 /* Keep EGSM on if it was set before */
386 egsm = inw(uhci->io_addr + USBCMD) & USBCMD_EGSM;
387 uhci->rh_state = UHCI_RH_RESUMING;
388 outw(USBCMD_FGR | USBCMD_CF | egsm, uhci->io_addr + USBCMD);
389 spin_unlock_irq(&uhci->lock);
390 msleep(20);
391 spin_lock_irq(&uhci->lock);
392 if (uhci->dead)
393 return;
395 /* End Global Resume and wait for EOP to be sent */
396 outw(USBCMD_CF, uhci->io_addr + USBCMD);
397 mb();
398 udelay(4);
399 if (inw(uhci->io_addr + USBCMD) & USBCMD_FGR)
400 dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n");
403 start_rh(uhci);
405 /* Restart root hub polling */
406 mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies);
409 static irqreturn_t uhci_irq(struct usb_hcd *hcd)
411 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
412 unsigned short status;
415 * Read the interrupt status, and write it back to clear the
416 * interrupt cause. Contrary to the UHCI specification, the
417 * "HC Halted" status bit is persistent: it is RO, not R/WC.
419 status = inw(uhci->io_addr + USBSTS);
420 if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */
421 return IRQ_NONE;
422 outw(status, uhci->io_addr + USBSTS); /* Clear it */
424 if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) {
425 if (status & USBSTS_HSE)
426 dev_err(uhci_dev(uhci), "host system error, "
427 "PCI problems?\n");
428 if (status & USBSTS_HCPE)
429 dev_err(uhci_dev(uhci), "host controller process "
430 "error, something bad happened!\n");
431 if (status & USBSTS_HCH) {
432 spin_lock(&uhci->lock);
433 if (uhci->rh_state >= UHCI_RH_RUNNING) {
434 dev_err(uhci_dev(uhci),
435 "host controller halted, "
436 "very bad!\n");
437 if (debug > 1 && errbuf) {
438 /* Print the schedule for debugging */
439 uhci_sprint_schedule(uhci,
440 errbuf, ERRBUF_LEN);
441 lprintk(errbuf);
443 uhci_hc_died(uhci);
445 /* Force a callback in case there are
446 * pending unlinks */
447 mod_timer(&hcd->rh_timer, jiffies);
449 spin_unlock(&uhci->lock);
453 if (status & USBSTS_RD)
454 usb_hcd_poll_rh_status(hcd);
455 else {
456 spin_lock(&uhci->lock);
457 uhci_scan_schedule(uhci);
458 spin_unlock(&uhci->lock);
461 return IRQ_HANDLED;
465 * Store the current frame number in uhci->frame_number if the controller
466 * is runnning. Expand from 11 bits (of which we use only 10) to a
467 * full-sized integer.
469 * Like many other parts of the driver, this code relies on being polled
470 * more than once per second as long as the controller is running.
472 static void uhci_get_current_frame_number(struct uhci_hcd *uhci)
474 if (!uhci->is_stopped) {
475 unsigned delta;
477 delta = (inw(uhci->io_addr + USBFRNUM) - uhci->frame_number) &
478 (UHCI_NUMFRAMES - 1);
479 uhci->frame_number += delta;
484 * De-allocate all resources
486 static void release_uhci(struct uhci_hcd *uhci)
488 int i;
490 if (DEBUG_CONFIGURED) {
491 spin_lock_irq(&uhci->lock);
492 uhci->is_initialized = 0;
493 spin_unlock_irq(&uhci->lock);
495 debugfs_remove(uhci->dentry);
498 for (i = 0; i < UHCI_NUM_SKELQH; i++)
499 uhci_free_qh(uhci, uhci->skelqh[i]);
501 uhci_free_td(uhci, uhci->term_td);
503 dma_pool_destroy(uhci->qh_pool);
505 dma_pool_destroy(uhci->td_pool);
507 kfree(uhci->frame_cpu);
509 dma_free_coherent(uhci_dev(uhci),
510 UHCI_NUMFRAMES * sizeof(*uhci->frame),
511 uhci->frame, uhci->frame_dma_handle);
514 static int uhci_init(struct usb_hcd *hcd)
516 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
517 unsigned io_size = (unsigned) hcd->rsrc_len;
518 int port;
520 uhci->io_addr = (unsigned long) hcd->rsrc_start;
522 /* The UHCI spec says devices must have 2 ports, and goes on to say
523 * they may have more but gives no way to determine how many there
524 * are. However according to the UHCI spec, Bit 7 of the port
525 * status and control register is always set to 1. So we try to
526 * use this to our advantage. Another common failure mode when
527 * a nonexistent register is addressed is to return all ones, so
528 * we test for that also.
530 for (port = 0; port < (io_size - USBPORTSC1) / 2; port++) {
531 unsigned int portstatus;
533 portstatus = inw(uhci->io_addr + USBPORTSC1 + (port * 2));
534 if (!(portstatus & 0x0080) || portstatus == 0xffff)
535 break;
537 if (debug)
538 dev_info(uhci_dev(uhci), "detected %d ports\n", port);
540 /* Anything greater than 7 is weird so we'll ignore it. */
541 if (port > UHCI_RH_MAXCHILD) {
542 dev_info(uhci_dev(uhci), "port count misdetected? "
543 "forcing to 2 ports\n");
544 port = 2;
546 uhci->rh_numports = port;
548 /* Kick BIOS off this hardware and reset if the controller
549 * isn't already safely quiescent.
551 check_and_reset_hc(uhci);
552 return 0;
555 /* Make sure the controller is quiescent and that we're not using it
556 * any more. This is mainly for the benefit of programs which, like kexec,
557 * expect the hardware to be idle: not doing DMA or generating IRQs.
559 * This routine may be called in a damaged or failing kernel. Hence we
560 * do not acquire the spinlock before shutting down the controller.
562 static void uhci_shutdown(struct pci_dev *pdev)
564 struct usb_hcd *hcd = (struct usb_hcd *) pci_get_drvdata(pdev);
566 uhci_hc_died(hcd_to_uhci(hcd));
570 * Allocate a frame list, and then setup the skeleton
572 * The hardware doesn't really know any difference
573 * in the queues, but the order does matter for the
574 * protocols higher up. The order in which the queues
575 * are encountered by the hardware is:
577 * - All isochronous events are handled before any
578 * of the queues. We don't do that here, because
579 * we'll create the actual TD entries on demand.
580 * - The first queue is the high-period interrupt queue.
581 * - The second queue is the period-1 interrupt and async
582 * (low-speed control, full-speed control, then bulk) queue.
583 * - The third queue is the terminating bandwidth reclamation queue,
584 * which contains no members, loops back to itself, and is present
585 * only when FSBR is on and there are no full-speed control or bulk QHs.
587 static int uhci_start(struct usb_hcd *hcd)
589 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
590 int retval = -EBUSY;
591 int i;
592 struct dentry *dentry;
594 hcd->uses_new_polling = 1;
596 spin_lock_init(&uhci->lock);
597 setup_timer(&uhci->fsbr_timer, uhci_fsbr_timeout,
598 (unsigned long) uhci);
599 INIT_LIST_HEAD(&uhci->idle_qh_list);
600 init_waitqueue_head(&uhci->waitqh);
602 if (DEBUG_CONFIGURED) {
603 dentry = debugfs_create_file(hcd->self.bus_name,
604 S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root,
605 uhci, &uhci_debug_operations);
606 if (!dentry) {
607 dev_err(uhci_dev(uhci), "couldn't create uhci "
608 "debugfs entry\n");
609 retval = -ENOMEM;
610 goto err_create_debug_entry;
612 uhci->dentry = dentry;
615 uhci->frame = dma_alloc_coherent(uhci_dev(uhci),
616 UHCI_NUMFRAMES * sizeof(*uhci->frame),
617 &uhci->frame_dma_handle, 0);
618 if (!uhci->frame) {
619 dev_err(uhci_dev(uhci), "unable to allocate "
620 "consistent memory for frame list\n");
621 goto err_alloc_frame;
623 memset(uhci->frame, 0, UHCI_NUMFRAMES * sizeof(*uhci->frame));
625 uhci->frame_cpu = kcalloc(UHCI_NUMFRAMES, sizeof(*uhci->frame_cpu),
626 GFP_KERNEL);
627 if (!uhci->frame_cpu) {
628 dev_err(uhci_dev(uhci), "unable to allocate "
629 "memory for frame pointers\n");
630 goto err_alloc_frame_cpu;
633 uhci->td_pool = dma_pool_create("uhci_td", uhci_dev(uhci),
634 sizeof(struct uhci_td), 16, 0);
635 if (!uhci->td_pool) {
636 dev_err(uhci_dev(uhci), "unable to create td dma_pool\n");
637 goto err_create_td_pool;
640 uhci->qh_pool = dma_pool_create("uhci_qh", uhci_dev(uhci),
641 sizeof(struct uhci_qh), 16, 0);
642 if (!uhci->qh_pool) {
643 dev_err(uhci_dev(uhci), "unable to create qh dma_pool\n");
644 goto err_create_qh_pool;
647 uhci->term_td = uhci_alloc_td(uhci);
648 if (!uhci->term_td) {
649 dev_err(uhci_dev(uhci), "unable to allocate terminating TD\n");
650 goto err_alloc_term_td;
653 for (i = 0; i < UHCI_NUM_SKELQH; i++) {
654 uhci->skelqh[i] = uhci_alloc_qh(uhci, NULL, NULL);
655 if (!uhci->skelqh[i]) {
656 dev_err(uhci_dev(uhci), "unable to allocate QH\n");
657 goto err_alloc_skelqh;
662 * 8 Interrupt queues; link all higher int queues to int1 = async
664 for (i = SKEL_ISO + 1; i < SKEL_ASYNC; ++i)
665 uhci->skelqh[i]->link = LINK_TO_QH(uhci->skel_async_qh);
666 uhci->skel_async_qh->link = UHCI_PTR_TERM;
667 uhci->skel_term_qh->link = LINK_TO_QH(uhci->skel_term_qh);
669 /* This dummy TD is to work around a bug in Intel PIIX controllers */
670 uhci_fill_td(uhci->term_td, 0, uhci_explen(0) |
671 (0x7f << TD_TOKEN_DEVADDR_SHIFT) | USB_PID_IN, 0);
672 uhci->term_td->link = UHCI_PTR_TERM;
673 uhci->skel_async_qh->element = uhci->skel_term_qh->element =
674 LINK_TO_TD(uhci->term_td);
677 * Fill the frame list: make all entries point to the proper
678 * interrupt queue.
680 for (i = 0; i < UHCI_NUMFRAMES; i++) {
682 /* Only place we don't use the frame list routines */
683 uhci->frame[i] = uhci_frame_skel_link(uhci, i);
687 * Some architectures require a full mb() to enforce completion of
688 * the memory writes above before the I/O transfers in configure_hc().
690 mb();
692 configure_hc(uhci);
693 uhci->is_initialized = 1;
694 start_rh(uhci);
695 return 0;
698 * error exits:
700 err_alloc_skelqh:
701 for (i = 0; i < UHCI_NUM_SKELQH; i++) {
702 if (uhci->skelqh[i])
703 uhci_free_qh(uhci, uhci->skelqh[i]);
706 uhci_free_td(uhci, uhci->term_td);
708 err_alloc_term_td:
709 dma_pool_destroy(uhci->qh_pool);
711 err_create_qh_pool:
712 dma_pool_destroy(uhci->td_pool);
714 err_create_td_pool:
715 kfree(uhci->frame_cpu);
717 err_alloc_frame_cpu:
718 dma_free_coherent(uhci_dev(uhci),
719 UHCI_NUMFRAMES * sizeof(*uhci->frame),
720 uhci->frame, uhci->frame_dma_handle);
722 err_alloc_frame:
723 debugfs_remove(uhci->dentry);
725 err_create_debug_entry:
726 return retval;
729 static void uhci_stop(struct usb_hcd *hcd)
731 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
733 spin_lock_irq(&uhci->lock);
734 if (test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags) && !uhci->dead)
735 uhci_hc_died(uhci);
736 uhci_scan_schedule(uhci);
737 spin_unlock_irq(&uhci->lock);
738 synchronize_irq(hcd->irq);
740 del_timer_sync(&uhci->fsbr_timer);
741 release_uhci(uhci);
744 #ifdef CONFIG_PM
745 static int uhci_rh_suspend(struct usb_hcd *hcd)
747 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
748 int rc = 0;
750 spin_lock_irq(&uhci->lock);
751 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags))
752 rc = -ESHUTDOWN;
753 else if (uhci->dead)
754 ; /* Dead controllers tell no tales */
756 /* Once the controller is stopped, port resumes that are already
757 * in progress won't complete. Hence if remote wakeup is enabled
758 * for the root hub and any ports are in the middle of a resume or
759 * remote wakeup, we must fail the suspend.
761 else if (hcd->self.root_hub->do_remote_wakeup &&
762 uhci->resuming_ports) {
763 dev_dbg(uhci_dev(uhci), "suspend failed because a port "
764 "is resuming\n");
765 rc = -EBUSY;
766 } else
767 suspend_rh(uhci, UHCI_RH_SUSPENDED);
768 spin_unlock_irq(&uhci->lock);
769 return rc;
772 static int uhci_rh_resume(struct usb_hcd *hcd)
774 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
775 int rc = 0;
777 spin_lock_irq(&uhci->lock);
778 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags))
779 rc = -ESHUTDOWN;
780 else if (!uhci->dead)
781 wakeup_rh(uhci);
782 spin_unlock_irq(&uhci->lock);
783 return rc;
786 static int uhci_pci_suspend(struct usb_hcd *hcd)
788 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
789 int rc = 0;
791 dev_dbg(uhci_dev(uhci), "%s\n", __func__);
793 spin_lock_irq(&uhci->lock);
794 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags) || uhci->dead)
795 goto done_okay; /* Already suspended or dead */
797 if (uhci->rh_state > UHCI_RH_SUSPENDED) {
798 dev_warn(uhci_dev(uhci), "Root hub isn't suspended!\n");
799 rc = -EBUSY;
800 goto done;
803 /* All PCI host controllers are required to disable IRQ generation
804 * at the source, so we must turn off PIRQ.
806 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 0);
807 mb();
808 hcd->poll_rh = 0;
810 /* FIXME: Enable non-PME# remote wakeup? */
812 done_okay:
813 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
814 done:
815 spin_unlock_irq(&uhci->lock);
816 return rc;
819 static int uhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
821 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
823 dev_dbg(uhci_dev(uhci), "%s\n", __func__);
825 /* Since we aren't in D3 any more, it's safe to set this flag
826 * even if the controller was dead.
828 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
829 mb();
831 spin_lock_irq(&uhci->lock);
833 /* Make sure resume from hibernation re-enumerates everything */
834 if (hibernated)
835 uhci_hc_died(uhci);
837 /* FIXME: Disable non-PME# remote wakeup? */
839 /* The firmware or a boot kernel may have changed the controller
840 * settings during a system wakeup. Check it and reconfigure
841 * to avoid problems.
843 check_and_reset_hc(uhci);
845 /* If the controller was dead before, it's back alive now */
846 configure_hc(uhci);
848 if (uhci->rh_state == UHCI_RH_RESET) {
850 /* The controller had to be reset */
851 usb_root_hub_lost_power(hcd->self.root_hub);
852 suspend_rh(uhci, UHCI_RH_SUSPENDED);
855 spin_unlock_irq(&uhci->lock);
857 /* If interrupts don't work and remote wakeup is enabled then
858 * the suspended root hub needs to be polled.
860 if (!uhci->RD_enable && hcd->self.root_hub->do_remote_wakeup) {
861 hcd->poll_rh = 1;
862 usb_hcd_poll_rh_status(hcd);
864 return 0;
866 #endif
868 /* Wait until a particular device/endpoint's QH is idle, and free it */
869 static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd,
870 struct usb_host_endpoint *hep)
872 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
873 struct uhci_qh *qh;
875 spin_lock_irq(&uhci->lock);
876 qh = (struct uhci_qh *) hep->hcpriv;
877 if (qh == NULL)
878 goto done;
880 while (qh->state != QH_STATE_IDLE) {
881 ++uhci->num_waiting;
882 spin_unlock_irq(&uhci->lock);
883 wait_event_interruptible(uhci->waitqh,
884 qh->state == QH_STATE_IDLE);
885 spin_lock_irq(&uhci->lock);
886 --uhci->num_waiting;
889 uhci_free_qh(uhci, qh);
890 done:
891 spin_unlock_irq(&uhci->lock);
894 static int uhci_hcd_get_frame_number(struct usb_hcd *hcd)
896 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
897 unsigned frame_number;
898 unsigned delta;
900 /* Minimize latency by avoiding the spinlock */
901 frame_number = uhci->frame_number;
902 barrier();
903 delta = (inw(uhci->io_addr + USBFRNUM) - frame_number) &
904 (UHCI_NUMFRAMES - 1);
905 return frame_number + delta;
908 static const char hcd_name[] = "uhci_hcd";
910 static const struct hc_driver uhci_driver = {
911 .description = hcd_name,
912 .product_desc = "UHCI Host Controller",
913 .hcd_priv_size = sizeof(struct uhci_hcd),
915 /* Generic hardware linkage */
916 .irq = uhci_irq,
917 .flags = HCD_USB11,
919 /* Basic lifecycle operations */
920 .reset = uhci_init,
921 .start = uhci_start,
922 #ifdef CONFIG_PM
923 .pci_suspend = uhci_pci_suspend,
924 .pci_resume = uhci_pci_resume,
925 .bus_suspend = uhci_rh_suspend,
926 .bus_resume = uhci_rh_resume,
927 #endif
928 .stop = uhci_stop,
930 .urb_enqueue = uhci_urb_enqueue,
931 .urb_dequeue = uhci_urb_dequeue,
933 .endpoint_disable = uhci_hcd_endpoint_disable,
934 .get_frame_number = uhci_hcd_get_frame_number,
936 .hub_status_data = uhci_hub_status_data,
937 .hub_control = uhci_hub_control,
940 static const struct pci_device_id uhci_pci_ids[] = { {
941 /* handle any USB UHCI controller */
942 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_UHCI, ~0),
943 .driver_data = (unsigned long) &uhci_driver,
944 }, { /* end: all zeroes */ }
947 MODULE_DEVICE_TABLE(pci, uhci_pci_ids);
949 static struct pci_driver uhci_pci_driver = {
950 .name = (char *)hcd_name,
951 .id_table = uhci_pci_ids,
953 .probe = usb_hcd_pci_probe,
954 .remove = usb_hcd_pci_remove,
955 .shutdown = uhci_shutdown,
957 #ifdef CONFIG_PM_SLEEP
958 .driver = {
959 .pm = &usb_hcd_pci_pm_ops
961 #endif
964 static int __init uhci_hcd_init(void)
966 int retval = -ENOMEM;
968 if (usb_disabled())
969 return -ENODEV;
971 printk(KERN_INFO "uhci_hcd: " DRIVER_DESC "%s\n",
972 ignore_oc ? ", overcurrent ignored" : "");
973 set_bit(USB_UHCI_LOADED, &usb_hcds_loaded);
975 if (DEBUG_CONFIGURED) {
976 errbuf = kmalloc(ERRBUF_LEN, GFP_KERNEL);
977 if (!errbuf)
978 goto errbuf_failed;
979 uhci_debugfs_root = debugfs_create_dir("uhci", usb_debug_root);
980 if (!uhci_debugfs_root)
981 goto debug_failed;
984 uhci_up_cachep = kmem_cache_create("uhci_urb_priv",
985 sizeof(struct urb_priv), 0, 0, NULL);
986 if (!uhci_up_cachep)
987 goto up_failed;
989 retval = pci_register_driver(&uhci_pci_driver);
990 if (retval)
991 goto init_failed;
993 return 0;
995 init_failed:
996 kmem_cache_destroy(uhci_up_cachep);
998 up_failed:
999 debugfs_remove(uhci_debugfs_root);
1001 debug_failed:
1002 kfree(errbuf);
1004 errbuf_failed:
1006 clear_bit(USB_UHCI_LOADED, &usb_hcds_loaded);
1007 return retval;
1010 static void __exit uhci_hcd_cleanup(void)
1012 pci_unregister_driver(&uhci_pci_driver);
1013 kmem_cache_destroy(uhci_up_cachep);
1014 debugfs_remove(uhci_debugfs_root);
1015 kfree(errbuf);
1016 clear_bit(USB_UHCI_LOADED, &usb_hcds_loaded);
1019 module_init(uhci_hcd_init);
1020 module_exit(uhci_hcd_cleanup);
1022 MODULE_AUTHOR(DRIVER_AUTHOR);
1023 MODULE_DESCRIPTION(DRIVER_DESC);
1024 MODULE_LICENSE("GPL");