drivers/usb/host/xhci-hub.c

   1 /*
   2  * xHCI host controller driver
   3  *
   4  * Copyright (C) 2008 Intel Corp.
   5  *
   6  * Author: Sarah Sharp
   7  * Some code borrowed from the Linux EHCI driver.
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  16  * for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software Foundation,
  20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  */
  22
  23 #include <asm/unaligned.h>
  24
  25 #include "xhci.h"
  26
  27 static void xhci_hub_descriptor(struct xhci_hcd *xhci,
  28                 struct usb_hub_descriptor *desc)
  29 {
  30         int ports;
  31         u16 temp;
  32
  33         ports = HCS_MAX_PORTS(xhci->hcs_params1);
  34
  35         /* USB 3.0 hubs have a different descriptor, but we fake this for now */
  36         desc->bDescriptorType = 0x29;
  37         desc->bPwrOn2PwrGood = 10;      /* xhci section 5.4.9 says 20ms max */
  38         desc->bHubContrCurrent = 0;
  39
  40         desc->bNbrPorts = ports;
  41         temp = 1 + (ports / 8);
  42         desc->bDescLength = 7 + 2 * temp;
  43
  44         /* Why does core/hcd.h define bitmap?  It's just confusing. */
  45         memset(&desc->DeviceRemovable[0], 0, temp);
  46         memset(&desc->DeviceRemovable[temp], 0xff, temp);
  47
  48         /* Ugh, these should be #defines, FIXME */
  49         /* Using table 11-13 in USB 2.0 spec. */
  50         temp = 0;
  51         /* Bits 1:0 - support port power switching, or power always on */
  52         if (HCC_PPC(xhci->hcc_params))
  53                 temp |= 0x0001;
  54         else
  55                 temp |= 0x0002;
  56         /* Bit  2 - root hubs are not part of a compound device */
  57         /* Bits 4:3 - individual port over current protection */
  58         temp |= 0x0008;
  59         /* Bits 6:5 - no TTs in root ports */
  60         /* Bit  7 - no port indicators */
  61         desc->wHubCharacteristics = (__force __u16) cpu_to_le16(temp);
  62 }
  63
  64 static unsigned int xhci_port_speed(unsigned int port_status)
  65 {
  66         if (DEV_LOWSPEED(port_status))
  67                 return 1 << USB_PORT_FEAT_LOWSPEED;
  68         if (DEV_HIGHSPEED(port_status))
  69                 return 1 << USB_PORT_FEAT_HIGHSPEED;
  70         if (DEV_SUPERSPEED(port_status))
  71                 return 1 << USB_PORT_FEAT_SUPERSPEED;
  72         /*
  73          * FIXME: Yes, we should check for full speed, but the core uses that as
  74          * a default in portspeed() in usb/core/hub.c (which is the only place
  75          * USB_PORT_FEAT_*SPEED is used).
  76          */
  77         return 0;
  78 }
  79
  80 /*
  81  * These bits are Read Only (RO) and should be saved and written to the
  82  * registers: 0, 3, 10:13, 30
  83  * connect status, over-current status, port speed, and device removable.
  84  * connect status and port speed are also sticky - meaning they're in
  85  * the AUX well and they aren't changed by a hot, warm, or cold reset.
  86  */
  87 #define XHCI_PORT_RO    ((1<<0) | (1<<3) | (0xf<<10) | (1<<30))
  88 /*
  89  * These bits are RW; writing a 0 clears the bit, writing a 1 sets the bit:
  90  * bits 5:8, 9, 14:15, 25:27
  91  * link state, port power, port indicator state, "wake on" enable state
  92  */
  93 #define XHCI_PORT_RWS   ((0xf<<5) | (1<<9) | (0x3<<14) | (0x7<<25))
  94 /*
  95  * These bits are RW; writing a 1 sets the bit, writing a 0 has no effect:
  96  * bit 4 (port reset)
  97  */
  98 #define XHCI_PORT_RW1S  ((1<<4))
  99 /*
 100  * These bits are RW; writing a 1 clears the bit, writing a 0 has no effect:
 101  * bits 1, 17, 18, 19, 20, 21, 22, 23
 102  * port enable/disable, and
 103  * change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports),
 104  * over-current, reset, link state, and L1 change
 105  */
 106 #define XHCI_PORT_RW1CS ((1<<1) | (0x7f<<17))
 107 /*
 108  * Bit 16 is RW, and writing a '1' to it causes the link state control to be
 109  * latched in
 110  */
 111 #define XHCI_PORT_RW    ((1<<16))
 112 /*
 113  * These bits are Reserved Zero (RsvdZ) and zero should be written to them:
 114  * bits 2, 24, 28:31
 115  */
 116 #define XHCI_PORT_RZ    ((1<<2) | (1<<24) | (0xf<<28))
 117
 118 /*
 119  * Given a port state, this function returns a value that would result in the
 120  * port being in the same state, if the value was written to the port status
 121  * control register.
 122  * Save Read Only (RO) bits and save read/write bits where
 123  * writing a 0 clears the bit and writing a 1 sets the bit (RWS).
 124  * For all other types (RW1S, RW1CS, RW, and RZ), writing a '0' has no effect.
 125  */
 126 static u32 xhci_port_state_to_neutral(u32 state)
 127 {
 128         /* Save read-only status and port state */
 129         return (state & XHCI_PORT_RO) | (state & XHCI_PORT_RWS);
 130 }
 131
 132 static void xhci_disable_port(struct xhci_hcd *xhci, u16 wIndex,
 133                 u32 __iomem *addr, u32 port_status)
 134 {
 135         /* Write 1 to disable the port */
 136         xhci_writel(xhci, port_status | PORT_PE, addr);
 137         port_status = xhci_readl(xhci, addr);
 138         xhci_dbg(xhci, "disable port, actual port %d status  = 0x%x\n",
 139                         wIndex, port_status);
 140 }
 141
 142 static void xhci_clear_port_change_bit(struct xhci_hcd *xhci, u16 wValue,
 143                 u16 wIndex, u32 __iomem *addr, u32 port_status)
 144 {
 145         char *port_change_bit;
 146         u32 status;
 147
 148         switch (wValue) {
 149         case USB_PORT_FEAT_C_RESET:
 150                 status = PORT_RC;
 151                 port_change_bit = "reset";
 152                 break;
 153         case USB_PORT_FEAT_C_CONNECTION:
 154                 status = PORT_CSC;
 155                 port_change_bit = "connect";
 156                 break;
 157         case USB_PORT_FEAT_C_OVER_CURRENT:
 158                 status = PORT_OCC;
 159                 port_change_bit = "over-current";
 160                 break;
 161         case USB_PORT_FEAT_C_ENABLE:
 162                 status = PORT_PEC;
 163                 port_change_bit = "enable/disable";
 164                 break;
 165         default:
 166                 /* Should never happen */
 167                 return;
 168         }
 169         /* Change bits are all write 1 to clear */
 170         xhci_writel(xhci, port_status | status, addr);
 171         port_status = xhci_readl(xhci, addr);
 172         xhci_dbg(xhci, "clear port %s change, actual port %d status  = 0x%x\n",
 173                         port_change_bit, wIndex, port_status);
 174 }
 175
 176 int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
 177                 u16 wIndex, char *buf, u16 wLength)
 178 {
 179         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 180         int ports;
 181         unsigned long flags;
 182         u32 temp, status;
 183         int retval = 0;
 184         u32 __iomem *addr;
 185
 186         ports = HCS_MAX_PORTS(xhci->hcs_params1);
 187
 188         spin_lock_irqsave(&xhci->lock, flags);
 189         switch (typeReq) {
 190         case GetHubStatus:
 191                 /* No power source, over-current reported per port */
 192                 memset(buf, 0, 4);
 193                 break;
 194         case GetHubDescriptor:
 195                 xhci_hub_descriptor(xhci, (struct usb_hub_descriptor *) buf);
 196                 break;
 197         case GetPortStatus:
 198                 if (!wIndex || wIndex > ports)
 199                         goto error;
 200                 wIndex--;
 201                 status = 0;
 202                 addr = &xhci->op_regs->port_status_base + NUM_PORT_REGS*(wIndex & 0xff);
 203                 temp = xhci_readl(xhci, addr);
 204                 xhci_dbg(xhci, "get port status, actual port %d status  = 0x%x\n", wIndex, temp);
 205
 206                 /* wPortChange bits */
 207                 if (temp & PORT_CSC)
 208                         status |= 1 << USB_PORT_FEAT_C_CONNECTION;
 209                 if (temp & PORT_PEC)
 210                         status |= 1 << USB_PORT_FEAT_C_ENABLE;
 211                 if ((temp & PORT_OCC))
 212                         status |= 1 << USB_PORT_FEAT_C_OVER_CURRENT;
 213                 /*
 214                  * FIXME ignoring suspend, reset, and USB 2.1/3.0 specific
 215                  * changes
 216                  */
 217                 if (temp & PORT_CONNECT) {
 218                         status |= 1 << USB_PORT_FEAT_CONNECTION;
 219                         status |= xhci_port_speed(temp);
 220                 }
 221                 if (temp & PORT_PE)
 222                         status |= 1 << USB_PORT_FEAT_ENABLE;
 223                 if (temp & PORT_OC)
 224                         status |= 1 << USB_PORT_FEAT_OVER_CURRENT;
 225                 if (temp & PORT_RESET)
 226                         status |= 1 << USB_PORT_FEAT_RESET;
 227                 if (temp & PORT_POWER)
 228                         status |= 1 << USB_PORT_FEAT_POWER;
 229                 xhci_dbg(xhci, "Get port status returned 0x%x\n", status);
 230                 put_unaligned(cpu_to_le32(status), (__le32 *) buf);
 231                 break;
 232         case SetPortFeature:
 233                 wIndex &= 0xff;
 234                 if (!wIndex || wIndex > ports)
 235                         goto error;
 236                 wIndex--;
 237                 addr = &xhci->op_regs->port_status_base + NUM_PORT_REGS*(wIndex & 0xff);
 238                 temp = xhci_readl(xhci, addr);
 239                 temp = xhci_port_state_to_neutral(temp);
 240                 switch (wValue) {
 241                 case USB_PORT_FEAT_POWER:
 242                         /*
 243                          * Turn on ports, even if there isn't per-port switching.
 244                          * HC will report connect events even before this is set.
 245                          * However, khubd will ignore the roothub events until
 246                          * the roothub is registered.
 247                          */
 248                         xhci_writel(xhci, temp | PORT_POWER, addr);
 249
 250                         temp = xhci_readl(xhci, addr);
 251                         xhci_dbg(xhci, "set port power, actual port %d status  = 0x%x\n", wIndex, temp);
 252                         break;
 253                 case USB_PORT_FEAT_RESET:
 254                         temp = (temp | PORT_RESET);
 255                         xhci_writel(xhci, temp, addr);
 256
 257                         temp = xhci_readl(xhci, addr);
 258                         xhci_dbg(xhci, "set port reset, actual port %d status  = 0x%x\n", wIndex, temp);
 259                         break;
 260                 default:
 261                         goto error;
 262                 }
 263                 temp = xhci_readl(xhci, addr); /* unblock any posted writes */
 264                 break;
 265         case ClearPortFeature:
 266                 if (!wIndex || wIndex > ports)
 267                         goto error;
 268                 wIndex--;
 269                 addr = &xhci->op_regs->port_status_base +
 270                         NUM_PORT_REGS*(wIndex & 0xff);
 271                 temp = xhci_readl(xhci, addr);
 272                 temp = xhci_port_state_to_neutral(temp);
 273                 switch (wValue) {
 274                 case USB_PORT_FEAT_C_RESET:
 275                 case USB_PORT_FEAT_C_CONNECTION:
 276                 case USB_PORT_FEAT_C_OVER_CURRENT:
 277                 case USB_PORT_FEAT_C_ENABLE:
 278                         xhci_clear_port_change_bit(xhci, wValue, wIndex,
 279                                         addr, temp);
 280                         break;
 281                 case USB_PORT_FEAT_ENABLE:
 282                         xhci_disable_port(xhci, wIndex, addr, temp);
 283                         break;
 284                 default:
 285                         goto error;
 286                 }
 287                 break;
 288         default:
 289 error:
 290                 /* "stall" on error */
 291                 retval = -EPIPE;
 292         }
 293         spin_unlock_irqrestore(&xhci->lock, flags);
 294         return retval;
 295 }
 296
 297 /*
 298  * Returns 0 if the status hasn't changed, or the number of bytes in buf.
 299  * Ports are 0-indexed from the HCD point of view,
 300  * and 1-indexed from the USB core pointer of view.
 301  * xHCI instances can have up to 127 ports, so FIXME if you see more than 15.
 302  *
 303  * Note that the status change bits will be cleared as soon as a port status
 304  * change event is generated, so we use the saved status from that event.
 305  */
 306 int xhci_hub_status_data(struct usb_hcd *hcd, char *buf)
 307 {
 308         unsigned long flags;
 309         u32 temp, status;
 310         int i, retval;
 311         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 312         int ports;
 313         u32 __iomem *addr;
 314
 315         ports = HCS_MAX_PORTS(xhci->hcs_params1);
 316
 317         /* Initial status is no changes */
 318         buf[0] = 0;
 319         status = 0;
 320         if (ports > 7) {
 321                 buf[1] = 0;
 322                 retval = 2;
 323         } else {
 324                 retval = 1;
 325         }
 326
 327         spin_lock_irqsave(&xhci->lock, flags);
 328         /* For each port, did anything change?  If so, set that bit in buf. */
 329         for (i = 0; i < ports; i++) {
 330                 addr = &xhci->op_regs->port_status_base +
 331                         NUM_PORT_REGS*i;
 332                 temp = xhci_readl(xhci, addr);
 333                 if (temp & (PORT_CSC | PORT_PEC | PORT_OCC)) {
 334                         if (i < 7)
 335                                 buf[0] |= 1 << (i + 1);
 336                         else
 337                                 buf[1] |= 1 << (i - 7);
 338                         status = 1;
 339                 }
 340         }
 341         spin_unlock_irqrestore(&xhci->lock, flags);
 342         return status ? retval : 0;
 343 }