MIPS: SB1250: Include correct header and fix a warning
[linux-2.6/linux-mips.git] / arch / arm / mach-davinci / include / mach / common.h
blob50a955f05ef9e127b3a28d0b82d344b797521fd1
1 /*
2 * Header for code common to all DaVinci machines.
4 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
12 #ifndef __ARCH_ARM_MACH_DAVINCI_COMMON_H
13 #define __ARCH_ARM_MACH_DAVINCI_COMMON_H
15 struct sys_timer;
17 extern struct sys_timer davinci_timer;
19 extern void davinci_irq_init(void);
20 extern void __iomem *davinci_intc_base;
21 extern int davinci_intc_type;
23 struct davinci_timer_instance {
24 void __iomem *base;
25 u32 bottom_irq;
26 u32 top_irq;
27 unsigned long cmp_off;
28 unsigned int cmp_irq;
31 struct davinci_timer_info {
32 struct davinci_timer_instance *timers;
33 unsigned int clockevent_id;
34 unsigned int clocksource_id;
37 /* SoC specific init support */
38 struct davinci_soc_info {
39 struct map_desc *io_desc;
40 unsigned long io_desc_num;
41 u32 cpu_id;
42 u32 jtag_id;
43 void __iomem *jtag_id_base;
44 struct davinci_id *ids;
45 unsigned long ids_num;
46 struct clk_lookup *cpu_clks;
47 void __iomem **psc_bases;
48 unsigned long psc_bases_num;
49 void __iomem *pinmux_base;
50 const struct mux_config *pinmux_pins;
51 unsigned long pinmux_pins_num;
52 void __iomem *intc_base;
53 int intc_type;
54 u8 *intc_irq_prios;
55 unsigned long intc_irq_num;
56 struct davinci_timer_info *timer_info;
57 void __iomem *gpio_base;
58 unsigned gpio_num;
59 unsigned gpio_irq;
60 unsigned gpio_unbanked;
61 struct platform_device *serial_dev;
62 struct emac_platform_data *emac_pdata;
63 dma_addr_t sram_dma;
64 unsigned sram_len;
67 extern struct davinci_soc_info davinci_soc_info;
69 extern void davinci_common_init(struct davinci_soc_info *soc_info);
71 /* standard place to map on-chip SRAMs; they *may* support DMA */
72 #define SRAM_VIRT 0xfffe0000
73 #define SRAM_SIZE SZ_128K
75 #endif /* __ARCH_ARM_MACH_DAVINCI_COMMON_H */