2 * Table of the DAVINCI register configurations for the PINMUX combinations
4 * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com>
6 * Based on linux/include/asm-arm/arch-omap/mux.h:
7 * Copyright (C) 2003 - 2005 Nokia Corporation
9 * Written by Tony Lindgren
11 * 2007 (c) MontaVista Software, Inc. This file is licensed under
12 * the terms of the GNU General Public License version 2. This program
13 * is licensed "as is" without any warranty of any kind, whether express
16 * Copyright (C) 2008 Texas Instruments.
19 #ifndef __INC_MACH_MUX_H
20 #define __INC_MACH_MUX_H
24 const char *mux_reg_name
;
25 const unsigned char mux_reg
;
26 const unsigned char mask_offset
;
27 const unsigned char mask
;
28 const unsigned char mode
;
32 enum davinci_dm644x_index
{
33 /* ATA and HDDIR functions */
78 /* EMAC and MDIO function */
81 /* GPIO3V[0:16] pins */
98 enum davinci_dm646x_index
{
110 DM646X_STSOMUX_DISABLE
,
111 DM646X_STSIMUX_DISABLE
,
112 DM646X_PTSOMUX_DISABLE
,
113 DM646X_PTSIMUX_DISABLE
,
118 DM646X_PTSOMUX_PARALLEL
,
119 DM646X_PTSIMUX_PARALLEL
,
120 DM646X_PTSOMUX_SERIAL
,
121 DM646X_PTSIMUX_SERIAL
,
124 enum davinci_dm355_index
{
155 DM355_INT_EDMA_TC0_ERR
,
156 DM355_INT_EDMA_TC1_ERR
,
158 /* EDMA event muxing */
165 DM355_VOUT_FIELD_G70
,
170 /* Video In Pin Mux */
180 enum davinci_dm365_index
{
297 DM365_VOUT_FIELD_G81
,
309 DM365_INT_EDMA_TC0_ERR
,
310 DM365_INT_EDMA_TC1_ERR
,
311 DM365_INT_EDMA_TC2_ERR
,
312 DM365_INT_EDMA_TC3_ERR
,
314 DM365_INT_EMAC_RXTHRESH
,
315 DM365_INT_EMAC_RXPULSE
,
316 DM365_INT_EMAC_TXPULSE
,
317 DM365_INT_EMAC_MISCPULSE
,
318 DM365_INT_IMX0_ENABLE
,
319 DM365_INT_IMX0_DISABLE
,
320 DM365_INT_HDVICP_ENABLE
,
321 DM365_INT_HDVICP_DISABLE
,
322 DM365_INT_IMX1_ENABLE
,
323 DM365_INT_IMX1_DISABLE
,
324 DM365_INT_NSF_ENABLE
,
325 DM365_INT_NSF_DISABLE
,
327 /* EDMA event muxing */
483 DA830_RMII_MHZ_50_CLK
,
690 DA830_NLCD_AC_ENB_CS
,
739 enum davinci_da850_index
{
791 DA850_RMII_MHZ_50_CLK
,
838 DA850_NLCD_AC_ENB_CS
,
840 /* MMC/SD0 function */
848 /* EMIF2.5/EMIFA function */
907 #ifdef CONFIG_DAVINCI_MUX
908 /* setup pin muxing */
909 extern int davinci_cfg_reg(unsigned long reg_cfg
);
911 /* boot loader does it all (no warnings from CONFIG_DAVINCI_MUX_WARNINGS) */
912 static inline int davinci_cfg_reg(unsigned long reg_cfg
) { return 0; }
915 #endif /* __INC_MACH_MUX_H */