arch/arm/plat-omap/i2c.c

   1 /*
   2  * linux/arch/arm/plat-omap/i2c.c
   3  *
   4  * Helper module for board specific I2C bus registration
   5  *
   6  * Copyright (C) 2007 Nokia Corporation.
   7  *
   8  * Contact: Jarkko Nikula <jhnikula@gmail.com>
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License
  12  * version 2 as published by the Free Software Foundation.
  13  *
  14  * This program is distributed in the hope that it will be useful, but
  15  * WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  17  * General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  22  * 02110-1301 USA
  23  *
  24  */
  25
  26 #include <linux/kernel.h>
  27 #include <linux/platform_device.h>
  28 #include <linux/i2c.h>
  29 #include <mach/irqs.h>
  30 #include <plat/mux.h>
  31 #include <plat/i2c.h>
  32
  33 #define OMAP_I2C_SIZE           0x3f
  34 #define OMAP1_I2C_BASE          0xfffb3800
  35 #define OMAP2_I2C_BASE1         0x48070000
  36 #define OMAP2_I2C_BASE2         0x48072000
  37 #define OMAP2_I2C_BASE3         0x48060000
  38
  39 static const char name[] = "i2c_omap";
  40
  41 #define I2C_RESOURCE_BUILDER(base, irq)                 \
  42         {                                               \
  43                 .start  = (base),                       \
  44                 .end    = (base) + OMAP_I2C_SIZE,       \
  45                 .flags  = IORESOURCE_MEM,               \
  46         },                                              \
  47         {                                               \
  48                 .start  = (irq),                        \
  49                 .flags  = IORESOURCE_IRQ,               \
  50         },
  51
  52 static struct resource i2c_resources[][2] = {
  53         { I2C_RESOURCE_BUILDER(0, 0) },
  54 #if     defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
  55         { I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE2, INT_24XX_I2C2_IRQ) },
  56 #endif
  57 #if     defined(CONFIG_ARCH_OMAP3)
  58         { I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE3, INT_34XX_I2C3_IRQ) },
  59 #endif
  60 };
  61
  62 #define I2C_DEV_BUILDER(bus_id, res, data)              \
  63         {                                               \
  64                 .id     = (bus_id),                     \
  65                 .name   = name,                         \
  66                 .num_resources  = ARRAY_SIZE(res),      \
  67                 .resource       = (res),                \
  68                 .dev            = {                     \
  69                         .platform_data  = (data),       \
  70                 },                                      \
  71         }
  72
  73 static u32 i2c_rate[ARRAY_SIZE(i2c_resources)];
  74 static struct platform_device omap_i2c_devices[] = {
  75         I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_rate[0]),
  76 #if     defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
  77         I2C_DEV_BUILDER(2, i2c_resources[1], &i2c_rate[1]),
  78 #endif
  79 #if     defined(CONFIG_ARCH_OMAP3)
  80         I2C_DEV_BUILDER(3, i2c_resources[2], &i2c_rate[2]),
  81 #endif
  82 };
  83
  84 #define OMAP_I2C_CMDLINE_SETUP  (BIT(31))
  85
  86 static int __init omap_i2c_nr_ports(void)
  87 {
  88         int ports = 0;
  89
  90         if (cpu_class_is_omap1())
  91                 ports = 1;
  92         else if (cpu_is_omap24xx())
  93                 ports = 2;
  94         else if (cpu_is_omap34xx())
  95                 ports = 3;
  96
  97         return ports;
  98 }
  99
 100 static int __init omap_i2c_add_bus(int bus_id)
 101 {
 102         struct platform_device *pdev;
 103         struct resource *res;
 104         resource_size_t base, irq;
 105
 106         pdev = &omap_i2c_devices[bus_id - 1];
 107         if (bus_id == 1) {
 108                 res = pdev->resource;
 109                 if (cpu_class_is_omap1()) {
 110                         base = OMAP1_I2C_BASE;
 111                         irq = INT_I2C;
 112                 } else {
 113                         base = OMAP2_I2C_BASE1;
 114                         irq = INT_24XX_I2C1_IRQ;
 115                 }
 116                 res[0].start = base;
 117                 res[0].end = base + OMAP_I2C_SIZE;
 118                 res[1].start = irq;
 119         }
 120
 121         if (cpu_class_is_omap1())
 122                 omap1_i2c_mux_pins(bus_id);
 123         if (cpu_class_is_omap2())
 124                 omap2_i2c_mux_pins(bus_id);
 125
 126         return platform_device_register(pdev);
 127 }
 128
 129 /**
 130  * omap_i2c_bus_setup - Process command line options for the I2C bus speed
 131  * @str: String of options
 132  *
 133  * This function allow to override the default I2C bus speed for given I2C
 134  * bus with a command line option.
 135  *
 136  * Format: i2c_bus=bus_id,clkrate (in kHz)
 137  *
 138  * Returns 1 on success, 0 otherwise.
 139  */
 140 static int __init omap_i2c_bus_setup(char *str)
 141 {
 142         int ports;
 143         int ints[3];
 144
 145         ports = omap_i2c_nr_ports();
 146         get_options(str, 3, ints);
 147         if (ints[0] < 2 || ints[1] < 1 || ints[1] > ports)
 148                 return 0;
 149         i2c_rate[ints[1] - 1] = ints[2];
 150         i2c_rate[ints[1] - 1] |= OMAP_I2C_CMDLINE_SETUP;
 151
 152         return 1;
 153 }
 154 __setup("i2c_bus=", omap_i2c_bus_setup);
 155
 156 /*
 157  * Register busses defined in command line but that are not registered with
 158  * omap_register_i2c_bus from board initialization code.
 159  */
 160 static int __init omap_register_i2c_bus_cmdline(void)
 161 {
 162         int i, err = 0;
 163
 164         for (i = 0; i < ARRAY_SIZE(i2c_rate); i++)
 165                 if (i2c_rate[i] & OMAP_I2C_CMDLINE_SETUP) {
 166                         i2c_rate[i] &= ~OMAP_I2C_CMDLINE_SETUP;
 167                         err = omap_i2c_add_bus(i + 1);
 168                         if (err)
 169                                 goto out;
 170                 }
 171
 172 out:
 173         return err;
 174 }
 175 subsys_initcall(omap_register_i2c_bus_cmdline);
 176
 177 /**
 178  * omap_register_i2c_bus - register I2C bus with device descriptors
 179  * @bus_id: bus id counting from number 1
 180  * @clkrate: clock rate of the bus in kHz
 181  * @info: pointer into I2C device descriptor table or NULL
 182  * @len: number of descriptors in the table
 183  *
 184  * Returns 0 on success or an error code.
 185  */
 186 int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
 187                           struct i2c_board_info const *info,
 188                           unsigned len)
 189 {
 190         int err;
 191
 192         BUG_ON(bus_id < 1 || bus_id > omap_i2c_nr_ports());
 193
 194         if (info) {
 195                 err = i2c_register_board_info(bus_id, info, len);
 196                 if (err)
 197                         return err;
 198         }
 199
 200         if (!i2c_rate[bus_id - 1])
 201                 i2c_rate[bus_id - 1] = clkrate;
 202         i2c_rate[bus_id - 1] &= ~OMAP_I2C_CMDLINE_SETUP;
 203
 204         return omap_i2c_add_bus(bus_id);
 205 }