arch/arm/plat-omap/include/plat/gpio.h

   1 /*
   2  * arch/arm/plat-omap/include/mach/gpio.h
   3  *
   4  * OMAP GPIO handling defines and functions
   5  *
   6  * Copyright (C) 2003-2005 Nokia Corporation
   7  *
   8  * Written by Juha Yrjölä <juha.yrjola@nokia.com>
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License, or
  13  * (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  23  *
  24  */
  25
  26 #ifndef __ASM_ARCH_OMAP_GPIO_H
  27 #define __ASM_ARCH_OMAP_GPIO_H
  28
  29 #include <linux/io.h>
  30 #include <mach/irqs.h>
  31
  32 #define OMAP1_MPUIO_BASE                        0xfffb5000
  33
  34 #if (defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850))
  35
  36 #define OMAP_MPUIO_INPUT_LATCH          0x00
  37 #define OMAP_MPUIO_OUTPUT               0x02
  38 #define OMAP_MPUIO_IO_CNTL              0x04
  39 #define OMAP_MPUIO_KBR_LATCH            0x08
  40 #define OMAP_MPUIO_KBC                  0x0a
  41 #define OMAP_MPUIO_GPIO_EVENT_MODE      0x0c
  42 #define OMAP_MPUIO_GPIO_INT_EDGE        0x0e
  43 #define OMAP_MPUIO_KBD_INT              0x10
  44 #define OMAP_MPUIO_GPIO_INT             0x12
  45 #define OMAP_MPUIO_KBD_MASKIT           0x14
  46 #define OMAP_MPUIO_GPIO_MASKIT          0x16
  47 #define OMAP_MPUIO_GPIO_DEBOUNCING      0x18
  48 #define OMAP_MPUIO_LATCH                0x1a
  49 #else
  50 #define OMAP_MPUIO_INPUT_LATCH          0x00
  51 #define OMAP_MPUIO_OUTPUT               0x04
  52 #define OMAP_MPUIO_IO_CNTL              0x08
  53 #define OMAP_MPUIO_KBR_LATCH            0x10
  54 #define OMAP_MPUIO_KBC                  0x14
  55 #define OMAP_MPUIO_GPIO_EVENT_MODE      0x18
  56 #define OMAP_MPUIO_GPIO_INT_EDGE        0x1c
  57 #define OMAP_MPUIO_KBD_INT              0x20
  58 #define OMAP_MPUIO_GPIO_INT             0x24
  59 #define OMAP_MPUIO_KBD_MASKIT           0x28
  60 #define OMAP_MPUIO_GPIO_MASKIT          0x2c
  61 #define OMAP_MPUIO_GPIO_DEBOUNCING      0x30
  62 #define OMAP_MPUIO_LATCH                0x34
  63 #endif
  64
  65 #define OMAP34XX_NR_GPIOS               6
  66
  67 #define OMAP_MPUIO(nr)          (OMAP_MAX_GPIO_LINES + (nr))
  68 #define OMAP_GPIO_IS_MPUIO(nr)  ((nr) >= OMAP_MAX_GPIO_LINES)
  69
  70 #define OMAP_GPIO_IRQ(nr)       (OMAP_GPIO_IS_MPUIO(nr) ? \
  71                                  IH_MPUIO_BASE + ((nr) & 0x0f) : \
  72                                  IH_GPIO_BASE + (nr))
  73
  74 extern int omap_gpio_init(void);        /* Call from board init only */
  75 extern void omap2_gpio_prepare_for_retention(void);
  76 extern void omap2_gpio_resume_after_retention(void);
  77 extern void omap_set_gpio_debounce(int gpio, int enable);
  78 extern void omap_set_gpio_debounce_time(int gpio, int enable);
  79 extern void omap_gpio_save_context(void);
  80 extern void omap_gpio_restore_context(void);
  81 /*-------------------------------------------------------------------------*/
  82
  83 /* Wrappers for "new style" GPIO calls, using the new infrastructure
  84  * which lets us plug in FPGA, I2C, and other implementations.
  85  * *
  86  * The original OMAP-specfic calls should eventually be removed.
  87  */
  88
  89 #include <linux/errno.h>
  90 #include <asm-generic/gpio.h>
  91
  92 static inline int gpio_get_value(unsigned gpio)
  93 {
  94         return __gpio_get_value(gpio);
  95 }
  96
  97 static inline void gpio_set_value(unsigned gpio, int value)
  98 {
  99         __gpio_set_value(gpio, value);
 100 }
 101
 102 static inline int gpio_cansleep(unsigned gpio)
 103 {
 104         return __gpio_cansleep(gpio);
 105 }
 106
 107 static inline int gpio_to_irq(unsigned gpio)
 108 {
 109         return __gpio_to_irq(gpio);
 110 }
 111
 112 static inline int irq_to_gpio(unsigned irq)
 113 {
 114         int tmp;
 115
 116         /* omap1 SOC mpuio */
 117         if (cpu_class_is_omap1() && (irq < (IH_MPUIO_BASE + 16)))
 118                 return (irq - IH_MPUIO_BASE) + OMAP_MAX_GPIO_LINES;
 119
 120         /* SOC gpio */
 121         tmp = irq - IH_GPIO_BASE;
 122         if (tmp < OMAP_MAX_GPIO_LINES)
 123                 return tmp;
 124
 125         /* we don't supply reverse mappings for non-SOC gpios */
 126         return -EIO;
 127 }
 128
 129 #endif