arch/arm/plat-omap/include/plat/mux.h

   1 /*
   2  * arch/arm/plat-omap/include/mach/mux.h
   3  *
   4  * Table of the Omap register configurations for the FUNC_MUX and
   5  * PULL_DWN combinations.
   6  *
   7  * Copyright (C) 2004 - 2008 Texas Instruments Inc.
   8  * Copyright (C) 2003 - 2008 Nokia Corporation
   9  *
  10  * Written by Tony Lindgren
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License as published by
  14  * the Free Software Foundation; either version 2 of the License, or
  15  * (at your option) any later version.
  16  *
  17  * This program is distributed in the hope that it will be useful,
  18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20  * GNU General Public License for more details.
  21  *
  22  * You should have received a copy of the GNU General Public License
  23  * along with this program; if not, write to the Free Software
  24  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25  *
  26  * NOTE: Please use the following naming style for new pin entries.
  27  *       For example, W8_1610_MMC2_DAT0, where:
  28  *       - W8        = ball
  29  *       - 1610      = 1510 or 1610, none if common for both 1510 and 1610
  30  *       - MMC2_DAT0 = function
  31  */
  32
  33 #ifndef __ASM_ARCH_MUX_H
  34 #define __ASM_ARCH_MUX_H
  35
  36 #define PU_PD_SEL_NA            0       /* No pu_pd reg available */
  37 #define PULL_DWN_CTRL_NA        0       /* No pull-down control needed */
  38
  39 #ifdef  CONFIG_OMAP_MUX_DEBUG
  40 #define MUX_REG(reg, mode_offset, mode) .mux_reg_name = "FUNC_MUX_CTRL_"#reg, \
  41                                         .mux_reg = FUNC_MUX_CTRL_##reg, \
  42                                         .mask_offset = mode_offset, \
  43                                         .mask = mode,
  44
  45 #define PULL_REG(reg, bit, status)      .pull_name = "PULL_DWN_CTRL_"#reg, \
  46                                         .pull_reg = PULL_DWN_CTRL_##reg, \
  47                                         .pull_bit = bit, \
  48                                         .pull_val = status,
  49
  50 #define PU_PD_REG(reg, status)          .pu_pd_name = "PU_PD_SEL_"#reg, \
  51                                         .pu_pd_reg = PU_PD_SEL_##reg, \
  52                                         .pu_pd_val = status,
  53
  54 #define MUX_REG_7XX(reg, mode_offset, mode) .mux_reg_name = "OMAP7XX_IO_CONF_"#reg, \
  55                                         .mux_reg = OMAP7XX_IO_CONF_##reg, \
  56                                         .mask_offset = mode_offset, \
  57                                         .mask = mode,
  58
  59 #define PULL_REG_7XX(reg, bit, status)  .pull_name = "OMAP7XX_IO_CONF_"#reg, \
  60                                         .pull_reg = OMAP7XX_IO_CONF_##reg, \
  61                                         .pull_bit = bit, \
  62                                         .pull_val = status,
  63
  64 #else
  65
  66 #define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, \
  67                                         .mask_offset = mode_offset, \
  68                                         .mask = mode,
  69
  70 #define PULL_REG(reg, bit, status)      .pull_reg = PULL_DWN_CTRL_##reg, \
  71                                         .pull_bit = bit, \
  72                                         .pull_val = status,
  73
  74 #define PU_PD_REG(reg, status)          .pu_pd_reg = PU_PD_SEL_##reg, \
  75                                         .pu_pd_val = status,
  76
  77 #define MUX_REG_7XX(reg, mode_offset, mode) \
  78                                         .mux_reg = OMAP7XX_IO_CONF_##reg, \
  79                                         .mask_offset = mode_offset, \
  80                                         .mask = mode,
  81
  82 #define PULL_REG_7XX(reg, bit, status)  .pull_reg = OMAP7XX_IO_CONF_##reg, \
  83                                         .pull_bit = bit, \
  84                                         .pull_val = status,
  85
  86 #endif /* CONFIG_OMAP_MUX_DEBUG */
  87
  88 #define MUX_CFG(desc, mux_reg, mode_offset, mode,       \
  89                 pull_reg, pull_bit, pull_status,        \
  90                 pu_pd_reg, pu_pd_status, debug_status)  \
  91 {                                                       \
  92         .name =  desc,                                  \
  93         .debug = debug_status,                          \
  94         MUX_REG(mux_reg, mode_offset, mode)             \
  95         PULL_REG(pull_reg, pull_bit, pull_status)       \
  96         PU_PD_REG(pu_pd_reg, pu_pd_status)              \
  97 },
  98
  99
 100 /*
 101  * OMAP730/850 has a slightly different config for the pin mux.
 102  * - config regs are the OMAP7XX_IO_CONF_x regs (see omap730.h) regs and
 103  *   not the FUNC_MUX_CTRL_x regs from hardware.h
 104  * - for pull-up/down, only has one enable bit which is is in the same register
 105  *   as mux config
 106  */
 107 #define MUX_CFG_7XX(desc, mux_reg, mode_offset, mode,   \
 108                    pull_bit, pull_status, debug_status)\
 109 {                                                       \
 110         .name =  desc,                                  \
 111         .debug = debug_status,                          \
 112         MUX_REG_7XX(mux_reg, mode_offset, mode)         \
 113         PULL_REG_7XX(mux_reg, pull_bit, pull_status)    \
 114         PU_PD_REG(NA, 0)                \
 115 },
 116
 117 #define MUX_CFG_24XX(desc, reg_offset, mode,                    \
 118                                 pull_en, pull_mode, dbg)        \
 119 {                                                               \
 120         .name           = desc,                                 \
 121         .debug          = dbg,                                  \
 122         .mux_reg        = reg_offset,                           \
 123         .mask           = mode,                                 \
 124         .pull_val       = pull_en,                              \
 125         .pu_pd_val      = pull_mode,                            \
 126 },
 127
 128 /* 24xx/34xx mux bit defines */
 129 #define OMAP2_PULL_ENA          (1 << 3)
 130 #define OMAP2_PULL_UP           (1 << 4)
 131 #define OMAP2_ALTELECTRICALSEL  (1 << 5)
 132
 133 struct pin_config {
 134         char                    *name;
 135         const unsigned int      mux_reg;
 136         unsigned char           debug;
 137
 138 #if     defined(CONFIG_ARCH_OMAP1) || defined(CONFIG_ARCH_OMAP2)
 139         const unsigned char mask_offset;
 140         const unsigned char mask;
 141
 142         const char *pull_name;
 143         const unsigned int pull_reg;
 144         const unsigned char pull_val;
 145         const unsigned char pull_bit;
 146
 147         const char *pu_pd_name;
 148         const unsigned int pu_pd_reg;
 149         const unsigned char pu_pd_val;
 150 #endif
 151
 152 #if     defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS)
 153         const char *mux_reg_name;
 154 #endif
 155
 156 };
 157
 158 enum omap7xx_index {
 159         /* OMAP 730 keyboard */
 160         E2_7XX_KBR0,
 161         J7_7XX_KBR1,
 162         E1_7XX_KBR2,
 163         F3_7XX_KBR3,
 164         D2_7XX_KBR4,
 165         C2_7XX_KBC0,
 166         D3_7XX_KBC1,
 167         E4_7XX_KBC2,
 168         F4_7XX_KBC3,
 169         E3_7XX_KBC4,
 170
 171         /* USB */
 172         AA17_7XX_USB_DM,
 173         W16_7XX_USB_PU_EN,
 174         W17_7XX_USB_VBUSI,
 175         W18_7XX_USB_DMCK_OUT,
 176         W19_7XX_USB_DCRST,
 177
 178         /* MMC */
 179         MMC_7XX_CMD,
 180         MMC_7XX_CLK,
 181         MMC_7XX_DAT0,
 182
 183         /* I2C */
 184         I2C_7XX_SCL,
 185         I2C_7XX_SDA,
 186
 187         /* SPI */
 188         SPI_7XX_1,
 189         SPI_7XX_2,
 190         SPI_7XX_3,
 191         SPI_7XX_4,
 192         SPI_7XX_5,
 193         SPI_7XX_6,
 194 };
 195
 196 enum omap1xxx_index {
 197         /* UART1 (BT_UART_GATING)*/
 198         UART1_TX = 0,
 199         UART1_RTS,
 200
 201         /* UART2 (COM_UART_GATING)*/
 202         UART2_TX,
 203         UART2_RX,
 204         UART2_CTS,
 205         UART2_RTS,
 206
 207         /* UART3 (GIGA_UART_GATING) */
 208         UART3_TX,
 209         UART3_RX,
 210         UART3_CTS,
 211         UART3_RTS,
 212         UART3_CLKREQ,
 213         UART3_BCLK,     /* 12MHz clock out */
 214         Y15_1610_UART3_RTS,
 215
 216         /* PWT & PWL */
 217         PWT,
 218         PWL,
 219
 220         /* USB master generic */
 221         R18_USB_VBUS,
 222         R18_1510_USB_GPIO0,
 223         W4_USB_PUEN,
 224         W4_USB_CLKO,
 225         W4_USB_HIGHZ,
 226         W4_GPIO58,
 227
 228         /* USB1 master */
 229         USB1_SUSP,
 230         USB1_SEO,
 231         W13_1610_USB1_SE0,
 232         USB1_TXEN,
 233         USB1_TXD,
 234         USB1_VP,
 235         USB1_VM,
 236         USB1_RCV,
 237         USB1_SPEED,
 238         R13_1610_USB1_SPEED,
 239         R13_1710_USB1_SE0,
 240
 241         /* USB2 master */
 242         USB2_SUSP,
 243         USB2_VP,
 244         USB2_TXEN,
 245         USB2_VM,
 246         USB2_RCV,
 247         USB2_SEO,
 248         USB2_TXD,
 249
 250         /* OMAP-1510 GPIO */
 251         R18_1510_GPIO0,
 252         R19_1510_GPIO1,
 253         M14_1510_GPIO2,
 254
 255         /* OMAP1610 GPIO */
 256         P18_1610_GPIO3,
 257         Y15_1610_GPIO17,
 258
 259         /* OMAP-1710 GPIO */
 260         R18_1710_GPIO0,
 261         V2_1710_GPIO10,
 262         N21_1710_GPIO14,
 263         W15_1710_GPIO40,
 264
 265         /* MPUIO */
 266         MPUIO2,
 267         N15_1610_MPUIO2,
 268         MPUIO4,
 269         MPUIO5,
 270         T20_1610_MPUIO5,
 271         W11_1610_MPUIO6,
 272         V10_1610_MPUIO7,
 273         W11_1610_MPUIO9,
 274         V10_1610_MPUIO10,
 275         W10_1610_MPUIO11,
 276         E20_1610_MPUIO13,
 277         U20_1610_MPUIO14,
 278         E19_1610_MPUIO15,
 279
 280         /* MCBSP2 */
 281         MCBSP2_CLKR,
 282         MCBSP2_CLKX,
 283         MCBSP2_DR,
 284         MCBSP2_DX,
 285         MCBSP2_FSR,
 286         MCBSP2_FSX,
 287
 288         /* MCBSP3 */
 289         MCBSP3_CLKX,
 290
 291         /* Misc ballouts */
 292         BALLOUT_V8_ARMIO3,
 293         N20_HDQ,
 294
 295         /* OMAP-1610 MMC2 */
 296         W8_1610_MMC2_DAT0,
 297         V8_1610_MMC2_DAT1,
 298         W15_1610_MMC2_DAT2,
 299         R10_1610_MMC2_DAT3,
 300         Y10_1610_MMC2_CLK,
 301         Y8_1610_MMC2_CMD,
 302         V9_1610_MMC2_CMDDIR,
 303         V5_1610_MMC2_DATDIR0,
 304         W19_1610_MMC2_DATDIR1,
 305         R18_1610_MMC2_CLKIN,
 306
 307         /* OMAP-1610 External Trace Interface */
 308         M19_1610_ETM_PSTAT0,
 309         L15_1610_ETM_PSTAT1,
 310         L18_1610_ETM_PSTAT2,
 311         L19_1610_ETM_D0,
 312         J19_1610_ETM_D6,
 313         J18_1610_ETM_D7,
 314
 315         /* OMAP16XX GPIO */
 316         P20_1610_GPIO4,
 317         V9_1610_GPIO7,
 318         W8_1610_GPIO9,
 319         N20_1610_GPIO11,
 320         N19_1610_GPIO13,
 321         P10_1610_GPIO22,
 322         V5_1610_GPIO24,
 323         AA20_1610_GPIO_41,
 324         W19_1610_GPIO48,
 325         M7_1610_GPIO62,
 326         V14_16XX_GPIO37,
 327         R9_16XX_GPIO18,
 328         L14_16XX_GPIO49,
 329
 330         /* OMAP-1610 uWire */
 331         V19_1610_UWIRE_SCLK,
 332         U18_1610_UWIRE_SDI,
 333         W21_1610_UWIRE_SDO,
 334         N14_1610_UWIRE_CS0,
 335         P15_1610_UWIRE_CS3,
 336         N15_1610_UWIRE_CS1,
 337
 338         /* OMAP-1610 SPI */
 339         U19_1610_SPIF_SCK,
 340         U18_1610_SPIF_DIN,
 341         P20_1610_SPIF_DIN,
 342         W21_1610_SPIF_DOUT,
 343         R18_1610_SPIF_DOUT,
 344         N14_1610_SPIF_CS0,
 345         N15_1610_SPIF_CS1,
 346         T19_1610_SPIF_CS2,
 347         P15_1610_SPIF_CS3,
 348
 349         /* OMAP-1610 Flash */
 350         L3_1610_FLASH_CS2B_OE,
 351         M8_1610_FLASH_CS2B_WE,
 352
 353         /* First MMC */
 354         MMC_CMD,
 355         MMC_DAT1,
 356         MMC_DAT2,
 357         MMC_DAT0,
 358         MMC_CLK,
 359         MMC_DAT3,
 360
 361         /* OMAP-1710 MMC CMDDIR and DATDIR0 */
 362         M15_1710_MMC_CLKI,
 363         P19_1710_MMC_CMDDIR,
 364         P20_1710_MMC_DATDIR0,
 365
 366         /* OMAP-1610 USB0 alternate pin configuration */
 367         W9_USB0_TXEN,
 368         AA9_USB0_VP,
 369         Y5_USB0_RCV,
 370         R9_USB0_VM,
 371         V6_USB0_TXD,
 372         W5_USB0_SE0,
 373         V9_USB0_SPEED,
 374         V9_USB0_SUSP,
 375
 376         /* USB2 */
 377         W9_USB2_TXEN,
 378         AA9_USB2_VP,
 379         Y5_USB2_RCV,
 380         R9_USB2_VM,
 381         V6_USB2_TXD,
 382         W5_USB2_SE0,
 383
 384         /* 16XX UART */
 385         R13_1610_UART1_TX,
 386         V14_16XX_UART1_RX,
 387         R14_1610_UART1_CTS,
 388         AA15_1610_UART1_RTS,
 389         R9_16XX_UART2_RX,
 390         L14_16XX_UART3_RX,
 391
 392         /* I2C OMAP-1610 */
 393         I2C_SCL,
 394         I2C_SDA,
 395
 396         /* Keypad */
 397         F18_1610_KBC0,
 398         D20_1610_KBC1,
 399         D19_1610_KBC2,
 400         E18_1610_KBC3,
 401         C21_1610_KBC4,
 402         G18_1610_KBR0,
 403         F19_1610_KBR1,
 404         H14_1610_KBR2,
 405         E20_1610_KBR3,
 406         E19_1610_KBR4,
 407         N19_1610_KBR5,
 408
 409         /* Power management */
 410         T20_1610_LOW_PWR,
 411
 412         /* MCLK Settings */
 413         V5_1710_MCLK_ON,
 414         V5_1710_MCLK_OFF,
 415         R10_1610_MCLK_ON,
 416         R10_1610_MCLK_OFF,
 417
 418         /* CompactFlash controller */
 419         P11_1610_CF_CD2,
 420         R11_1610_CF_IOIS16,
 421         V10_1610_CF_IREQ,
 422         W10_1610_CF_RESET,
 423         W11_1610_CF_CD1,
 424
 425         /* parallel camera */
 426         J15_1610_CAM_LCLK,
 427         J18_1610_CAM_D7,
 428         J19_1610_CAM_D6,
 429         J14_1610_CAM_D5,
 430         K18_1610_CAM_D4,
 431         K19_1610_CAM_D3,
 432         K15_1610_CAM_D2,
 433         K14_1610_CAM_D1,
 434         L19_1610_CAM_D0,
 435         L18_1610_CAM_VS,
 436         L15_1610_CAM_HS,
 437         M19_1610_CAM_RSTZ,
 438         Y15_1610_CAM_OUTCLK,
 439
 440         /* serial camera */
 441         H19_1610_CAM_EXCLK,
 442         Y12_1610_CCP_CLKP,
 443         W13_1610_CCP_CLKM,
 444         W14_1610_CCP_DATAP,
 445         Y14_1610_CCP_DATAM,
 446
 447 };
 448
 449 enum omap24xx_index {
 450         /* 24xx I2C */
 451         M19_24XX_I2C1_SCL,
 452         L15_24XX_I2C1_SDA,
 453         J15_24XX_I2C2_SCL,
 454         H19_24XX_I2C2_SDA,
 455
 456         /* 24xx Menelaus interrupt */
 457         W19_24XX_SYS_NIRQ,
 458
 459         /* 24xx clock */
 460         W14_24XX_SYS_CLKOUT,
 461
 462         /* 24xx GPMC chipselects, wait pin monitoring */
 463         E2_GPMC_NCS2,
 464         L2_GPMC_NCS7,
 465         L3_GPMC_WAIT0,
 466         N7_GPMC_WAIT1,
 467         M1_GPMC_WAIT2,
 468         P1_GPMC_WAIT3,
 469
 470         /* 242X McBSP */
 471         Y15_24XX_MCBSP2_CLKX,
 472         R14_24XX_MCBSP2_FSX,
 473         W15_24XX_MCBSP2_DR,
 474         V15_24XX_MCBSP2_DX,
 475
 476         /* 24xx GPIO */
 477         M21_242X_GPIO11,
 478         P21_242X_GPIO12,
 479         AA10_242X_GPIO13,
 480         AA6_242X_GPIO14,
 481         AA4_242X_GPIO15,
 482         Y11_242X_GPIO16,
 483         AA12_242X_GPIO17,
 484         AA8_242X_GPIO58,
 485         Y20_24XX_GPIO60,
 486         W4__24XX_GPIO74,
 487         N15_24XX_GPIO85,
 488         M15_24XX_GPIO92,
 489         P20_24XX_GPIO93,
 490         P18_24XX_GPIO95,
 491         M18_24XX_GPIO96,
 492         L14_24XX_GPIO97,
 493         J15_24XX_GPIO99,
 494         V14_24XX_GPIO117,
 495         P14_24XX_GPIO125,
 496
 497         /* 242x DBG GPIO */
 498         V4_242X_GPIO49,
 499         W2_242X_GPIO50,
 500         U4_242X_GPIO51,
 501         V3_242X_GPIO52,
 502         V2_242X_GPIO53,
 503         V6_242X_GPIO53,
 504         T4_242X_GPIO54,
 505         Y4_242X_GPIO54,
 506         T3_242X_GPIO55,
 507         U2_242X_GPIO56,
 508
 509         /* 24xx external DMA requests */
 510         AA10_242X_DMAREQ0,
 511         AA6_242X_DMAREQ1,
 512         E4_242X_DMAREQ2,
 513         G4_242X_DMAREQ3,
 514         D3_242X_DMAREQ4,
 515         E3_242X_DMAREQ5,
 516
 517         /* UART3 */
 518         K15_24XX_UART3_TX,
 519         K14_24XX_UART3_RX,
 520
 521         /* MMC/SDIO */
 522         G19_24XX_MMC_CLKO,
 523         H18_24XX_MMC_CMD,
 524         F20_24XX_MMC_DAT0,
 525         H14_24XX_MMC_DAT1,
 526         E19_24XX_MMC_DAT2,
 527         D19_24XX_MMC_DAT3,
 528         F19_24XX_MMC_DAT_DIR0,
 529         E20_24XX_MMC_DAT_DIR1,
 530         F18_24XX_MMC_DAT_DIR2,
 531         E18_24XX_MMC_DAT_DIR3,
 532         G18_24XX_MMC_CMD_DIR,
 533         H15_24XX_MMC_CLKI,
 534
 535         /* Full speed USB */
 536         J20_24XX_USB0_PUEN,
 537         J19_24XX_USB0_VP,
 538         K20_24XX_USB0_VM,
 539         J18_24XX_USB0_RCV,
 540         K19_24XX_USB0_TXEN,
 541         J14_24XX_USB0_SE0,
 542         K18_24XX_USB0_DAT,
 543
 544         N14_24XX_USB1_SE0,
 545         W12_24XX_USB1_SE0,
 546         P15_24XX_USB1_DAT,
 547         R13_24XX_USB1_DAT,
 548         W20_24XX_USB1_TXEN,
 549         P13_24XX_USB1_TXEN,
 550         V19_24XX_USB1_RCV,
 551         V12_24XX_USB1_RCV,
 552
 553         AA10_24XX_USB2_SE0,
 554         Y11_24XX_USB2_DAT,
 555         AA12_24XX_USB2_TXEN,
 556         AA6_24XX_USB2_RCV,
 557         AA4_24XX_USB2_TLLSE0,
 558
 559         /* Keypad GPIO*/
 560         T19_24XX_KBR0,
 561         R19_24XX_KBR1,
 562         V18_24XX_KBR2,
 563         M21_24XX_KBR3,
 564         E5__24XX_KBR4,
 565         M18_24XX_KBR5,
 566         R20_24XX_KBC0,
 567         M14_24XX_KBC1,
 568         H19_24XX_KBC2,
 569         V17_24XX_KBC3,
 570         P21_24XX_KBC4,
 571         L14_24XX_KBC5,
 572         N19_24XX_KBC6,
 573
 574         /* 24xx Menelaus Keypad GPIO */
 575         B3__24XX_KBR5,
 576         AA4_24XX_KBC2,
 577         B13_24XX_KBC6,
 578
 579         /* 2430 USB */
 580         AD9_2430_USB0_PUEN,
 581         Y11_2430_USB0_VP,
 582         AD7_2430_USB0_VM,
 583         AE7_2430_USB0_RCV,
 584         AD4_2430_USB0_TXEN,
 585         AF9_2430_USB0_SE0,
 586         AE6_2430_USB0_DAT,
 587         AD24_2430_USB1_SE0,
 588         AB24_2430_USB1_RCV,
 589         Y25_2430_USB1_TXEN,
 590         AA26_2430_USB1_DAT,
 591
 592         /* 2430 HS-USB */
 593         AD9_2430_USB0HS_DATA3,
 594         Y11_2430_USB0HS_DATA4,
 595         AD7_2430_USB0HS_DATA5,
 596         AE7_2430_USB0HS_DATA6,
 597         AD4_2430_USB0HS_DATA2,
 598         AF9_2430_USB0HS_DATA0,
 599         AE6_2430_USB0HS_DATA1,
 600         AE8_2430_USB0HS_CLK,
 601         AD8_2430_USB0HS_DIR,
 602         AE5_2430_USB0HS_STP,
 603         AE9_2430_USB0HS_NXT,
 604         AC7_2430_USB0HS_DATA7,
 605
 606         /* 2430 McBSP */
 607         AD6_2430_MCBSP_CLKS,
 608
 609         AB2_2430_MCBSP1_CLKR,
 610         AD5_2430_MCBSP1_FSR,
 611         AA1_2430_MCBSP1_DX,
 612         AF3_2430_MCBSP1_DR,
 613         AB3_2430_MCBSP1_FSX,
 614         Y9_2430_MCBSP1_CLKX,
 615
 616         AC10_2430_MCBSP2_FSX,
 617         AD16_2430_MCBSP2_CLX,
 618         AE13_2430_MCBSP2_DX,
 619         AD13_2430_MCBSP2_DR,
 620         AC10_2430_MCBSP2_FSX_OFF,
 621         AD16_2430_MCBSP2_CLX_OFF,
 622         AE13_2430_MCBSP2_DX_OFF,
 623         AD13_2430_MCBSP2_DR_OFF,
 624
 625         AC9_2430_MCBSP3_CLKX,
 626         AE4_2430_MCBSP3_FSX,
 627         AE2_2430_MCBSP3_DR,
 628         AF4_2430_MCBSP3_DX,
 629
 630         N3_2430_MCBSP4_CLKX,
 631         AD23_2430_MCBSP4_DR,
 632         AB25_2430_MCBSP4_DX,
 633         AC25_2430_MCBSP4_FSX,
 634
 635         AE16_2430_MCBSP5_CLKX,
 636         AF12_2430_MCBSP5_FSX,
 637         K7_2430_MCBSP5_DX,
 638         M1_2430_MCBSP5_DR,
 639
 640         /* 2430 McSPI*/
 641         Y18_2430_MCSPI1_CLK,
 642         AD15_2430_MCSPI1_SIMO,
 643         AE17_2430_MCSPI1_SOMI,
 644         U1_2430_MCSPI1_CS0,
 645
 646         /* Touchscreen GPIO */
 647         AF19_2430_GPIO_85,
 648
 649 };
 650
 651 struct omap_mux_cfg {
 652         struct pin_config       *pins;
 653         unsigned long           size;
 654         int                     (*cfg_reg)(const struct pin_config *cfg);
 655 };
 656
 657 #ifdef  CONFIG_OMAP_MUX
 658 /* setup pin muxing in Linux */
 659 extern int omap1_mux_init(void);
 660 extern int omap_mux_register(struct omap_mux_cfg *);
 661 extern int omap_cfg_reg(unsigned long reg_cfg);
 662 #else
 663 /* boot loader does it all (no warnings from CONFIG_OMAP_MUX_WARNINGS) */
 664 static inline int omap1_mux_init(void) { return 0; }
 665 static inline int omap_cfg_reg(unsigned long reg_cfg) { return 0; }
 666 #endif
 667
 668 extern int omap2_mux_init(void);
 669
 670 #endif