2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 2006 Silicon Graphics, Inc. All Rights Reserved.
9 #include <linux/types.h>
10 #include <linux/irq.h>
11 #include <linux/pci.h>
12 #include <linux/cpumask.h>
13 #include <linux/msi.h>
14 #include <linux/slab.h>
16 #include <asm/sn/addrs.h>
17 #include <asm/sn/intr.h>
18 #include <asm/sn/pcibus_provider_defs.h>
19 #include <asm/sn/pcidev.h>
20 #include <asm/sn/nodepda.h>
24 struct sn_irq_info
*sn_irq_info
;
27 static struct sn_msi_info sn_msi_info
[NR_IRQS
];
29 static struct irq_chip sn_msi_chip
;
31 void sn_teardown_msi_irq(unsigned int irq
)
36 struct pcidev_info
*sn_pdev
;
37 struct sn_irq_info
*sn_irq_info
;
38 struct pcibus_bussoft
*bussoft
;
39 struct sn_pcibus_provider
*provider
;
41 sn_irq_info
= sn_msi_info
[irq
].sn_irq_info
;
42 if (sn_irq_info
== NULL
|| sn_irq_info
->irq_int_bit
>= 0)
45 sn_pdev
= (struct pcidev_info
*)sn_irq_info
->irq_pciioinfo
;
46 pdev
= sn_pdev
->pdi_linux_pcidev
;
47 provider
= SN_PCIDEV_BUSPROVIDER(pdev
);
49 (*provider
->dma_unmap
)(pdev
,
50 sn_msi_info
[irq
].pci_addr
,
52 sn_msi_info
[irq
].pci_addr
= 0;
54 bussoft
= SN_PCIDEV_BUSSOFT(pdev
);
55 nasid
= NASID_GET(bussoft
->bs_base
);
56 widget
= (nasid
& 1) ?
57 TIO_SWIN_WIDGETNUM(bussoft
->bs_base
) :
58 SWIN_WIDGETNUM(bussoft
->bs_base
);
60 sn_intr_free(nasid
, widget
, sn_irq_info
);
61 sn_msi_info
[irq
].sn_irq_info
= NULL
;
66 int sn_setup_msi_irq(struct pci_dev
*pdev
, struct msi_desc
*entry
)
73 struct sn_irq_info
*sn_irq_info
;
74 struct pcibus_bussoft
*bussoft
= SN_PCIDEV_BUSSOFT(pdev
);
75 struct sn_pcibus_provider
*provider
= SN_PCIDEV_BUSPROVIDER(pdev
);
78 if (!entry
->msi_attrib
.is_64
)
84 if (provider
== NULL
|| provider
->dma_map_consistent
== NULL
)
92 * Set up the vector plumbing. Let the prom (via sn_intr_alloc)
93 * decide which cpu to direct this msi at by default.
96 nasid
= NASID_GET(bussoft
->bs_base
);
97 widget
= (nasid
& 1) ?
98 TIO_SWIN_WIDGETNUM(bussoft
->bs_base
) :
99 SWIN_WIDGETNUM(bussoft
->bs_base
);
101 sn_irq_info
= kzalloc(sizeof(struct sn_irq_info
), GFP_KERNEL
);
107 status
= sn_intr_alloc(nasid
, widget
, sn_irq_info
, irq
, -1, -1);
114 sn_irq_info
->irq_int_bit
= -1; /* mark this as an MSI irq */
115 sn_irq_fixup(pdev
, sn_irq_info
);
117 /* Prom probably should fill these in, but doesn't ... */
118 sn_irq_info
->irq_bridge_type
= bussoft
->bs_asic_type
;
119 sn_irq_info
->irq_bridge
= (void *)bussoft
->bs_base
;
122 * Map the xio address into bus space
124 bus_addr
= (*provider
->dma_map_consistent
)(pdev
,
125 sn_irq_info
->irq_xtalkaddr
,
126 sizeof(sn_irq_info
->irq_xtalkaddr
),
127 SN_DMA_MSI
|SN_DMA_ADDR_XIO
);
129 sn_intr_free(nasid
, widget
, sn_irq_info
);
135 sn_msi_info
[irq
].sn_irq_info
= sn_irq_info
;
136 sn_msi_info
[irq
].pci_addr
= bus_addr
;
138 msg
.address_hi
= (u32
)(bus_addr
>> 32);
139 msg
.address_lo
= (u32
)(bus_addr
& 0x00000000ffffffff);
142 * In the SN platform, bit 16 is a "send vector" bit which
143 * must be present in order to move the vector through the system.
145 msg
.data
= 0x100 + irq
;
147 set_irq_msi(irq
, entry
);
148 write_msi_msg(irq
, &msg
);
149 set_irq_chip_and_handler(irq
, &sn_msi_chip
, handle_edge_irq
);
155 static int sn_set_msi_irq_affinity(unsigned int irq
,
156 const struct cpumask
*cpu_mask
)
162 struct pci_dev
*pdev
;
163 struct pcidev_info
*sn_pdev
;
164 struct sn_irq_info
*sn_irq_info
;
165 struct sn_irq_info
*new_irq_info
;
166 struct sn_pcibus_provider
*provider
;
169 cpu
= cpumask_first(cpu_mask
);
170 sn_irq_info
= sn_msi_info
[irq
].sn_irq_info
;
171 if (sn_irq_info
== NULL
|| sn_irq_info
->irq_int_bit
>= 0)
175 * Release XIO resources for the old MSI PCI address
178 read_msi_msg(irq
, &msg
);
179 sn_pdev
= (struct pcidev_info
*)sn_irq_info
->irq_pciioinfo
;
180 pdev
= sn_pdev
->pdi_linux_pcidev
;
181 provider
= SN_PCIDEV_BUSPROVIDER(pdev
);
183 bus_addr
= (u64
)(msg
.address_hi
) << 32 | (u64
)(msg
.address_lo
);
184 (*provider
->dma_unmap
)(pdev
, bus_addr
, PCI_DMA_FROMDEVICE
);
185 sn_msi_info
[irq
].pci_addr
= 0;
187 nasid
= cpuid_to_nasid(cpu
);
188 slice
= cpuid_to_slice(cpu
);
190 new_irq_info
= sn_retarget_vector(sn_irq_info
, nasid
, slice
);
191 sn_msi_info
[irq
].sn_irq_info
= new_irq_info
;
192 if (new_irq_info
== NULL
)
196 * Map the xio address into bus space
199 bus_addr
= (*provider
->dma_map_consistent
)(pdev
,
200 new_irq_info
->irq_xtalkaddr
,
201 sizeof(new_irq_info
->irq_xtalkaddr
),
202 SN_DMA_MSI
|SN_DMA_ADDR_XIO
);
204 sn_msi_info
[irq
].pci_addr
= bus_addr
;
205 msg
.address_hi
= (u32
)(bus_addr
>> 32);
206 msg
.address_lo
= (u32
)(bus_addr
& 0x00000000ffffffff);
208 write_msi_msg(irq
, &msg
);
209 cpumask_copy(irq_desc
[irq
].affinity
, cpu_mask
);
213 #endif /* CONFIG_SMP */
215 static void sn_ack_msi_irq(unsigned int irq
)
217 move_native_irq(irq
);
221 static int sn_msi_retrigger_irq(unsigned int irq
)
223 unsigned int vector
= irq
;
224 ia64_resend_irq(vector
);
229 static struct irq_chip sn_msi_chip
= {
231 .mask
= mask_msi_irq
,
232 .unmask
= unmask_msi_irq
,
233 .ack
= sn_ack_msi_irq
,
235 .set_affinity
= sn_set_msi_irq_affinity
,
237 .retrigger
= sn_msi_retrigger_irq
,