1 /* arch/sparc/kernel/entry.S: Sparc trap low-level entry points.
3 * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net)
4 * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be)
5 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
6 * Copyright (C) 1996-1999 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
7 * Copyright (C) 1997 Anton Blanchard (anton@progsoc.uts.edu.au)
10 #include <linux/errno.h>
15 #include <asm/contregs.h>
16 #include <asm/ptrace.h>
17 #include <asm/asm-offsets.h>
19 #include <asm/vaddrs.h>
20 #include <asm/memreg.h>
22 #include <asm/pgtable.h>
23 #include <asm/pgtsun4c.h>
24 #include <asm/winmacro.h>
25 #include <asm/signal.h>
28 #include <asm/thread_info.h>
29 #include <asm/param.h>
30 #include <asm/unistd.h>
32 #include <asm/asmmacro.h>
36 /* These are just handy. */
37 #define _SV save %sp, -STACKFRAME_SZ, %sp
40 #define FLUSH_ALL_KERNEL_WINDOWS \
41 _SV; _SV; _SV; _SV; _SV; _SV; _SV; \
42 _RS; _RS; _RS; _RS; _RS; _RS; _RS;
48 .globl arch_kgdb_breakpoint
49 .type arch_kgdb_breakpoint,#function
54 .size arch_kgdb_breakpoint,.-arch_kgdb_breakpoint
57 #if defined(CONFIG_BLK_DEV_FD) || defined(CONFIG_BLK_DEV_FD_MODULE)
62 * This code cannot touch registers %l0 %l1 and %l2
63 * because SAVE_ALL depends on their values. It depends
64 * on %l3 also, but we regenerate it before a call.
65 * Other registers are:
66 * %l3 -- base address of fdc registers
68 * %l5 -- scratch for ld/st address
70 * %l7 -- scratch [floppy byte, ld/st address, aux. data]
73 /* Do we have work to do? */
74 sethi %hi(doing_pdma), %l7
75 ld [%l7 + %lo(doing_pdma)], %l7
80 /* Load fdc register base */
81 sethi %hi(fdc_status), %l3
82 ld [%l3 + %lo(fdc_status)], %l3
84 /* Setup register addresses */
85 sethi %hi(pdma_vaddr), %l5 ! transfer buffer
86 ld [%l5 + %lo(pdma_vaddr)], %l4
87 sethi %hi(pdma_size), %l5 ! bytes to go
88 ld [%l5 + %lo(pdma_size)], %l6
92 andcc %l7, 0x80, %g0 ! Does fifo still have data
93 bz floppy_fifo_emptied ! fifo has been emptied...
94 andcc %l7, 0x20, %g0 ! in non-dma mode still?
95 bz floppy_overrun ! nope, overrun
96 andcc %l7, 0x40, %g0 ! 0=write 1=read
100 /* Ok, actually read this byte */
111 /* Ok, actually write this byte */
118 /* fall through... */
120 sethi %hi(pdma_vaddr), %l5
121 st %l4, [%l5 + %lo(pdma_vaddr)]
122 sethi %hi(pdma_size), %l5
123 st %l6, [%l5 + %lo(pdma_size)]
124 /* Flip terminal count pin */
125 set auxio_register, %l7
128 set sparc_cpu_model, %l5
130 subcc %l5, 1, %g0 /* enum { sun4c = 1 }; */
146 /* Kill some time so the bits set */
152 /* Prevent recursion */
153 sethi %hi(doing_pdma), %l7
155 st %g0, [%l7 + %lo(doing_pdma)]
157 /* We emptied the FIFO, but we haven't read everything
158 * as of yet. Store the current transfer address and
159 * bytes left to read so we can continue when the next
163 sethi %hi(pdma_vaddr), %l5
164 st %l4, [%l5 + %lo(pdma_vaddr)]
165 sethi %hi(pdma_size), %l7
166 st %l6, [%l7 + %lo(pdma_size)]
168 /* Restore condition codes */
176 sethi %hi(pdma_vaddr), %l5
177 st %l4, [%l5 + %lo(pdma_vaddr)]
178 sethi %hi(pdma_size), %l5
179 st %l6, [%l5 + %lo(pdma_size)]
180 /* Prevent recursion */
181 sethi %hi(doing_pdma), %l7
182 st %g0, [%l7 + %lo(doing_pdma)]
184 /* fall through... */
189 /* Set all IRQs off. */
196 mov 11, %o0 ! floppy irq level (unused anyway)
197 mov %g0, %o1 ! devid is not used in fast interrupts
198 call sparc_floppy_irq
199 add %sp, STACKFRAME_SZ, %o2 ! struct pt_regs *regs
203 #endif /* (CONFIG_BLK_DEV_FD) */
205 /* Bad trap handler */
206 .globl bad_trap_handler
213 add %sp, STACKFRAME_SZ, %o0 ! pt_regs
215 mov %l7, %o1 ! trap number
219 /* For now all IRQ's not registered get sent here. handler_irq() will
220 * see if a routine is registered to handle this interrupt and if not
221 * it will say so on the console.
225 .globl real_irq_entry, patch_handler_irq
230 .globl patchme_maybe_smp_msg
233 patchme_maybe_smp_msg:
244 mov %l7, %o0 ! irq level
247 add %sp, STACKFRAME_SZ, %o1 ! pt_regs ptr
248 or %l0, PSR_PIL, %g2 ! restore PIL after handler_irq
249 wr %g2, PSR_ET, %psr ! keep ET up
255 /* SMP per-cpu ticker interrupts are handled specially. */
257 bne real_irq_continue+4
263 call smp4m_percpu_timer_interrupt
264 add %sp, STACKFRAME_SZ, %o0
269 /* Here is where we check for possible SMP IPI passed to us
270 * on some level other than 15 which is the NMI and only used
271 * for cross calls. That has a separate entry point below.
274 GET_PROCESSOR4M_ID(o3)
275 sethi %hi(sun4m_irq_percpu), %l5
277 or %l5, %lo(sun4m_irq_percpu), %o5
278 sethi %hi(0x40000000), %o2
280 ld [%o1 + 0x00], %o3 ! sun4m_irq_percpu[cpu]->pending
284 st %o2, [%o1 + 0x04] ! sun4m_irq_percpu[cpu]->clear=0x40000000
286 ld [%o1 + 0x00], %g0 ! sun4m_irq_percpu[cpu]->pending
293 call smp_reschedule_irq
299 .globl linux_trap_ipi15_sun4m
300 linux_trap_ipi15_sun4m:
302 sethi %hi(0x80000000), %o2
303 GET_PROCESSOR4M_ID(o0)
304 sethi %hi(sun4m_irq_percpu), %l5
305 or %l5, %lo(sun4m_irq_percpu), %o5
308 ld [%o5 + 0x00], %o3 ! sun4m_irq_percpu[cpu]->pending
310 be 1f ! Must be an NMI async memory error
311 st %o2, [%o5 + 0x04] ! sun4m_irq_percpu[cpu]->clear=0x80000000
313 ld [%o5 + 0x00], %g0 ! sun4m_irq_percpu[cpu]->pending
320 call smp4m_cross_call_irq
322 b ret_trap_lockless_ipi
325 /* NMI async memory error handling. */
326 sethi %hi(0x80000000), %l4
327 sethi %hi(sun4m_irq_global), %o5
328 ld [%o5 + %lo(sun4m_irq_global)], %l5
329 st %l4, [%l5 + 0x0c] ! sun4m_irq_global->mask_set=0x80000000
331 ld [%l5 + 0x00], %g0 ! sun4m_irq_global->pending
340 st %l4, [%l5 + 0x08] ! sun4m_irq_global->mask_clear=0x80000000
342 ld [%l5 + 0x00], %g0 ! sun4m_irq_global->pending
347 /* SMP per-cpu ticker interrupts are handled specially. */
351 sethi %hi(CC_ICLR), %o0
352 sethi %hi(1 << 14), %o1
353 or %o0, %lo(CC_ICLR), %o0
354 stha %o1, [%o0] ASI_M_MXCC /* Clear PIL 14 in MXCC's ICLR */
359 call smp4d_percpu_timer_interrupt
360 add %sp, STACKFRAME_SZ, %o0
366 .globl linux_trap_ipi15_sun4d
367 linux_trap_ipi15_sun4d:
369 sethi %hi(CC_BASE), %o4
370 sethi %hi(MXCC_ERR_ME|MXCC_ERR_PEW|MXCC_ERR_ASE|MXCC_ERR_PEE), %o2
371 or %o4, (CC_EREG - CC_BASE), %o0
372 ldda [%o0] ASI_M_MXCC, %o0
375 sethi %hi(BB_STAT2), %o2
376 lduba [%o2] ASI_M_CTL, %o2
377 andcc %o2, BB_STAT2_MASK, %g0
379 or %o4, (CC_ICLR - CC_BASE), %o0
380 sethi %hi(1 << 15), %o1
381 stha %o1, [%o0] ASI_M_MXCC /* Clear PIL 15 in MXCC's ICLR */
387 call smp4d_cross_call_irq
389 b ret_trap_lockless_ipi
396 lduha [%l4] ASI_M_MXCC, %l5
397 sethi %hi(1 << 15), %l7
399 stha %l5, [%l4] ASI_M_MXCC
403 #ifdef CONFIG_SPARC_LEON
405 .globl smpleon_ticker
406 /* SMP per-cpu ticker interrupts are handled specially. */
414 call leon_percpu_timer_interrupt
415 add %sp, STACKFRAME_SZ, %o0
421 .globl linux_trap_ipi15_leon
422 linux_trap_ipi15_leon:
429 call leon_cross_call_irq
431 b ret_trap_lockless_ipi
434 #endif /* CONFIG_SPARC_LEON */
436 #endif /* CONFIG_SMP */
438 /* This routine handles illegal instructions and privileged
439 * instruction attempts from user code.
442 .globl bad_instruction
444 sethi %hi(0xc1f80000), %l4
446 sethi %hi(0x81d80000), %l7
452 wr %l0, PSR_ET, %psr ! re-enable traps
455 add %sp, STACKFRAME_SZ, %o0
458 call do_illegal_instruction
463 1: /* unimplemented flush - just skip */
468 .globl priv_instruction
475 add %sp, STACKFRAME_SZ, %o0
478 call do_priv_instruction
483 /* This routine handles unaligned data accesses. */
487 andcc %l0, PSR_PS, %g0
497 call kernel_unaligned_trap
498 add %sp, STACKFRAME_SZ, %o0
505 wr %l0, PSR_ET, %psr ! re-enable traps
509 call user_unaligned_trap
510 add %sp, STACKFRAME_SZ, %o0
514 /* This routine handles floating point disabled traps. */
516 .globl fpd_trap_handler
520 wr %l0, PSR_ET, %psr ! re-enable traps
523 add %sp, STACKFRAME_SZ, %o0
531 /* This routine handles Floating Point Exceptions. */
533 .globl fpe_trap_handler
535 set fpsave_magic, %l5
538 sethi %hi(fpsave), %l5
539 or %l5, %lo(fpsave), %l5
542 sethi %hi(fpsave_catch2), %l5
543 or %l5, %lo(fpsave_catch2), %l5
549 sethi %hi(fpsave_catch), %l5
550 or %l5, %lo(fpsave_catch), %l5
559 wr %l0, PSR_ET, %psr ! re-enable traps
562 add %sp, STACKFRAME_SZ, %o0
570 /* This routine handles Tag Overflow Exceptions. */
572 .globl do_tag_overflow
576 wr %l0, PSR_ET, %psr ! re-enable traps
579 add %sp, STACKFRAME_SZ, %o0
582 call handle_tag_overflow
587 /* This routine handles Watchpoint Exceptions. */
593 wr %l0, PSR_ET, %psr ! re-enable traps
596 add %sp, STACKFRAME_SZ, %o0
599 call handle_watchpoint
604 /* This routine handles Register Access Exceptions. */
610 wr %l0, PSR_ET, %psr ! re-enable traps
613 add %sp, STACKFRAME_SZ, %o0
616 call handle_reg_access
621 /* This routine handles Co-Processor Disabled Exceptions. */
623 .globl do_cp_disabled
627 wr %l0, PSR_ET, %psr ! re-enable traps
630 add %sp, STACKFRAME_SZ, %o0
633 call handle_cp_disabled
638 /* This routine handles Co-Processor Exceptions. */
640 .globl do_cp_exception
644 wr %l0, PSR_ET, %psr ! re-enable traps
647 add %sp, STACKFRAME_SZ, %o0
650 call handle_cp_exception
655 /* This routine handles Hardware Divide By Zero Exceptions. */
661 wr %l0, PSR_ET, %psr ! re-enable traps
664 add %sp, STACKFRAME_SZ, %o0
667 call handle_hw_divzero
673 .globl do_flush_windows
680 andcc %l0, PSR_PS, %g0
684 call flush_user_windows
687 /* Advance over the trap instruction. */
688 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1
690 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
691 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
695 .globl flush_patch_one
697 /* We get these for debugging routines using __builtin_return_address() */
700 FLUSH_ALL_KERNEL_WINDOWS
702 /* Advance over the trap instruction. */
703 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1
705 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
706 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
710 /* The getcc software trap. The user wants the condition codes from
711 * the %psr in register %g1.
715 .globl getcc_trap_handler
717 srl %l0, 20, %g1 ! give user
718 and %g1, 0xf, %g1 ! only ICC bits in %psr
719 jmp %l2 ! advance over trap instruction
720 rett %l2 + 0x4 ! like this...
722 /* The setcc software trap. The user has condition codes in %g1
723 * that it would like placed in the %psr. Be careful not to flip
724 * any unintentional bits!
728 .globl setcc_trap_handler
732 andn %l0, %l5, %l0 ! clear ICC bits in %psr
733 and %l4, %l5, %l4 ! clear non-ICC bits in user value
734 or %l4, %l0, %l4 ! or them in... mix mix mix
736 wr %l4, 0x0, %psr ! set new %psr
737 WRITE_PAUSE ! TI scumbags...
739 jmp %l2 ! advance over trap instruction
740 rett %l2 + 0x4 ! like this...
743 .globl linux_trap_nmi_sun4c
744 linux_trap_nmi_sun4c:
747 /* Ugh, we need to clear the IRQ line. This is now
748 * a very sun4c specific trap handler...
750 sethi %hi(interrupt_enable), %l5
751 ld [%l5 + %lo(interrupt_enable)], %l5
753 andn %l6, INTS_ENAB, %l6
756 /* Now it is safe to re-enable traps without recursion. */
761 /* Now call the c-code with the pt_regs frame ptr and the
762 * memory error registers as arguments. The ordering chosen
763 * here is due to unlatching semantics.
765 sethi %hi(AC_SYNC_ERR), %o0
767 lda [%o0] ASI_CONTROL, %o2 ! sync vaddr
769 lda [%o0] ASI_CONTROL, %o1 ! sync error
771 lda [%o0] ASI_CONTROL, %o4 ! async vaddr
773 lda [%o0] ASI_CONTROL, %o3 ! async error
775 add %sp, STACKFRAME_SZ, %o0
780 .globl invalid_segment_patch1_ff
781 .globl invalid_segment_patch2_ff
782 invalid_segment_patch1_ff: cmp %l4, 0xff
783 invalid_segment_patch2_ff: mov 0xff, %l3
786 .globl invalid_segment_patch1_1ff
787 .globl invalid_segment_patch2_1ff
788 invalid_segment_patch1_1ff: cmp %l4, 0x1ff
789 invalid_segment_patch2_1ff: mov 0x1ff, %l3
792 .globl num_context_patch1_16, num_context_patch2_16
793 num_context_patch1_16: mov 0x10, %l7
794 num_context_patch2_16: mov 0x10, %l7
797 .globl vac_linesize_patch_32
798 vac_linesize_patch_32: subcc %l7, 32, %l7
801 .globl vac_hwflush_patch1_on, vac_hwflush_patch2_on
804 * Ugly, but we cant use hardware flushing on the sun4 and we'd require
805 * two instructions (Anton)
807 vac_hwflush_patch1_on: addcc %l7, -PAGE_SIZE, %l7
809 vac_hwflush_patch2_on: sta %g0, [%l3 + %l7] ASI_HWFLUSHSEG
811 .globl invalid_segment_patch1, invalid_segment_patch2
812 .globl num_context_patch1
813 .globl vac_linesize_patch, vac_hwflush_patch1
814 .globl vac_hwflush_patch2
823 ! %l7 = 1 for textfault
824 ! We want error in %l5, vaddr in %l6
826 sethi %hi(AC_SYNC_ERR), %l4
827 add %l4, 0x4, %l6 ! AC_SYNC_VA in %l6
828 lda [%l6] ASI_CONTROL, %l5 ! Address
829 lda [%l4] ASI_CONTROL, %l6 ! Error, retained for a bit
831 andn %l5, 0xfff, %l5 ! Encode all info into l7
837 or %l4, %l7, %l7 ! l7 = [addr,write,txtfault]
839 andcc %l0, PSR_PS, %g0
840 be sun4c_fault_fromuser
841 andcc %l7, 1, %g0 ! Text fault?
844 sethi %hi(KERNBASE), %l4
850 blu sun4c_fault_fromuser
851 sethi %hi(~((1 << SUN4C_REAL_PGDIR_SHIFT) - 1)), %l4
853 /* If the kernel references a bum kernel pointer, or a pte which
854 * points to a non existant page in ram, we will run this code
855 * _forever_ and lock up the machine!!!!! So we must check for
856 * this condition, the AC_SYNC_ERR bits are what we must examine.
857 * Also a parity error would make this happen as well. So we just
858 * check that we are in fact servicing a tlb miss and not some
859 * other type of fault for the kernel.
862 be sun4c_fault_fromuser
865 /* Test for NULL pte_t * in vmalloc area. */
866 sethi %hi(VMALLOC_START), %l4
868 blu,a invalid_segment_patch1
869 lduXa [%l5] ASI_SEGMAP, %l4
871 sethi %hi(swapper_pg_dir), %l4
872 srl %l5, SUN4C_PGDIR_SHIFT, %l6
873 or %l4, %lo(swapper_pg_dir), %l4
876 andcc %l4, PAGE_MASK, %g0
877 be sun4c_fault_fromuser
878 lduXa [%l5] ASI_SEGMAP, %l4
880 invalid_segment_patch1:
883 sethi %hi(sun4c_kfree_ring), %l4
884 or %l4, %lo(sun4c_kfree_ring), %l4
886 deccc %l3 ! do we have a free entry?
887 bcs,a 2f ! no, unmap one.
888 sethi %hi(sun4c_kernel_ring), %l4
890 st %l3, [%l4 + 0x18] ! sun4c_kfree_ring.num_entries--
892 ld [%l4 + 0x00], %l6 ! entry = sun4c_kfree_ring.ringhd.next
893 st %l5, [%l6 + 0x08] ! entry->vaddr = address
895 ld [%l6 + 0x00], %l3 ! next = entry->next
896 ld [%l6 + 0x04], %l7 ! entry->prev
898 st %l7, [%l3 + 0x04] ! next->prev = entry->prev
899 st %l3, [%l7 + 0x00] ! entry->prev->next = next
901 sethi %hi(sun4c_kernel_ring), %l4
902 or %l4, %lo(sun4c_kernel_ring), %l4
903 ! head = &sun4c_kernel_ring.ringhd
905 ld [%l4 + 0x00], %l7 ! head->next
907 st %l4, [%l6 + 0x04] ! entry->prev = head
908 st %l7, [%l6 + 0x00] ! entry->next = head->next
909 st %l6, [%l7 + 0x04] ! head->next->prev = entry
911 st %l6, [%l4 + 0x00] ! head->next = entry
914 inc %l3 ! sun4c_kernel_ring.num_entries++
920 or %l4, %lo(sun4c_kernel_ring), %l4
921 ! head = &sun4c_kernel_ring.ringhd
923 ld [%l4 + 0x04], %l6 ! entry = head->prev
925 ld [%l6 + 0x08], %l3 ! tmp = entry->vaddr
927 ! Flush segment from the cache.
928 sethi %hi((64 * 1024)), %l7
935 sta %g0, [%l3 + %l7] ASI_FLUSHSEG
937 st %l5, [%l6 + 0x08] ! entry->vaddr = address
939 ld [%l6 + 0x00], %l5 ! next = entry->next
940 ld [%l6 + 0x04], %l7 ! entry->prev
942 st %l7, [%l5 + 0x04] ! next->prev = entry->prev
943 st %l5, [%l7 + 0x00] ! entry->prev->next = next
944 st %l4, [%l6 + 0x04] ! entry->prev = head
946 ld [%l4 + 0x00], %l7 ! head->next
948 st %l7, [%l6 + 0x00] ! entry->next = head->next
949 st %l6, [%l7 + 0x04] ! head->next->prev = entry
950 st %l6, [%l4 + 0x00] ! head->next = entry
952 mov %l3, %l5 ! address = tmp
959 ldub [%l6 + 0x0c], %l3
960 or %l4, %l3, %l4 ! encode new vaddr/pseg into l4
962 sethi %hi(AC_CONTEXT), %l3
963 lduba [%l3] ASI_CONTROL, %l6
965 /* Invalidate old mapping, instantiate new mapping,
966 * for each context. Registers l6/l7 are live across
970 sethi %hi(AC_CONTEXT), %l3
971 stba %l7, [%l3] ASI_CONTROL
972 invalid_segment_patch2:
974 stXa %l3, [%l5] ASI_SEGMAP
977 stXa %l4, [%l3] ASI_SEGMAP
979 sethi %hi(AC_CONTEXT), %l3
980 stba %l6, [%l3] ASI_CONTROL
985 sethi %hi(VMALLOC_START), %l4
989 mov 1 << (SUN4C_REAL_PGDIR_SHIFT - PAGE_SHIFT), %l7
991 sethi %hi(KERNBASE), %l6
994 srl %l4, PAGE_SHIFT, %l4
995 sethi %hi((SUN4C_PAGE_KERNEL & 0xf4000000)), %l3
998 sethi %hi(PAGE_SIZE), %l4
1001 sta %l3, [%l5] ASI_PTE
1008 sethi %hi(sun4c_kernel_faults), %l4
1011 srl %l5, SUN4C_PGDIR_SHIFT, %l3
1012 sethi %hi(swapper_pg_dir), %l4
1013 or %l4, %lo(swapper_pg_dir), %l4
1016 and %l4, PAGE_MASK, %l4
1018 srl %l5, (PAGE_SHIFT - 2), %l6
1019 and %l6, ((SUN4C_PTRS_PER_PTE - 1) << 2), %l6
1022 sethi %hi(PAGE_SIZE), %l4
1027 sta %l3, [%l5] ASI_PTE
1032 sethi %hi(sun4c_kernel_faults), %l4
1034 ld [%l4 + %lo(sun4c_kernel_faults)], %l3
1036 st %l3, [%l4 + %lo(sun4c_kernel_faults)]
1038 /* Restore condition codes */
1044 sun4c_fault_fromuser:
1048 mov %l7, %o1 ! Decode the info from %l7
1050 and %o1, 1, %o1 ! arg2 = text_faultp
1052 and %o2, 2, %o2 ! arg3 = writep
1053 andn %o3, 0xfff, %o3 ! arg4 = faulting address
1055 wr %l0, PSR_ET, %psr
1059 add %sp, STACKFRAME_SZ, %o0 ! arg1 = pt_regs ptr
1069 lda [%l5] ASI_M_MMUREGS, %l6 ! read sfar first
1070 lda [%l4] ASI_M_MMUREGS, %l5 ! read sfsr last
1072 andn %l6, 0xfff, %l6
1073 srl %l5, 6, %l5 ! and encode all info into l7
1078 or %l6, %l7, %l7 ! l7 = [addr,write,txtfault]
1084 and %o1, 1, %o1 ! arg2 = text_faultp
1086 and %o2, 2, %o2 ! arg3 = writep
1087 andn %o3, 0xfff, %o3 ! arg4 = faulting address
1089 wr %l0, PSR_ET, %psr
1093 add %sp, STACKFRAME_SZ, %o0 ! arg1 = pt_regs ptr
1098 .globl sys_nis_syscall
1101 add %sp, STACKFRAME_SZ, %o0 ! pt_regs *regs arg
1102 call c_sys_nis_syscall
1109 add %sp, STACKFRAME_SZ, %o0 ! pt_regs *regs arg
1115 st %g0, [%sp + STACKFRAME_SZ + PT_I2]
1118 add %sp, STACKFRAME_SZ, %o0
1121 ld [%sp + STACKFRAME_SZ + PT_I0], %o0
1124 .globl sys_sparc_pipe
1127 add %sp, STACKFRAME_SZ, %o0 ! pt_regs *regs arg
1132 .globl sys_sigaltstack
1144 call do_sys_sigstack
1148 .globl sys_sigreturn
1151 add %sp, STACKFRAME_SZ, %o0
1153 ld [%curptr + TI_FLAGS], %l5
1154 andcc %l5, _TIF_SYSCALL_TRACE, %g0
1162 /* We don't want to muck with user registers like a
1163 * normal syscall, just return.
1168 .globl sys_rt_sigreturn
1170 call do_rt_sigreturn
1171 add %sp, STACKFRAME_SZ, %o0
1173 ld [%curptr + TI_FLAGS], %l5
1174 andcc %l5, _TIF_SYSCALL_TRACE, %g0
1178 add %sp, STACKFRAME_SZ, %o0
1183 /* We are returning to a signal handler. */
1186 /* Now that we have a real sys_clone, sys_fork() is
1187 * implemented in terms of it. Our _real_ implementation
1188 * of SunOS vfork() will use sys_vfork().
1190 * XXX These three should be consolidated into mostly shared
1191 * XXX code just like on sparc64... -DaveM
1194 .globl sys_fork, flush_patch_two
1198 FLUSH_ALL_KERNEL_WINDOWS;
1199 ld [%curptr + TI_TASK], %o4
1202 mov SIGCHLD, %o0 ! arg0: clone flags
1205 mov %fp, %o1 ! arg1: usp
1206 std %g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr]
1207 add %sp, STACKFRAME_SZ, %o2 ! arg2: pt_regs ptr
1212 /* Whee, kernel threads! */
1213 .globl sys_clone, flush_patch_three
1217 FLUSH_ALL_KERNEL_WINDOWS;
1218 ld [%curptr + TI_TASK], %o4
1222 /* arg0,1: flags,usp -- loaded already */
1223 cmp %o1, 0x0 ! Is new_usp NULL?
1227 mov %fp, %o1 ! yes, use callers usp
1228 andn %o1, 7, %o1 ! no, align to 8 bytes
1230 std %g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr]
1231 add %sp, STACKFRAME_SZ, %o2 ! arg2: pt_regs ptr
1236 /* Whee, real vfork! */
1237 .globl sys_vfork, flush_patch_four
1240 FLUSH_ALL_KERNEL_WINDOWS;
1241 ld [%curptr + TI_TASK], %o4
1246 std %g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr]
1247 sethi %hi(0x4000 | 0x0100 | SIGCHLD), %o0
1249 or %o0, %lo(0x4000 | 0x0100 | SIGCHLD), %o0
1250 sethi %hi(sparc_do_fork), %l1
1252 jmpl %l1 + %lo(sparc_do_fork), %g0
1253 add %sp, STACKFRAME_SZ, %o2
1256 linux_sparc_ni_syscall:
1257 sethi %hi(sys_ni_syscall), %l7
1258 b syscall_is_too_hard
1259 or %l7, %lo(sys_ni_syscall), %l7
1269 linux_syscall_trace:
1270 add %sp, STACKFRAME_SZ, %o0
1283 .globl ret_from_fork
1288 ld [%sp + STACKFRAME_SZ + PT_I0], %o0
1290 /* Linux native system calls enter here... */
1292 .globl linux_sparc_syscall
1293 linux_sparc_syscall:
1294 sethi %hi(PSR_SYSCALL), %l4
1296 /* Direct access to user regs, must faster. */
1297 cmp %g1, NR_syscalls
1298 bgeu linux_sparc_ni_syscall
1302 bne linux_fast_syscall
1303 /* Just do first insn from SAVE_ALL in the delay slot */
1305 syscall_is_too_hard:
1309 wr %l0, PSR_ET, %psr
1314 ld [%curptr + TI_FLAGS], %l5
1316 andcc %l5, _TIF_SYSCALL_TRACE, %g0
1318 bne linux_syscall_trace
1325 st %o0, [%sp + STACKFRAME_SZ + PT_I0]
1328 ld [%curptr + TI_FLAGS], %l6
1329 cmp %o0, -ERESTART_RESTARTBLOCK
1330 ld [%sp + STACKFRAME_SZ + PT_PSR], %g3
1333 andcc %l6, _TIF_SYSCALL_TRACE, %g0
1335 /* System call success, clear Carry condition code. */
1338 st %g3, [%sp + STACKFRAME_SZ + PT_PSR]
1339 bne linux_syscall_trace2
1340 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1 /* pc = npc */
1341 add %l1, 0x4, %l2 /* npc = npc+4 */
1342 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
1344 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
1346 /* System call failure, set Carry condition code.
1347 * Also, get abs(errno) to return to the process.
1351 st %o0, [%sp + STACKFRAME_SZ + PT_I0]
1353 st %g3, [%sp + STACKFRAME_SZ + PT_PSR]
1354 bne linux_syscall_trace2
1355 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1 /* pc = npc */
1356 add %l1, 0x4, %l2 /* npc = npc+4 */
1357 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
1359 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
1361 linux_syscall_trace2:
1362 add %sp, STACKFRAME_SZ, %o0
1365 add %l1, 0x4, %l2 /* npc = npc+4 */
1366 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
1368 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
1371 /* Saving and restoring the FPU state is best done from lowlevel code.
1373 * void fpsave(unsigned long *fpregs, unsigned long *fsr,
1374 * void *fpqueue, unsigned long *fpqdepth)
1379 st %fsr, [%o1] ! this can trap on us if fpu is in bogon state
1386 /* We have an fpqueue to save. */
1400 std %f0, [%o0 + 0x00]
1401 std %f2, [%o0 + 0x08]
1402 std %f4, [%o0 + 0x10]
1403 std %f6, [%o0 + 0x18]
1404 std %f8, [%o0 + 0x20]
1405 std %f10, [%o0 + 0x28]
1406 std %f12, [%o0 + 0x30]
1407 std %f14, [%o0 + 0x38]
1408 std %f16, [%o0 + 0x40]
1409 std %f18, [%o0 + 0x48]
1410 std %f20, [%o0 + 0x50]
1411 std %f22, [%o0 + 0x58]
1412 std %f24, [%o0 + 0x60]
1413 std %f26, [%o0 + 0x68]
1414 std %f28, [%o0 + 0x70]
1416 std %f30, [%o0 + 0x78]
1418 /* Thanks for Theo Deraadt and the authors of the Sprite/netbsd/openbsd
1419 * code for pointing out this possible deadlock, while we save state
1420 * above we could trap on the fsr store so our low level fpu trap
1421 * code has to know how to deal with this.
1431 /* void fpload(unsigned long *fpregs, unsigned long *fsr); */
1435 ldd [%o0 + 0x00], %f0
1436 ldd [%o0 + 0x08], %f2
1437 ldd [%o0 + 0x10], %f4
1438 ldd [%o0 + 0x18], %f6
1439 ldd [%o0 + 0x20], %f8
1440 ldd [%o0 + 0x28], %f10
1441 ldd [%o0 + 0x30], %f12
1442 ldd [%o0 + 0x38], %f14
1443 ldd [%o0 + 0x40], %f16
1444 ldd [%o0 + 0x48], %f18
1445 ldd [%o0 + 0x50], %f20
1446 ldd [%o0 + 0x58], %f22
1447 ldd [%o0 + 0x60], %f24
1448 ldd [%o0 + 0x68], %f26
1449 ldd [%o0 + 0x70], %f28
1450 ldd [%o0 + 0x78], %f30
1455 /* __ndelay and __udelay take two arguments:
1456 * 0 - nsecs or usecs to delay
1457 * 1 - per_cpu udelay_val (loops per jiffy)
1459 * Note that ndelay gives HZ times higher resolution but has a 10ms
1460 * limit. udelay can handle up to 1s.
1464 save %sp, -STACKFRAME_SZ, %sp
1466 call .umul ! round multiplier up so large ns ok
1467 mov 0x1ae, %o1 ! 2**32 / (1 000 000 000 / HZ)
1469 mov %i1, %o1 ! udelay_val
1471 mov %o1, %o0 ! >>32 later for better resolution
1475 save %sp, -STACKFRAME_SZ, %sp
1477 sethi %hi(0x10c7), %o1 ! round multiplier up so large us ok
1479 or %o1, %lo(0x10c7), %o1 ! 2**32 / 1 000 000
1481 mov %i1, %o1 ! udelay_val
1482 sethi %hi(0x028f4b62), %l0 ! Add in rounding constant * 2**32,
1483 or %g0, %lo(0x028f4b62), %l0
1484 addcc %o0, %l0, %o0 ! 2**32 * 0.009 999
1489 mov HZ, %o0 ! >>32 earlier for wider range
1500 /* Handle a software breakpoint */
1501 /* We have to inform parent that child has stopped */
1503 .globl breakpoint_trap
1507 wr %l0, PSR_ET, %psr
1510 st %i0, [%sp + STACKFRAME_SZ + PT_G0] ! for restarting syscalls
1511 call sparc_breakpoint
1512 add %sp, STACKFRAME_SZ, %o0
1518 .globl kgdb_trap_low
1519 .type kgdb_trap_low,#function
1523 wr %l0, PSR_ET, %psr
1527 add %sp, STACKFRAME_SZ, %o0
1530 .size kgdb_trap_low,.-kgdb_trap_low
1534 .globl flush_patch_exception
1535 flush_patch_exception:
1536 FLUSH_ALL_KERNEL_WINDOWS;
1538 jmpl %o7 + 0xc, %g0 ! see asm-sparc/processor.h
1539 mov 1, %g1 ! signal EFAULT condition
1542 .globl kill_user_windows, kuw_patch1_7win
1544 kuw_patch1_7win: sll %o3, 6, %o3
1546 /* No matter how much overhead this routine has in the worst
1547 * case scenerio, it is several times better than taking the
1548 * traps with the old method of just doing flush_user_windows().
1551 ld [%g6 + TI_UWINMASK], %o0 ! get current umask
1552 orcc %g0, %o0, %g0 ! if no bits set, we are done
1553 be 3f ! nothing to do
1554 rd %psr, %o5 ! must clear interrupts
1555 or %o5, PSR_PIL, %o4 ! or else that could change
1556 wr %o4, 0x0, %psr ! the uwinmask state
1557 WRITE_PAUSE ! burn them cycles
1559 ld [%g6 + TI_UWINMASK], %o0 ! get consistent state
1560 orcc %g0, %o0, %g0 ! did an interrupt come in?
1561 be 4f ! yep, we are done
1562 rd %wim, %o3 ! get current wim
1563 srl %o3, 1, %o4 ! simulate a save
1565 sll %o3, 7, %o3 ! compute next wim
1566 or %o4, %o3, %o3 ! result
1567 andncc %o0, %o3, %o0 ! clean this bit in umask
1568 bne kuw_patch1 ! not done yet
1569 srl %o3, 1, %o4 ! begin another save simulation
1570 wr %o3, 0x0, %wim ! set the new wim
1571 st %g0, [%g6 + TI_UWINMASK] ! clear uwinmask
1573 wr %o5, 0x0, %psr ! re-enable interrupts
1574 WRITE_PAUSE ! burn baby burn
1577 st %g0, [%g6 + TI_W_SAVED] ! no windows saved
1580 .globl restore_current
1582 LOAD_CURRENT(g6, o0)
1587 #include <asm/pcic.h>
1590 .globl linux_trap_ipi15_pcic
1591 linux_trap_ipi15_pcic:
1596 * First deactivate NMI
1597 * or we cannot drop ET, cannot get window spill traps.
1598 * The busy loop is necessary because the PIO error
1599 * sometimes does not go away quickly and we trap again.
1601 sethi %hi(pcic_regs), %o1
1602 ld [%o1 + %lo(pcic_regs)], %o2
1604 ! Get pending status for printouts later.
1605 ld [%o2 + PCI_SYS_INT_PENDING], %o0
1607 mov PCI_SYS_INT_PENDING_CLEAR_ALL, %o1
1608 stb %o1, [%o2 + PCI_SYS_INT_PENDING_CLEAR]
1610 ld [%o2 + PCI_SYS_INT_PENDING], %o1
1611 andcc %o1, ((PCI_SYS_INT_PENDING_PIO|PCI_SYS_INT_PENDING_PCI)>>24), %g0
1615 or %l0, PSR_PIL, %l4
1618 wr %l4, PSR_ET, %psr
1622 add %sp, STACKFRAME_SZ, %o1 ! struct pt_regs *regs
1625 .globl pcic_nmi_trap_patch
1626 pcic_nmi_trap_patch:
1627 sethi %hi(linux_trap_ipi15_pcic), %l3
1628 jmpl %l3 + %lo(linux_trap_ipi15_pcic), %g0
1632 #endif /* CONFIG_PCI */
1636 save %sp, -0x40, %sp
1637 save %sp, -0x40, %sp
1638 save %sp, -0x40, %sp
1639 save %sp, -0x40, %sp
1640 save %sp, -0x40, %sp
1641 save %sp, -0x40, %sp
1642 save %sp, -0x40, %sp
1652 /* End of entry.S */