2 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
6 * Linux driver for Brocade Fibre Channel Host Bus Adapter.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License (GPL) Version 2 as
10 * published by the Free Software Foundation
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
25 #define BFA_DBG_FWTRC_ENTS (BFI_IOC_TRC_ENTS)
26 #define BFA_DBG_FWTRC_LEN \
27 (BFA_DBG_FWTRC_ENTS * sizeof(struct bfa_trc_s) + \
28 (sizeof(struct bfa_trc_mod_s) - \
29 BFA_TRC_MAX * sizeof(struct bfa_trc_s)))
31 * BFA timer declarations
33 typedef void (*bfa_timer_cbfn_t
)(void *);
36 * BFA timer data structure
40 bfa_timer_cbfn_t timercb
;
42 int timeout
; /* in millisecs */
46 * Timer module structure
48 struct bfa_timer_mod_s
{
49 struct list_head timer_q
;
52 #define BFA_TIMER_FREQ 200 /* specified in millisecs */
54 void bfa_timer_beat(struct bfa_timer_mod_s
*mod
);
55 void bfa_timer_begin(struct bfa_timer_mod_s
*mod
, struct bfa_timer_s
*timer
,
56 bfa_timer_cbfn_t timercb
, void *arg
,
57 unsigned int timeout
);
58 void bfa_timer_stop(struct bfa_timer_s
*timer
);
61 * Generic Scatter Gather Element used by driver
68 #define bfa_sge_word_swap(__sge) do { \
69 ((u32 *)(__sge))[0] = swab32(((u32 *)(__sge))[0]); \
70 ((u32 *)(__sge))[1] = swab32(((u32 *)(__sge))[1]); \
71 ((u32 *)(__sge))[2] = swab32(((u32 *)(__sge))[2]); \
74 #define bfa_swap_words(_x) ( \
75 ((_x) << 32) | ((_x) >> 32))
78 #define bfa_sge_to_be(_x)
79 #define bfa_sge_to_le(_x) bfa_sge_word_swap(_x)
80 #define bfa_sgaddr_le(_x) bfa_swap_words(_x)
82 #define bfa_sge_to_be(_x) bfa_sge_word_swap(_x)
83 #define bfa_sge_to_le(_x)
84 #define bfa_sgaddr_le(_x) (_x)
88 * PCI device information required by IOC
94 void __iomem
*pci_bar_kva
;
98 * Structure used to remember the DMA-able memory block's KVA and Physical
102 void *kva
; /* ! Kernel virtual address */
103 u64 pa
; /* ! Physical address */
106 #define BFA_DMA_ALIGN_SZ 256
107 #define BFA_ROUNDUP(_l, _s) (((_l) + ((_s) - 1)) & ~((_s) - 1))
110 * smem size for Crossbow and Catapult
112 #define BFI_SMEM_CB_SIZE 0x200000U /* ! 2MB for crossbow */
113 #define BFI_SMEM_CT_SIZE 0x280000U /* ! 2.5MB for catapult */
115 #define bfa_dma_be_addr_set(dma_addr, pa) \
116 __bfa_dma_be_addr_set(&dma_addr, (u64)pa)
118 __bfa_dma_be_addr_set(union bfi_addr_u
*dma_addr
, u64 pa
)
120 dma_addr
->a32
.addr_lo
= cpu_to_be32(pa
);
121 dma_addr
->a32
.addr_hi
= cpu_to_be32(pa
>> 32);
124 #define bfa_alen_set(__alen, __len, __pa) \
125 __bfa_alen_set(__alen, __len, (u64)__pa)
128 __bfa_alen_set(struct bfi_alen_s
*alen
, u32 len
, u64 pa
)
130 alen
->al_len
= cpu_to_be32(len
);
131 bfa_dma_be_addr_set(alen
->al_addr
, pa
);
134 struct bfa_ioc_regs_s
{
135 void __iomem
*hfn_mbox_cmd
;
136 void __iomem
*hfn_mbox
;
137 void __iomem
*lpu_mbox_cmd
;
138 void __iomem
*lpu_mbox
;
139 void __iomem
*lpu_read_stat
;
140 void __iomem
*pss_ctl_reg
;
141 void __iomem
*pss_err_status_reg
;
142 void __iomem
*app_pll_fast_ctl_reg
;
143 void __iomem
*app_pll_slow_ctl_reg
;
144 void __iomem
*ioc_sem_reg
;
145 void __iomem
*ioc_usage_sem_reg
;
146 void __iomem
*ioc_init_sem_reg
;
147 void __iomem
*ioc_usage_reg
;
148 void __iomem
*host_page_num_fn
;
149 void __iomem
*heartbeat
;
150 void __iomem
*ioc_fwstate
;
151 void __iomem
*alt_ioc_fwstate
;
152 void __iomem
*ll_halt
;
153 void __iomem
*alt_ll_halt
;
154 void __iomem
*err_set
;
155 void __iomem
*ioc_fail_sync
;
156 void __iomem
*shirq_isr_next
;
157 void __iomem
*shirq_msk_next
;
158 void __iomem
*smem_page_start
;
162 #define bfa_mem_read(_raddr, _off) swab32(readl(((_raddr) + (_off))))
163 #define bfa_mem_write(_raddr, _off, _val) \
164 writel(swab32((_val)), ((_raddr) + (_off)))
166 * IOC Mailbox structures
168 struct bfa_mbox_cmd_s
{
170 u32 msg
[BFI_IOC_MSGSZ
];
176 typedef void (*bfa_ioc_mbox_mcfunc_t
)(void *cbarg
, struct bfi_mbmsg_s
*m
);
177 struct bfa_ioc_mbox_mod_s
{
178 struct list_head cmd_q
; /* pending mbox queue */
179 int nmclass
; /* number of handlers */
181 bfa_ioc_mbox_mcfunc_t cbfn
; /* message handlers */
183 } mbhdlr
[BFI_MC_MAX
];
187 * IOC callback function interfaces
189 typedef void (*bfa_ioc_enable_cbfn_t
)(void *bfa
, enum bfa_status status
);
190 typedef void (*bfa_ioc_disable_cbfn_t
)(void *bfa
);
191 typedef void (*bfa_ioc_hbfail_cbfn_t
)(void *bfa
);
192 typedef void (*bfa_ioc_reset_cbfn_t
)(void *bfa
);
193 struct bfa_ioc_cbfn_s
{
194 bfa_ioc_enable_cbfn_t enable_cbfn
;
195 bfa_ioc_disable_cbfn_t disable_cbfn
;
196 bfa_ioc_hbfail_cbfn_t hbfail_cbfn
;
197 bfa_ioc_reset_cbfn_t reset_cbfn
;
201 * IOC event notification mechanism.
203 enum bfa_ioc_event_e
{
204 BFA_IOC_E_ENABLED
= 1,
205 BFA_IOC_E_DISABLED
= 2,
206 BFA_IOC_E_FAILED
= 3,
209 typedef void (*bfa_ioc_notify_cbfn_t
)(void *, enum bfa_ioc_event_e
);
211 struct bfa_ioc_notify_s
{
213 bfa_ioc_notify_cbfn_t cbfn
;
218 * Initialize a IOC event notification structure
220 #define bfa_ioc_notify_init(__notify, __cbfn, __cbarg) do { \
221 (__notify)->cbfn = (__cbfn); \
222 (__notify)->cbarg = (__cbarg); \
227 struct bfa_ioc_s
*ioc
;
228 bfa_boolean_t fw_mismatch_notified
;
229 bfa_boolean_t auto_recover
;
236 struct bfa_pcidev_s pcidev
;
237 struct bfa_timer_mod_s
*timer_mod
;
238 struct bfa_timer_s ioc_timer
;
239 struct bfa_timer_s sem_timer
;
240 struct bfa_timer_s hb_timer
;
242 struct list_head notify_q
;
245 bfa_boolean_t dbg_fwsave_once
;
246 enum bfi_pcifn_class clscode
;
247 struct bfa_ioc_regs_s ioc_regs
;
248 struct bfa_trc_mod_s
*trcmod
;
249 struct bfa_ioc_drv_stats_s stats
;
250 bfa_boolean_t fcmode
;
251 bfa_boolean_t pllinit
;
252 bfa_boolean_t stats_busy
; /* outstanding stats */
254 struct bfa_dma_s attr_dma
;
255 struct bfi_ioc_attr_s
*attr
;
256 struct bfa_ioc_cbfn_s
*cbfn
;
257 struct bfa_ioc_mbox_mod_s mbox_mod
;
258 struct bfa_ioc_hwif_s
*ioc_hwif
;
259 struct bfa_iocpf_s iocpf
;
260 enum bfi_asic_gen asic_gen
;
261 enum bfi_asic_mode asic_mode
;
262 enum bfi_port_mode port0_mode
;
263 enum bfi_port_mode port1_mode
;
266 struct bfa_ioc_hwif_s
{
267 bfa_status_t (*ioc_pll_init
) (void __iomem
*rb
, enum bfi_asic_mode m
);
268 bfa_boolean_t (*ioc_firmware_lock
) (struct bfa_ioc_s
*ioc
);
269 void (*ioc_firmware_unlock
) (struct bfa_ioc_s
*ioc
);
270 void (*ioc_reg_init
) (struct bfa_ioc_s
*ioc
);
271 void (*ioc_map_port
) (struct bfa_ioc_s
*ioc
);
272 void (*ioc_isr_mode_set
) (struct bfa_ioc_s
*ioc
,
274 void (*ioc_notify_fail
) (struct bfa_ioc_s
*ioc
);
275 void (*ioc_ownership_reset
) (struct bfa_ioc_s
*ioc
);
276 bfa_boolean_t (*ioc_sync_start
) (struct bfa_ioc_s
*ioc
);
277 void (*ioc_sync_join
) (struct bfa_ioc_s
*ioc
);
278 void (*ioc_sync_leave
) (struct bfa_ioc_s
*ioc
);
279 void (*ioc_sync_ack
) (struct bfa_ioc_s
*ioc
);
280 bfa_boolean_t (*ioc_sync_complete
) (struct bfa_ioc_s
*ioc
);
281 bfa_boolean_t (*ioc_lpu_read_stat
) (struct bfa_ioc_s
*ioc
);
284 #define bfa_ioc_pcifn(__ioc) ((__ioc)->pcidev.pci_func)
285 #define bfa_ioc_devid(__ioc) ((__ioc)->pcidev.device_id)
286 #define bfa_ioc_bar0(__ioc) ((__ioc)->pcidev.pci_bar_kva)
287 #define bfa_ioc_portid(__ioc) ((__ioc)->port_id)
288 #define bfa_ioc_asic_gen(__ioc) ((__ioc)->asic_gen)
289 #define bfa_ioc_is_cna(__ioc) \
290 ((bfa_ioc_get_type(ioc) == BFA_IOC_TYPE_FCoE) || \
291 (bfa_ioc_get_type(ioc) == BFA_IOC_TYPE_LL))
292 #define bfa_ioc_fetch_stats(__ioc, __stats) \
293 (((__stats)->drv_stats) = (__ioc)->stats)
294 #define bfa_ioc_clr_stats(__ioc) \
295 memset(&(__ioc)->stats, 0, sizeof((__ioc)->stats))
296 #define bfa_ioc_maxfrsize(__ioc) ((__ioc)->attr->maxfrsize)
297 #define bfa_ioc_rx_bbcredit(__ioc) ((__ioc)->attr->rx_bbcredit)
298 #define bfa_ioc_speed_sup(__ioc) \
299 BFI_ADAPTER_GETP(SPEED, (__ioc)->attr->adapter_prop)
300 #define bfa_ioc_get_nports(__ioc) \
301 BFI_ADAPTER_GETP(NPORTS, (__ioc)->attr->adapter_prop)
303 #define bfa_ioc_stats(_ioc, _stats) ((_ioc)->stats._stats++)
304 #define BFA_IOC_FWIMG_MINSZ (16 * 1024)
305 #define BFA_IOC_FW_SMEM_SIZE(__ioc) \
306 ((bfa_ioc_asic_gen(__ioc) == BFI_ASIC_GEN_CB) \
307 ? BFI_SMEM_CB_SIZE : BFI_SMEM_CT_SIZE)
308 #define BFA_IOC_FLASH_CHUNK_NO(off) (off / BFI_FLASH_CHUNK_SZ_WORDS)
309 #define BFA_IOC_FLASH_OFFSET_IN_CHUNK(off) (off % BFI_FLASH_CHUNK_SZ_WORDS)
310 #define BFA_IOC_FLASH_CHUNK_ADDR(chunkno) (chunkno * BFI_FLASH_CHUNK_SZ_WORDS)
313 * IOC mailbox interface
315 void bfa_ioc_mbox_queue(struct bfa_ioc_s
*ioc
, struct bfa_mbox_cmd_s
*cmd
);
316 void bfa_ioc_mbox_register(struct bfa_ioc_s
*ioc
,
317 bfa_ioc_mbox_mcfunc_t
*mcfuncs
);
318 void bfa_ioc_mbox_isr(struct bfa_ioc_s
*ioc
);
319 void bfa_ioc_mbox_send(struct bfa_ioc_s
*ioc
, void *ioc_msg
, int len
);
320 bfa_boolean_t
bfa_ioc_msgget(struct bfa_ioc_s
*ioc
, void *mbmsg
);
321 void bfa_ioc_mbox_regisr(struct bfa_ioc_s
*ioc
, enum bfi_mclass mc
,
322 bfa_ioc_mbox_mcfunc_t cbfn
, void *cbarg
);
328 #define bfa_ioc_pll_init_asic(__ioc) \
329 ((__ioc)->ioc_hwif->ioc_pll_init((__ioc)->pcidev.pci_bar_kva, \
332 bfa_status_t
bfa_ioc_pll_init(struct bfa_ioc_s
*ioc
);
333 bfa_status_t
bfa_ioc_cb_pll_init(void __iomem
*rb
, enum bfi_asic_mode mode
);
334 bfa_status_t
bfa_ioc_ct_pll_init(void __iomem
*rb
, enum bfi_asic_mode mode
);
335 bfa_status_t
bfa_ioc_ct2_pll_init(void __iomem
*rb
, enum bfi_asic_mode mode
);
337 #define bfa_ioc_isr_mode_set(__ioc, __msix) do { \
338 if ((__ioc)->ioc_hwif->ioc_isr_mode_set) \
339 ((__ioc)->ioc_hwif->ioc_isr_mode_set(__ioc, __msix)); \
341 #define bfa_ioc_ownership_reset(__ioc) \
342 ((__ioc)->ioc_hwif->ioc_ownership_reset(__ioc))
343 #define bfa_ioc_lpu_read_stat(__ioc) do { \
344 if ((__ioc)->ioc_hwif->ioc_lpu_read_stat) \
345 ((__ioc)->ioc_hwif->ioc_lpu_read_stat(__ioc)); \
348 void bfa_ioc_set_cb_hwif(struct bfa_ioc_s
*ioc
);
349 void bfa_ioc_set_ct_hwif(struct bfa_ioc_s
*ioc
);
350 void bfa_ioc_set_ct2_hwif(struct bfa_ioc_s
*ioc
);
351 void bfa_ioc_ct2_poweron(struct bfa_ioc_s
*ioc
);
353 void bfa_ioc_attach(struct bfa_ioc_s
*ioc
, void *bfa
,
354 struct bfa_ioc_cbfn_s
*cbfn
, struct bfa_timer_mod_s
*timer_mod
);
355 void bfa_ioc_auto_recover(bfa_boolean_t auto_recover
);
356 void bfa_ioc_detach(struct bfa_ioc_s
*ioc
);
357 void bfa_ioc_pci_init(struct bfa_ioc_s
*ioc
, struct bfa_pcidev_s
*pcidev
,
358 enum bfi_pcifn_class clscode
);
359 void bfa_ioc_mem_claim(struct bfa_ioc_s
*ioc
, u8
*dm_kva
, u64 dm_pa
);
360 void bfa_ioc_enable(struct bfa_ioc_s
*ioc
);
361 void bfa_ioc_disable(struct bfa_ioc_s
*ioc
);
362 bfa_boolean_t
bfa_ioc_intx_claim(struct bfa_ioc_s
*ioc
);
364 void bfa_ioc_boot(struct bfa_ioc_s
*ioc
, u32 boot_type
,
366 void bfa_ioc_isr(struct bfa_ioc_s
*ioc
, struct bfi_mbmsg_s
*msg
);
367 void bfa_ioc_error_isr(struct bfa_ioc_s
*ioc
);
368 bfa_boolean_t
bfa_ioc_is_operational(struct bfa_ioc_s
*ioc
);
369 bfa_boolean_t
bfa_ioc_is_initialized(struct bfa_ioc_s
*ioc
);
370 bfa_boolean_t
bfa_ioc_is_disabled(struct bfa_ioc_s
*ioc
);
371 bfa_boolean_t
bfa_ioc_fw_mismatch(struct bfa_ioc_s
*ioc
);
372 bfa_boolean_t
bfa_ioc_adapter_is_disabled(struct bfa_ioc_s
*ioc
);
373 void bfa_ioc_reset_fwstate(struct bfa_ioc_s
*ioc
);
374 enum bfa_ioc_type_e
bfa_ioc_get_type(struct bfa_ioc_s
*ioc
);
375 void bfa_ioc_get_adapter_serial_num(struct bfa_ioc_s
*ioc
, char *serial_num
);
376 void bfa_ioc_get_adapter_fw_ver(struct bfa_ioc_s
*ioc
, char *fw_ver
);
377 void bfa_ioc_get_adapter_optrom_ver(struct bfa_ioc_s
*ioc
, char *optrom_ver
);
378 void bfa_ioc_get_adapter_model(struct bfa_ioc_s
*ioc
, char *model
);
379 void bfa_ioc_get_adapter_manufacturer(struct bfa_ioc_s
*ioc
,
381 void bfa_ioc_get_pci_chip_rev(struct bfa_ioc_s
*ioc
, char *chip_rev
);
382 enum bfa_ioc_state
bfa_ioc_get_state(struct bfa_ioc_s
*ioc
);
384 void bfa_ioc_get_attr(struct bfa_ioc_s
*ioc
, struct bfa_ioc_attr_s
*ioc_attr
);
385 void bfa_ioc_get_adapter_attr(struct bfa_ioc_s
*ioc
,
386 struct bfa_adapter_attr_s
*ad_attr
);
387 void bfa_ioc_debug_memclaim(struct bfa_ioc_s
*ioc
, void *dbg_fwsave
);
388 bfa_status_t
bfa_ioc_debug_fwsave(struct bfa_ioc_s
*ioc
, void *trcdata
,
390 bfa_status_t
bfa_ioc_debug_fwtrc(struct bfa_ioc_s
*ioc
, void *trcdata
,
392 bfa_status_t
bfa_ioc_debug_fwcore(struct bfa_ioc_s
*ioc
, void *buf
,
393 u32
*offset
, int *buflen
);
394 void bfa_ioc_set_fcmode(struct bfa_ioc_s
*ioc
);
395 bfa_boolean_t
bfa_ioc_get_fcmode(struct bfa_ioc_s
*ioc
);
396 bfa_boolean_t
bfa_ioc_sem_get(void __iomem
*sem_reg
);
397 void bfa_ioc_fwver_get(struct bfa_ioc_s
*ioc
,
398 struct bfi_ioc_image_hdr_s
*fwhdr
);
399 bfa_boolean_t
bfa_ioc_fwver_cmp(struct bfa_ioc_s
*ioc
,
400 struct bfi_ioc_image_hdr_s
*fwhdr
);
401 bfa_status_t
bfa_ioc_fw_stats_get(struct bfa_ioc_s
*ioc
, void *stats
);
402 bfa_status_t
bfa_ioc_fw_stats_clear(struct bfa_ioc_s
*ioc
);
405 * bfa mfg wwn API functions
407 mac_t
bfa_ioc_get_mac(struct bfa_ioc_s
*ioc
);
408 mac_t
bfa_ioc_get_mfg_mac(struct bfa_ioc_s
*ioc
);
411 * F/W Image Size & Chunk
413 extern u32 bfi_image_cb_size
;
414 extern u32 bfi_image_ct_size
;
415 extern u32 bfi_image_ct2_size
;
416 extern u32
*bfi_image_cb
;
417 extern u32
*bfi_image_ct
;
418 extern u32
*bfi_image_ct2
;
421 bfi_image_cb_get_chunk(u32 off
)
423 return (u32
*)(bfi_image_cb
+ off
);
427 bfi_image_ct_get_chunk(u32 off
)
429 return (u32
*)(bfi_image_ct
+ off
);
433 bfi_image_ct2_get_chunk(u32 off
)
435 return (u32
*)(bfi_image_ct2
+ off
);
439 bfa_cb_image_get_chunk(enum bfi_asic_gen asic_gen
, u32 off
)
442 case BFI_ASIC_GEN_CB
:
443 return bfi_image_cb_get_chunk(off
);
445 case BFI_ASIC_GEN_CT
:
446 return bfi_image_ct_get_chunk(off
);
448 case BFI_ASIC_GEN_CT2
:
449 return bfi_image_ct2_get_chunk(off
);
457 bfa_cb_image_get_size(enum bfi_asic_gen asic_gen
)
460 case BFI_ASIC_GEN_CB
:
461 return bfi_image_cb_size
;
463 case BFI_ASIC_GEN_CT
:
464 return bfi_image_ct_size
;
466 case BFI_ASIC_GEN_CT2
:
467 return bfi_image_ct2_size
;
475 * CNA TRCMOD declaration
478 * !!! Only append to the enums defined here to avoid any versioning
479 * !!! needed between trace utility and driver version
482 BFA_TRC_CNA_PORT
= 1,
484 BFA_TRC_CNA_IOC_CB
= 3,
485 BFA_TRC_CNA_IOC_CT
= 4,
488 #endif /* __BFA_IOC_H__ */