2 * arch/arm/mach-at91/at91sam9261_devices.c
4 * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
5 * Copyright (C) 2005 David Brownell
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
13 #include <asm/mach/arch.h>
14 #include <asm/mach/map.h>
16 #include <linux/dma-mapping.h>
17 #include <linux/gpio.h>
18 #include <linux/platform_device.h>
19 #include <linux/i2c-gpio.h>
22 #include <video/atmel_lcdc.h>
24 #include <mach/board.h>
25 #include <mach/at91sam9261.h>
26 #include <mach/at91sam9261_matrix.h>
27 #include <mach/at91sam9_smc.h>
32 /* --------------------------------------------------------------------
34 * -------------------------------------------------------------------- */
36 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
37 static u64 ohci_dmamask
= DMA_BIT_MASK(32);
38 static struct at91_usbh_data usbh_data
;
40 static struct resource usbh_resources
[] = {
42 .start
= AT91SAM9261_UHP_BASE
,
43 .end
= AT91SAM9261_UHP_BASE
+ SZ_1M
- 1,
44 .flags
= IORESOURCE_MEM
,
47 .start
= AT91SAM9261_ID_UHP
,
48 .end
= AT91SAM9261_ID_UHP
,
49 .flags
= IORESOURCE_IRQ
,
53 static struct platform_device at91sam9261_usbh_device
= {
57 .dma_mask
= &ohci_dmamask
,
58 .coherent_dma_mask
= DMA_BIT_MASK(32),
59 .platform_data
= &usbh_data
,
61 .resource
= usbh_resources
,
62 .num_resources
= ARRAY_SIZE(usbh_resources
),
65 void __init
at91_add_device_usbh(struct at91_usbh_data
*data
)
72 /* Enable overcurrent notification */
73 for (i
= 0; i
< data
->ports
; i
++) {
74 if (data
->overcurrent_pin
[i
])
75 at91_set_gpio_input(data
->overcurrent_pin
[i
], 1);
79 platform_device_register(&at91sam9261_usbh_device
);
82 void __init
at91_add_device_usbh(struct at91_usbh_data
*data
) {}
86 /* --------------------------------------------------------------------
88 * -------------------------------------------------------------------- */
90 #ifdef CONFIG_USB_GADGET_AT91
91 static struct at91_udc_data udc_data
;
93 static struct resource udc_resources
[] = {
95 .start
= AT91SAM9261_BASE_UDP
,
96 .end
= AT91SAM9261_BASE_UDP
+ SZ_16K
- 1,
97 .flags
= IORESOURCE_MEM
,
100 .start
= AT91SAM9261_ID_UDP
,
101 .end
= AT91SAM9261_ID_UDP
,
102 .flags
= IORESOURCE_IRQ
,
106 static struct platform_device at91sam9261_udc_device
= {
110 .platform_data
= &udc_data
,
112 .resource
= udc_resources
,
113 .num_resources
= ARRAY_SIZE(udc_resources
),
116 void __init
at91_add_device_udc(struct at91_udc_data
*data
)
121 if (data
->vbus_pin
) {
122 at91_set_gpio_input(data
->vbus_pin
, 0);
123 at91_set_deglitch(data
->vbus_pin
, 1);
126 /* Pullup pin is handled internally by USB device peripheral */
129 platform_device_register(&at91sam9261_udc_device
);
132 void __init
at91_add_device_udc(struct at91_udc_data
*data
) {}
135 /* --------------------------------------------------------------------
137 * -------------------------------------------------------------------- */
139 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
140 static u64 mmc_dmamask
= DMA_BIT_MASK(32);
141 static struct at91_mmc_data mmc_data
;
143 static struct resource mmc_resources
[] = {
145 .start
= AT91SAM9261_BASE_MCI
,
146 .end
= AT91SAM9261_BASE_MCI
+ SZ_16K
- 1,
147 .flags
= IORESOURCE_MEM
,
150 .start
= AT91SAM9261_ID_MCI
,
151 .end
= AT91SAM9261_ID_MCI
,
152 .flags
= IORESOURCE_IRQ
,
156 static struct platform_device at91sam9261_mmc_device
= {
160 .dma_mask
= &mmc_dmamask
,
161 .coherent_dma_mask
= DMA_BIT_MASK(32),
162 .platform_data
= &mmc_data
,
164 .resource
= mmc_resources
,
165 .num_resources
= ARRAY_SIZE(mmc_resources
),
168 void __init
at91_add_device_mmc(short mmc_id
, struct at91_mmc_data
*data
)
175 at91_set_gpio_input(data
->det_pin
, 1);
176 at91_set_deglitch(data
->det_pin
, 1);
179 at91_set_gpio_input(data
->wp_pin
, 1);
181 at91_set_gpio_output(data
->vcc_pin
, 0);
184 at91_set_B_periph(AT91_PIN_PA2
, 0);
187 at91_set_B_periph(AT91_PIN_PA1
, 1);
189 /* DAT0, maybe DAT1..DAT3 */
190 at91_set_B_periph(AT91_PIN_PA0
, 1);
192 at91_set_B_periph(AT91_PIN_PA4
, 1);
193 at91_set_B_periph(AT91_PIN_PA5
, 1);
194 at91_set_B_periph(AT91_PIN_PA6
, 1);
198 platform_device_register(&at91sam9261_mmc_device
);
201 void __init
at91_add_device_mmc(short mmc_id
, struct at91_mmc_data
*data
) {}
205 /* --------------------------------------------------------------------
207 * -------------------------------------------------------------------- */
209 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
210 static struct atmel_nand_data nand_data
;
212 #define NAND_BASE AT91_CHIPSELECT_3
214 static struct resource nand_resources
[] = {
217 .end
= NAND_BASE
+ SZ_256M
- 1,
218 .flags
= IORESOURCE_MEM
,
222 static struct platform_device atmel_nand_device
= {
223 .name
= "atmel_nand",
226 .platform_data
= &nand_data
,
228 .resource
= nand_resources
,
229 .num_resources
= ARRAY_SIZE(nand_resources
),
232 void __init
at91_add_device_nand(struct atmel_nand_data
*data
)
239 csa
= at91_sys_read(AT91_MATRIX_EBICSA
);
240 at91_sys_write(AT91_MATRIX_EBICSA
, csa
| AT91_MATRIX_CS3A_SMC_SMARTMEDIA
);
243 if (data
->enable_pin
)
244 at91_set_gpio_output(data
->enable_pin
, 1);
248 at91_set_gpio_input(data
->rdy_pin
, 1);
250 /* card detect pin */
252 at91_set_gpio_input(data
->det_pin
, 1);
254 at91_set_A_periph(AT91_PIN_PC0
, 0); /* NANDOE */
255 at91_set_A_periph(AT91_PIN_PC1
, 0); /* NANDWE */
258 platform_device_register(&atmel_nand_device
);
262 void __init
at91_add_device_nand(struct atmel_nand_data
*data
) {}
266 /* --------------------------------------------------------------------
268 * -------------------------------------------------------------------- */
271 * Prefer the GPIO code since the TWI controller isn't robust
272 * (gets overruns and underruns under load) and can only issue
273 * repeated STARTs in one scenario (the driver doesn't yet handle them).
275 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
277 static struct i2c_gpio_platform_data pdata
= {
278 .sda_pin
= AT91_PIN_PA7
,
279 .sda_is_open_drain
= 1,
280 .scl_pin
= AT91_PIN_PA8
,
281 .scl_is_open_drain
= 1,
282 .udelay
= 2, /* ~100 kHz */
285 static struct platform_device at91sam9261_twi_device
= {
288 .dev
.platform_data
= &pdata
,
291 void __init
at91_add_device_i2c(struct i2c_board_info
*devices
, int nr_devices
)
293 at91_set_GPIO_periph(AT91_PIN_PA7
, 1); /* TWD (SDA) */
294 at91_set_multi_drive(AT91_PIN_PA7
, 1);
296 at91_set_GPIO_periph(AT91_PIN_PA8
, 1); /* TWCK (SCL) */
297 at91_set_multi_drive(AT91_PIN_PA8
, 1);
299 i2c_register_board_info(0, devices
, nr_devices
);
300 platform_device_register(&at91sam9261_twi_device
);
303 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
305 static struct resource twi_resources
[] = {
307 .start
= AT91SAM9261_BASE_TWI
,
308 .end
= AT91SAM9261_BASE_TWI
+ SZ_16K
- 1,
309 .flags
= IORESOURCE_MEM
,
312 .start
= AT91SAM9261_ID_TWI
,
313 .end
= AT91SAM9261_ID_TWI
,
314 .flags
= IORESOURCE_IRQ
,
318 static struct platform_device at91sam9261_twi_device
= {
321 .resource
= twi_resources
,
322 .num_resources
= ARRAY_SIZE(twi_resources
),
325 void __init
at91_add_device_i2c(struct i2c_board_info
*devices
, int nr_devices
)
327 /* pins used for TWI interface */
328 at91_set_A_periph(AT91_PIN_PA7
, 0); /* TWD */
329 at91_set_multi_drive(AT91_PIN_PA7
, 1);
331 at91_set_A_periph(AT91_PIN_PA8
, 0); /* TWCK */
332 at91_set_multi_drive(AT91_PIN_PA8
, 1);
334 i2c_register_board_info(0, devices
, nr_devices
);
335 platform_device_register(&at91sam9261_twi_device
);
338 void __init
at91_add_device_i2c(struct i2c_board_info
*devices
, int nr_devices
) {}
342 /* --------------------------------------------------------------------
344 * -------------------------------------------------------------------- */
346 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
347 static u64 spi_dmamask
= DMA_BIT_MASK(32);
349 static struct resource spi0_resources
[] = {
351 .start
= AT91SAM9261_BASE_SPI0
,
352 .end
= AT91SAM9261_BASE_SPI0
+ SZ_16K
- 1,
353 .flags
= IORESOURCE_MEM
,
356 .start
= AT91SAM9261_ID_SPI0
,
357 .end
= AT91SAM9261_ID_SPI0
,
358 .flags
= IORESOURCE_IRQ
,
362 static struct platform_device at91sam9261_spi0_device
= {
366 .dma_mask
= &spi_dmamask
,
367 .coherent_dma_mask
= DMA_BIT_MASK(32),
369 .resource
= spi0_resources
,
370 .num_resources
= ARRAY_SIZE(spi0_resources
),
373 static const unsigned spi0_standard_cs
[4] = { AT91_PIN_PA3
, AT91_PIN_PA4
, AT91_PIN_PA5
, AT91_PIN_PA6
};
375 static struct resource spi1_resources
[] = {
377 .start
= AT91SAM9261_BASE_SPI1
,
378 .end
= AT91SAM9261_BASE_SPI1
+ SZ_16K
- 1,
379 .flags
= IORESOURCE_MEM
,
382 .start
= AT91SAM9261_ID_SPI1
,
383 .end
= AT91SAM9261_ID_SPI1
,
384 .flags
= IORESOURCE_IRQ
,
388 static struct platform_device at91sam9261_spi1_device
= {
392 .dma_mask
= &spi_dmamask
,
393 .coherent_dma_mask
= DMA_BIT_MASK(32),
395 .resource
= spi1_resources
,
396 .num_resources
= ARRAY_SIZE(spi1_resources
),
399 static const unsigned spi1_standard_cs
[4] = { AT91_PIN_PB28
, AT91_PIN_PA24
, AT91_PIN_PA25
, AT91_PIN_PA26
};
401 void __init
at91_add_device_spi(struct spi_board_info
*devices
, int nr_devices
)
404 unsigned long cs_pin
;
405 short enable_spi0
= 0;
406 short enable_spi1
= 0;
408 /* Choose SPI chip-selects */
409 for (i
= 0; i
< nr_devices
; i
++) {
410 if (devices
[i
].controller_data
)
411 cs_pin
= (unsigned long) devices
[i
].controller_data
;
412 else if (devices
[i
].bus_num
== 0)
413 cs_pin
= spi0_standard_cs
[devices
[i
].chip_select
];
415 cs_pin
= spi1_standard_cs
[devices
[i
].chip_select
];
417 if (devices
[i
].bus_num
== 0)
422 /* enable chip-select pin */
423 at91_set_gpio_output(cs_pin
, 1);
425 /* pass chip-select pin to driver */
426 devices
[i
].controller_data
= (void *) cs_pin
;
429 spi_register_board_info(devices
, nr_devices
);
431 /* Configure SPI bus(es) */
433 at91_set_A_periph(AT91_PIN_PA0
, 0); /* SPI0_MISO */
434 at91_set_A_periph(AT91_PIN_PA1
, 0); /* SPI0_MOSI */
435 at91_set_A_periph(AT91_PIN_PA2
, 0); /* SPI0_SPCK */
437 platform_device_register(&at91sam9261_spi0_device
);
440 at91_set_A_periph(AT91_PIN_PB30
, 0); /* SPI1_MISO */
441 at91_set_A_periph(AT91_PIN_PB31
, 0); /* SPI1_MOSI */
442 at91_set_A_periph(AT91_PIN_PB29
, 0); /* SPI1_SPCK */
444 platform_device_register(&at91sam9261_spi1_device
);
448 void __init
at91_add_device_spi(struct spi_board_info
*devices
, int nr_devices
) {}
452 /* --------------------------------------------------------------------
454 * -------------------------------------------------------------------- */
456 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
457 static u64 lcdc_dmamask
= DMA_BIT_MASK(32);
458 static struct atmel_lcdfb_info lcdc_data
;
460 static struct resource lcdc_resources
[] = {
462 .start
= AT91SAM9261_LCDC_BASE
,
463 .end
= AT91SAM9261_LCDC_BASE
+ SZ_4K
- 1,
464 .flags
= IORESOURCE_MEM
,
467 .start
= AT91SAM9261_ID_LCDC
,
468 .end
= AT91SAM9261_ID_LCDC
,
469 .flags
= IORESOURCE_IRQ
,
471 #if defined(CONFIG_FB_INTSRAM)
473 .start
= AT91SAM9261_SRAM_BASE
,
474 .end
= AT91SAM9261_SRAM_BASE
+ AT91SAM9261_SRAM_SIZE
- 1,
475 .flags
= IORESOURCE_MEM
,
480 static struct platform_device at91_lcdc_device
= {
481 .name
= "atmel_lcdfb",
484 .dma_mask
= &lcdc_dmamask
,
485 .coherent_dma_mask
= DMA_BIT_MASK(32),
486 .platform_data
= &lcdc_data
,
488 .resource
= lcdc_resources
,
489 .num_resources
= ARRAY_SIZE(lcdc_resources
),
492 void __init
at91_add_device_lcdc(struct atmel_lcdfb_info
*data
)
498 #if defined(CONFIG_FB_ATMEL_STN)
499 at91_set_A_periph(AT91_PIN_PB0
, 0); /* LCDVSYNC */
500 at91_set_A_periph(AT91_PIN_PB1
, 0); /* LCDHSYNC */
501 at91_set_A_periph(AT91_PIN_PB2
, 0); /* LCDDOTCK */
502 at91_set_A_periph(AT91_PIN_PB3
, 0); /* LCDDEN */
503 at91_set_A_periph(AT91_PIN_PB4
, 0); /* LCDCC */
504 at91_set_A_periph(AT91_PIN_PB5
, 0); /* LCDD0 */
505 at91_set_A_periph(AT91_PIN_PB6
, 0); /* LCDD1 */
506 at91_set_A_periph(AT91_PIN_PB7
, 0); /* LCDD2 */
507 at91_set_A_periph(AT91_PIN_PB8
, 0); /* LCDD3 */
509 at91_set_A_periph(AT91_PIN_PB1
, 0); /* LCDHSYNC */
510 at91_set_A_periph(AT91_PIN_PB2
, 0); /* LCDDOTCK */
511 at91_set_A_periph(AT91_PIN_PB3
, 0); /* LCDDEN */
512 at91_set_A_periph(AT91_PIN_PB4
, 0); /* LCDCC */
513 at91_set_A_periph(AT91_PIN_PB7
, 0); /* LCDD2 */
514 at91_set_A_periph(AT91_PIN_PB8
, 0); /* LCDD3 */
515 at91_set_A_periph(AT91_PIN_PB9
, 0); /* LCDD4 */
516 at91_set_A_periph(AT91_PIN_PB10
, 0); /* LCDD5 */
517 at91_set_A_periph(AT91_PIN_PB11
, 0); /* LCDD6 */
518 at91_set_A_periph(AT91_PIN_PB12
, 0); /* LCDD7 */
519 at91_set_A_periph(AT91_PIN_PB15
, 0); /* LCDD10 */
520 at91_set_A_periph(AT91_PIN_PB16
, 0); /* LCDD11 */
521 at91_set_A_periph(AT91_PIN_PB17
, 0); /* LCDD12 */
522 at91_set_A_periph(AT91_PIN_PB18
, 0); /* LCDD13 */
523 at91_set_A_periph(AT91_PIN_PB19
, 0); /* LCDD14 */
524 at91_set_A_periph(AT91_PIN_PB20
, 0); /* LCDD15 */
525 at91_set_B_periph(AT91_PIN_PB23
, 0); /* LCDD18 */
526 at91_set_B_periph(AT91_PIN_PB24
, 0); /* LCDD19 */
527 at91_set_B_periph(AT91_PIN_PB25
, 0); /* LCDD20 */
528 at91_set_B_periph(AT91_PIN_PB26
, 0); /* LCDD21 */
529 at91_set_B_periph(AT91_PIN_PB27
, 0); /* LCDD22 */
530 at91_set_B_periph(AT91_PIN_PB28
, 0); /* LCDD23 */
533 if (ARRAY_SIZE(lcdc_resources
) > 2) {
535 struct resource
*fb_res
= &lcdc_resources
[2];
536 size_t fb_len
= resource_size(fb_res
);
538 fb
= ioremap(fb_res
->start
, fb_len
);
540 memset(fb
, 0, fb_len
);
545 platform_device_register(&at91_lcdc_device
);
548 void __init
at91_add_device_lcdc(struct atmel_lcdfb_info
*data
) {}
552 /* --------------------------------------------------------------------
553 * Timer/Counter block
554 * -------------------------------------------------------------------- */
556 #ifdef CONFIG_ATMEL_TCLIB
558 static struct resource tcb_resources
[] = {
560 .start
= AT91SAM9261_BASE_TCB0
,
561 .end
= AT91SAM9261_BASE_TCB0
+ SZ_16K
- 1,
562 .flags
= IORESOURCE_MEM
,
565 .start
= AT91SAM9261_ID_TC0
,
566 .end
= AT91SAM9261_ID_TC0
,
567 .flags
= IORESOURCE_IRQ
,
570 .start
= AT91SAM9261_ID_TC1
,
571 .end
= AT91SAM9261_ID_TC1
,
572 .flags
= IORESOURCE_IRQ
,
575 .start
= AT91SAM9261_ID_TC2
,
576 .end
= AT91SAM9261_ID_TC2
,
577 .flags
= IORESOURCE_IRQ
,
581 static struct platform_device at91sam9261_tcb_device
= {
584 .resource
= tcb_resources
,
585 .num_resources
= ARRAY_SIZE(tcb_resources
),
588 static void __init
at91_add_device_tc(void)
590 platform_device_register(&at91sam9261_tcb_device
);
593 static void __init
at91_add_device_tc(void) { }
597 /* --------------------------------------------------------------------
599 * -------------------------------------------------------------------- */
601 static struct resource rtt_resources
[] = {
603 .start
= AT91_BASE_SYS
+ AT91_RTT
,
604 .end
= AT91_BASE_SYS
+ AT91_RTT
+ SZ_16
- 1,
605 .flags
= IORESOURCE_MEM
,
609 static struct platform_device at91sam9261_rtt_device
= {
612 .resource
= rtt_resources
,
613 .num_resources
= ARRAY_SIZE(rtt_resources
),
616 static void __init
at91_add_device_rtt(void)
618 platform_device_register(&at91sam9261_rtt_device
);
622 /* --------------------------------------------------------------------
624 * -------------------------------------------------------------------- */
626 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
627 static struct platform_device at91sam9261_wdt_device
= {
633 static void __init
at91_add_device_watchdog(void)
635 platform_device_register(&at91sam9261_wdt_device
);
638 static void __init
at91_add_device_watchdog(void) {}
642 /* --------------------------------------------------------------------
643 * SSC -- Synchronous Serial Controller
644 * -------------------------------------------------------------------- */
646 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
647 static u64 ssc0_dmamask
= DMA_BIT_MASK(32);
649 static struct resource ssc0_resources
[] = {
651 .start
= AT91SAM9261_BASE_SSC0
,
652 .end
= AT91SAM9261_BASE_SSC0
+ SZ_16K
- 1,
653 .flags
= IORESOURCE_MEM
,
656 .start
= AT91SAM9261_ID_SSC0
,
657 .end
= AT91SAM9261_ID_SSC0
,
658 .flags
= IORESOURCE_IRQ
,
662 static struct platform_device at91sam9261_ssc0_device
= {
666 .dma_mask
= &ssc0_dmamask
,
667 .coherent_dma_mask
= DMA_BIT_MASK(32),
669 .resource
= ssc0_resources
,
670 .num_resources
= ARRAY_SIZE(ssc0_resources
),
673 static inline void configure_ssc0_pins(unsigned pins
)
675 if (pins
& ATMEL_SSC_TF
)
676 at91_set_A_periph(AT91_PIN_PB21
, 1);
677 if (pins
& ATMEL_SSC_TK
)
678 at91_set_A_periph(AT91_PIN_PB22
, 1);
679 if (pins
& ATMEL_SSC_TD
)
680 at91_set_A_periph(AT91_PIN_PB23
, 1);
681 if (pins
& ATMEL_SSC_RD
)
682 at91_set_A_periph(AT91_PIN_PB24
, 1);
683 if (pins
& ATMEL_SSC_RK
)
684 at91_set_A_periph(AT91_PIN_PB25
, 1);
685 if (pins
& ATMEL_SSC_RF
)
686 at91_set_A_periph(AT91_PIN_PB26
, 1);
689 static u64 ssc1_dmamask
= DMA_BIT_MASK(32);
691 static struct resource ssc1_resources
[] = {
693 .start
= AT91SAM9261_BASE_SSC1
,
694 .end
= AT91SAM9261_BASE_SSC1
+ SZ_16K
- 1,
695 .flags
= IORESOURCE_MEM
,
698 .start
= AT91SAM9261_ID_SSC1
,
699 .end
= AT91SAM9261_ID_SSC1
,
700 .flags
= IORESOURCE_IRQ
,
704 static struct platform_device at91sam9261_ssc1_device
= {
708 .dma_mask
= &ssc1_dmamask
,
709 .coherent_dma_mask
= DMA_BIT_MASK(32),
711 .resource
= ssc1_resources
,
712 .num_resources
= ARRAY_SIZE(ssc1_resources
),
715 static inline void configure_ssc1_pins(unsigned pins
)
717 if (pins
& ATMEL_SSC_TF
)
718 at91_set_B_periph(AT91_PIN_PA17
, 1);
719 if (pins
& ATMEL_SSC_TK
)
720 at91_set_B_periph(AT91_PIN_PA18
, 1);
721 if (pins
& ATMEL_SSC_TD
)
722 at91_set_B_periph(AT91_PIN_PA19
, 1);
723 if (pins
& ATMEL_SSC_RD
)
724 at91_set_B_periph(AT91_PIN_PA20
, 1);
725 if (pins
& ATMEL_SSC_RK
)
726 at91_set_B_periph(AT91_PIN_PA21
, 1);
727 if (pins
& ATMEL_SSC_RF
)
728 at91_set_B_periph(AT91_PIN_PA22
, 1);
731 static u64 ssc2_dmamask
= DMA_BIT_MASK(32);
733 static struct resource ssc2_resources
[] = {
735 .start
= AT91SAM9261_BASE_SSC2
,
736 .end
= AT91SAM9261_BASE_SSC2
+ SZ_16K
- 1,
737 .flags
= IORESOURCE_MEM
,
740 .start
= AT91SAM9261_ID_SSC2
,
741 .end
= AT91SAM9261_ID_SSC2
,
742 .flags
= IORESOURCE_IRQ
,
746 static struct platform_device at91sam9261_ssc2_device
= {
750 .dma_mask
= &ssc2_dmamask
,
751 .coherent_dma_mask
= DMA_BIT_MASK(32),
753 .resource
= ssc2_resources
,
754 .num_resources
= ARRAY_SIZE(ssc2_resources
),
757 static inline void configure_ssc2_pins(unsigned pins
)
759 if (pins
& ATMEL_SSC_TF
)
760 at91_set_B_periph(AT91_PIN_PC25
, 1);
761 if (pins
& ATMEL_SSC_TK
)
762 at91_set_B_periph(AT91_PIN_PC26
, 1);
763 if (pins
& ATMEL_SSC_TD
)
764 at91_set_B_periph(AT91_PIN_PC27
, 1);
765 if (pins
& ATMEL_SSC_RD
)
766 at91_set_B_periph(AT91_PIN_PC28
, 1);
767 if (pins
& ATMEL_SSC_RK
)
768 at91_set_B_periph(AT91_PIN_PC29
, 1);
769 if (pins
& ATMEL_SSC_RF
)
770 at91_set_B_periph(AT91_PIN_PC30
, 1);
774 * SSC controllers are accessed through library code, instead of any
775 * kind of all-singing/all-dancing driver. For example one could be
776 * used by a particular I2S audio codec's driver, while another one
777 * on the same system might be used by a custom data capture driver.
779 void __init
at91_add_device_ssc(unsigned id
, unsigned pins
)
781 struct platform_device
*pdev
;
784 * NOTE: caller is responsible for passing information matching
785 * "pins" to whatever will be using each particular controller.
788 case AT91SAM9261_ID_SSC0
:
789 pdev
= &at91sam9261_ssc0_device
;
790 configure_ssc0_pins(pins
);
792 case AT91SAM9261_ID_SSC1
:
793 pdev
= &at91sam9261_ssc1_device
;
794 configure_ssc1_pins(pins
);
796 case AT91SAM9261_ID_SSC2
:
797 pdev
= &at91sam9261_ssc2_device
;
798 configure_ssc2_pins(pins
);
804 platform_device_register(pdev
);
808 void __init
at91_add_device_ssc(unsigned id
, unsigned pins
) {}
812 /* --------------------------------------------------------------------
814 * -------------------------------------------------------------------- */
816 #if defined(CONFIG_SERIAL_ATMEL)
817 static struct resource dbgu_resources
[] = {
819 .start
= AT91_VA_BASE_SYS
+ AT91_DBGU
,
820 .end
= AT91_VA_BASE_SYS
+ AT91_DBGU
+ SZ_512
- 1,
821 .flags
= IORESOURCE_MEM
,
824 .start
= AT91_ID_SYS
,
826 .flags
= IORESOURCE_IRQ
,
830 static struct atmel_uart_data dbgu_data
= {
832 .use_dma_rx
= 0, /* DBGU not capable of receive DMA */
833 .regs
= (void __iomem
*)(AT91_VA_BASE_SYS
+ AT91_DBGU
),
836 static u64 dbgu_dmamask
= DMA_BIT_MASK(32);
838 static struct platform_device at91sam9261_dbgu_device
= {
839 .name
= "atmel_usart",
842 .dma_mask
= &dbgu_dmamask
,
843 .coherent_dma_mask
= DMA_BIT_MASK(32),
844 .platform_data
= &dbgu_data
,
846 .resource
= dbgu_resources
,
847 .num_resources
= ARRAY_SIZE(dbgu_resources
),
850 static inline void configure_dbgu_pins(void)
852 at91_set_A_periph(AT91_PIN_PA9
, 0); /* DRXD */
853 at91_set_A_periph(AT91_PIN_PA10
, 1); /* DTXD */
856 static struct resource uart0_resources
[] = {
858 .start
= AT91SAM9261_BASE_US0
,
859 .end
= AT91SAM9261_BASE_US0
+ SZ_16K
- 1,
860 .flags
= IORESOURCE_MEM
,
863 .start
= AT91SAM9261_ID_US0
,
864 .end
= AT91SAM9261_ID_US0
,
865 .flags
= IORESOURCE_IRQ
,
869 static struct atmel_uart_data uart0_data
= {
874 static u64 uart0_dmamask
= DMA_BIT_MASK(32);
876 static struct platform_device at91sam9261_uart0_device
= {
877 .name
= "atmel_usart",
880 .dma_mask
= &uart0_dmamask
,
881 .coherent_dma_mask
= DMA_BIT_MASK(32),
882 .platform_data
= &uart0_data
,
884 .resource
= uart0_resources
,
885 .num_resources
= ARRAY_SIZE(uart0_resources
),
888 static inline void configure_usart0_pins(unsigned pins
)
890 at91_set_A_periph(AT91_PIN_PC8
, 1); /* TXD0 */
891 at91_set_A_periph(AT91_PIN_PC9
, 0); /* RXD0 */
893 if (pins
& ATMEL_UART_RTS
)
894 at91_set_A_periph(AT91_PIN_PC10
, 0); /* RTS0 */
895 if (pins
& ATMEL_UART_CTS
)
896 at91_set_A_periph(AT91_PIN_PC11
, 0); /* CTS0 */
899 static struct resource uart1_resources
[] = {
901 .start
= AT91SAM9261_BASE_US1
,
902 .end
= AT91SAM9261_BASE_US1
+ SZ_16K
- 1,
903 .flags
= IORESOURCE_MEM
,
906 .start
= AT91SAM9261_ID_US1
,
907 .end
= AT91SAM9261_ID_US1
,
908 .flags
= IORESOURCE_IRQ
,
912 static struct atmel_uart_data uart1_data
= {
917 static u64 uart1_dmamask
= DMA_BIT_MASK(32);
919 static struct platform_device at91sam9261_uart1_device
= {
920 .name
= "atmel_usart",
923 .dma_mask
= &uart1_dmamask
,
924 .coherent_dma_mask
= DMA_BIT_MASK(32),
925 .platform_data
= &uart1_data
,
927 .resource
= uart1_resources
,
928 .num_resources
= ARRAY_SIZE(uart1_resources
),
931 static inline void configure_usart1_pins(unsigned pins
)
933 at91_set_A_periph(AT91_PIN_PC12
, 1); /* TXD1 */
934 at91_set_A_periph(AT91_PIN_PC13
, 0); /* RXD1 */
936 if (pins
& ATMEL_UART_RTS
)
937 at91_set_B_periph(AT91_PIN_PA12
, 0); /* RTS1 */
938 if (pins
& ATMEL_UART_CTS
)
939 at91_set_B_periph(AT91_PIN_PA13
, 0); /* CTS1 */
942 static struct resource uart2_resources
[] = {
944 .start
= AT91SAM9261_BASE_US2
,
945 .end
= AT91SAM9261_BASE_US2
+ SZ_16K
- 1,
946 .flags
= IORESOURCE_MEM
,
949 .start
= AT91SAM9261_ID_US2
,
950 .end
= AT91SAM9261_ID_US2
,
951 .flags
= IORESOURCE_IRQ
,
955 static struct atmel_uart_data uart2_data
= {
960 static u64 uart2_dmamask
= DMA_BIT_MASK(32);
962 static struct platform_device at91sam9261_uart2_device
= {
963 .name
= "atmel_usart",
966 .dma_mask
= &uart2_dmamask
,
967 .coherent_dma_mask
= DMA_BIT_MASK(32),
968 .platform_data
= &uart2_data
,
970 .resource
= uart2_resources
,
971 .num_resources
= ARRAY_SIZE(uart2_resources
),
974 static inline void configure_usart2_pins(unsigned pins
)
976 at91_set_A_periph(AT91_PIN_PC15
, 0); /* RXD2 */
977 at91_set_A_periph(AT91_PIN_PC14
, 1); /* TXD2 */
979 if (pins
& ATMEL_UART_RTS
)
980 at91_set_B_periph(AT91_PIN_PA15
, 0); /* RTS2*/
981 if (pins
& ATMEL_UART_CTS
)
982 at91_set_B_periph(AT91_PIN_PA16
, 0); /* CTS2 */
985 static struct platform_device
*__initdata at91_uarts
[ATMEL_MAX_UART
]; /* the UARTs to use */
986 struct platform_device
*atmel_default_console_device
; /* the serial console device */
988 void __init
at91_register_uart(unsigned id
, unsigned portnr
, unsigned pins
)
990 struct platform_device
*pdev
;
991 struct atmel_uart_data
*pdata
;
995 pdev
= &at91sam9261_dbgu_device
;
996 configure_dbgu_pins();
998 case AT91SAM9261_ID_US0
:
999 pdev
= &at91sam9261_uart0_device
;
1000 configure_usart0_pins(pins
);
1002 case AT91SAM9261_ID_US1
:
1003 pdev
= &at91sam9261_uart1_device
;
1004 configure_usart1_pins(pins
);
1006 case AT91SAM9261_ID_US2
:
1007 pdev
= &at91sam9261_uart2_device
;
1008 configure_usart2_pins(pins
);
1013 pdata
= pdev
->dev
.platform_data
;
1014 pdata
->num
= portnr
; /* update to mapped ID */
1016 if (portnr
< ATMEL_MAX_UART
)
1017 at91_uarts
[portnr
] = pdev
;
1020 void __init
at91_set_serial_console(unsigned portnr
)
1022 if (portnr
< ATMEL_MAX_UART
) {
1023 atmel_default_console_device
= at91_uarts
[portnr
];
1024 at91sam9261_set_console_clock(at91_uarts
[portnr
]->id
);
1028 void __init
at91_add_device_serial(void)
1032 for (i
= 0; i
< ATMEL_MAX_UART
; i
++) {
1034 platform_device_register(at91_uarts
[i
]);
1037 if (!atmel_default_console_device
)
1038 printk(KERN_INFO
"AT91: No default serial console defined.\n");
1041 void __init
at91_register_uart(unsigned id
, unsigned portnr
, unsigned pins
) {}
1042 void __init
at91_set_serial_console(unsigned portnr
) {}
1043 void __init
at91_add_device_serial(void) {}
1047 /* -------------------------------------------------------------------- */
1050 * These devices are always present and don't need any board-specific
1053 static int __init
at91_add_standard_devices(void)
1055 at91_add_device_rtt();
1056 at91_add_device_watchdog();
1057 at91_add_device_tc();
1061 arch_initcall(at91_add_standard_devices
);