MIPS: Yosemite, Emma: Fix off-by-two in arcs_cmdline buffer size check
[linux-2.6/linux-mips.git] / arch / arm / mach-s3c64xx / irq.c
blobb07357e94958e53ea2b2d8b8cb0e3286bd149203
1 /* arch/arm/plat-s3c64xx/irq.c
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
8 * S3C64XX - Interrupt handling
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/kernel.h>
16 #include <linux/interrupt.h>
17 #include <linux/serial_core.h>
18 #include <linux/irq.h>
19 #include <linux/io.h>
21 #include <asm/hardware/vic.h>
23 #include <mach/map.h>
24 #include <plat/irq-vic-timer.h>
25 #include <plat/irq-uart.h>
26 #include <plat/cpu.h>
28 /* setup the sources the vic should advertise resume for, even though it
29 * is not doing the wake (set_irq_wake needs to be valid) */
30 #define IRQ_VIC0_RESUME (1 << (IRQ_RTC_TIC - IRQ_VIC0_BASE))
31 #define IRQ_VIC1_RESUME (1 << (IRQ_RTC_ALARM - IRQ_VIC1_BASE) | \
32 1 << (IRQ_PENDN - IRQ_VIC1_BASE) | \
33 1 << (IRQ_HSMMC0 - IRQ_VIC1_BASE) | \
34 1 << (IRQ_HSMMC1 - IRQ_VIC1_BASE) | \
35 1 << (IRQ_HSMMC2 - IRQ_VIC1_BASE))
37 void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
39 printk(KERN_DEBUG "%s: initialising interrupts\n", __func__);
41 /* initialise the pair of VICs */
42 vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, IRQ_VIC0_RESUME);
43 vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, IRQ_VIC1_RESUME);
45 /* add the timer sub-irqs */
46 s3c_init_vic_timer_irq(5, IRQ_TIMER0);