MIPS: Yosemite, Emma: Fix off-by-two in arcs_cmdline buffer size check
[linux-2.6/linux-mips.git] / arch / arm / mach-s3c64xx / setup-ide.c
blob41b425602d8832ac0d71ea7a26abeef726ebac50
1 /* linux/arch/arm/mach-s3c64xx/setup-ide.c
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
6 * S3C64XX setup information for IDE
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/kernel.h>
14 #include <linux/gpio.h>
15 #include <linux/io.h>
17 #include <mach/map.h>
18 #include <mach/regs-clock.h>
19 #include <plat/gpio-cfg.h>
20 #include <plat/ata.h>
22 void s3c64xx_ide_setup_gpio(void)
24 u32 reg;
26 reg = readl(S3C_MEM_SYS_CFG) & (~0x3f);
28 /* Independent CF interface, CF chip select configuration */
29 writel(reg | MEM_SYS_CFG_INDEP_CF |
30 MEM_SYS_CFG_EBI_FIX_PRI_CFCON, S3C_MEM_SYS_CFG);
32 s3c_gpio_cfgpin(S3C64XX_GPB(4), S3C_GPIO_SFN(4));
34 /* Set XhiDATA[15:0] pins as CF Data[15:0] */
35 s3c_gpio_cfgpin_range(S3C64XX_GPK(0), 16, S3C_GPIO_SFN(5));
37 /* Set XhiADDR[2:0] pins as CF ADDR[2:0] */
38 s3c_gpio_cfgpin_range(S3C64XX_GPL(0), 3, S3C_GPIO_SFN(6));
40 /* Set Xhi ctrl pins as CF ctrl pins(IORDY, IOWR, IORD, CE[0:1]) */
41 s3c_gpio_cfgpin(S3C64XX_GPM(5), S3C_GPIO_SFN(1));
42 s3c_gpio_cfgpin_range(S3C64XX_GPM(0), 5, S3C_GPIO_SFN(6));