4 * Copyright (C) 2010 Magnus Damm
5 * Copyright (C) 2008 Yoshihiro Shimoda
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/interrupt.h>
23 #include <linux/irq.h>
24 #include <linux/platform_device.h>
25 #include <linux/delay.h>
26 #include <linux/mtd/mtd.h>
27 #include <linux/mtd/partitions.h>
28 #include <linux/mtd/physmap.h>
29 #include <linux/usb/r8a66597.h>
31 #include <linux/input.h>
32 #include <linux/input/sh_keysc.h>
33 #include <linux/mmc/host.h>
34 #include <linux/mmc/sh_mobile_sdhi.h>
35 #include <linux/gpio.h>
36 #include <linux/dma-mapping.h>
37 #include <mach/sh7377.h>
38 #include <mach/common.h>
39 #include <asm/mach-types.h>
40 #include <asm/mach/arch.h>
41 #include <asm/mach/map.h>
42 #include <asm/mach/time.h>
47 * SDHI0 : card detection is possible
48 * SDHI1 : card detection is impossible
51 * JP74 : short # DBG_2V8A for SDHI0
52 * JP75 : NC # DBG_3V3A for SDHI0
53 * JP76 : NC # DBG_3V3A_SD for SDHI0
54 * JP77 : NC # 3V3A_SDIO for SDHI1
55 * JP78 : short # DBG_2V8A for SDHI1
56 * JP79 : NC # DBG_3V3A for SDHI1
57 * JP80 : NC # DBG_3V3A_SD for SDHI1
60 * S32 : all off # to dissever from G3-CORE_DBG board
61 * S33 : all off # to dissever from G3-CORE_DBG board
64 * S1 : all off # to dissever from G3-CORE_DBG board
65 * S3 : all off # to dissever from G3-CORE_DBG board
66 * S4 : all off # to dissever from G3-CORE_DBG board
69 static struct mtd_partition nor_flash_partitions
[] = {
77 .offset
= MTDPART_OFS_APPEND
,
82 .offset
= MTDPART_OFS_APPEND
,
83 .size
= 8 * 1024 * 1024,
84 .mask_flags
= MTD_WRITEABLE
,
88 .offset
= MTDPART_OFS_APPEND
,
89 .size
= 8 * 1024 * 1024,
93 .offset
= MTDPART_OFS_APPEND
,
94 .size
= MTDPART_SIZ_FULL
,
98 static struct physmap_flash_data nor_flash_data
= {
100 .parts
= nor_flash_partitions
,
101 .nr_parts
= ARRAY_SIZE(nor_flash_partitions
),
104 static struct resource nor_flash_resources
[] = {
107 .end
= 0x08000000 - 1,
108 .flags
= IORESOURCE_MEM
,
112 static struct platform_device nor_flash_device
= {
113 .name
= "physmap-flash",
115 .platform_data
= &nor_flash_data
,
117 .num_resources
= ARRAY_SIZE(nor_flash_resources
),
118 .resource
= nor_flash_resources
,
122 static void usb_host_port_power(int port
, int power
)
124 if (!power
) /* only power-on supported for now */
127 /* set VBOUT/PWEN and EXTLP0 in DVSTCTR */
128 __raw_writew(__raw_readw(0xe6890008) | 0x600, 0xe6890008);
131 static struct r8a66597_platdata usb_host_data
= {
133 .port_power
= usb_host_port_power
,
136 static struct resource usb_host_resources
[] = {
141 .flags
= IORESOURCE_MEM
,
144 .start
= evt2irq(0x0a20), /* USBHS_USHI0 */
145 .flags
= IORESOURCE_IRQ
,
149 static struct platform_device usb_host_device
= {
150 .name
= "r8a66597_hcd",
153 .platform_data
= &usb_host_data
,
155 .coherent_dma_mask
= 0xffffffff,
157 .num_resources
= ARRAY_SIZE(usb_host_resources
),
158 .resource
= usb_host_resources
,
162 static struct sh_keysc_info keysc_info
= {
163 .mode
= SH_KEYSC_MODE_5
,
167 KEY_A
, KEY_B
, KEY_C
, KEY_D
, KEY_E
, KEY_F
,
168 KEY_G
, KEY_H
, KEY_I
, KEY_J
, KEY_K
, KEY_L
,
169 KEY_M
, KEY_N
, KEY_U
, KEY_P
, KEY_Q
, KEY_R
,
170 KEY_S
, KEY_T
, KEY_U
, KEY_V
, KEY_W
, KEY_X
,
171 KEY_Y
, KEY_Z
, KEY_HOME
, KEY_SLEEP
, KEY_WAKEUP
, KEY_COFFEE
,
172 KEY_0
, KEY_1
, KEY_2
, KEY_3
, KEY_4
, KEY_5
,
173 KEY_6
, KEY_7
, KEY_8
, KEY_9
, KEY_STOP
, KEY_COMPUTER
,
177 static struct resource keysc_resources
[] = {
182 .flags
= IORESOURCE_MEM
,
185 .start
= evt2irq(0x0be0), /* KEYSC_KEY */
186 .flags
= IORESOURCE_IRQ
,
190 static struct platform_device keysc_device
= {
192 .id
= 0, /* keysc0 clock */
193 .num_resources
= ARRAY_SIZE(keysc_resources
),
194 .resource
= keysc_resources
,
196 .platform_data
= &keysc_info
,
201 static struct sh_mobile_sdhi_info sdhi0_info
= {
202 .tmio_caps
= MMC_CAP_SDIO_IRQ
,
205 static struct resource sdhi0_resources
[] = {
210 .flags
= IORESOURCE_MEM
,
213 .start
= evt2irq(0x0e00), /* SDHI0 */
214 .flags
= IORESOURCE_IRQ
,
218 static struct platform_device sdhi0_device
= {
219 .name
= "sh_mobile_sdhi",
220 .num_resources
= ARRAY_SIZE(sdhi0_resources
),
221 .resource
= sdhi0_resources
,
224 .platform_data
= &sdhi0_info
,
228 static struct sh_mobile_sdhi_info sdhi1_info
= {
229 .tmio_caps
= MMC_CAP_NONREMOVABLE
| MMC_CAP_SDIO_IRQ
,
232 static struct resource sdhi1_resources
[] = {
237 .flags
= IORESOURCE_MEM
,
240 .start
= evt2irq(0x0e80), /* SDHI1 */
241 .flags
= IORESOURCE_IRQ
,
245 static struct platform_device sdhi1_device
= {
246 .name
= "sh_mobile_sdhi",
247 .num_resources
= ARRAY_SIZE(sdhi1_resources
),
248 .resource
= sdhi1_resources
,
251 .platform_data
= &sdhi1_info
,
255 static struct platform_device
*g4evm_devices
[] __initdata
= {
263 static struct map_desc g4evm_io_desc
[] __initdata
= {
264 /* create a 1:1 entity map for 0xe6xxxxxx
265 * used by CPGA, INTC and PFC.
268 .virtual = 0xe6000000,
269 .pfn
= __phys_to_pfn(0xe6000000),
271 .type
= MT_DEVICE_NONSHARED
275 static void __init
g4evm_map_io(void)
277 iotable_init(g4evm_io_desc
, ARRAY_SIZE(g4evm_io_desc
));
278 /* DMA memory at 0xf6000000 - 0xffdfffff */
279 init_consistent_dma_size(158 << 20);
281 /* setup early devices and console here as well */
282 sh7377_add_early_devices();
283 shmobile_setup_console();
286 #define GPIO_SDHID0_D0 0xe60520fc
287 #define GPIO_SDHID0_D1 0xe60520fd
288 #define GPIO_SDHID0_D2 0xe60520fe
289 #define GPIO_SDHID0_D3 0xe60520ff
290 #define GPIO_SDHICMD0 0xe6052100
292 #define GPIO_SDHID1_D0 0xe6052103
293 #define GPIO_SDHID1_D1 0xe6052104
294 #define GPIO_SDHID1_D2 0xe6052105
295 #define GPIO_SDHID1_D3 0xe6052106
296 #define GPIO_SDHICMD1 0xe6052107
301 * gpio_pull_up is quick_hack.
303 * current gpio frame work doesn't have
304 * the method to control only pull up/down/free.
305 * this function should be replaced by correct gpio function
307 static void __init
gpio_pull_up(u32 addr
)
309 u8 data
= __raw_readb(addr
);
313 __raw_writeb(data
, addr
);
316 static void __init
g4evm_init(void)
318 sh7377_pinmux_init();
321 gpio_request(GPIO_PORT109
, NULL
);
322 gpio_direction_output(GPIO_PORT109
, 1);
323 gpio_export(GPIO_PORT109
, 1);
326 gpio_request(GPIO_PORT110
, NULL
);
327 gpio_direction_output(GPIO_PORT110
, 1);
328 gpio_export(GPIO_PORT110
, 1);
331 gpio_request(GPIO_PORT112
, NULL
);
332 gpio_direction_output(GPIO_PORT112
, 1);
333 gpio_export(GPIO_PORT112
, 1);
336 gpio_request(GPIO_PORT113
, NULL
);
337 gpio_direction_output(GPIO_PORT113
, 1);
338 gpio_export(GPIO_PORT113
, 1);
341 gpio_request(GPIO_FN_VBUS_0
, NULL
);
342 gpio_request(GPIO_FN_PWEN
, NULL
);
343 gpio_request(GPIO_FN_OVCN
, NULL
);
344 gpio_request(GPIO_FN_OVCN2
, NULL
);
345 gpio_request(GPIO_FN_EXTLP
, NULL
);
346 gpio_request(GPIO_FN_IDIN
, NULL
);
349 __raw_writew(0x0200, 0xe605810a); /* USBCR1 */
350 __raw_writew(0x00e0, 0xe60581c0); /* CPFCH */
351 __raw_writew(0x6010, 0xe60581c6); /* CGPOSR */
352 __raw_writew(0x8a0a, 0xe605810c); /* USBCR2 */
355 gpio_request(GPIO_FN_PORT60_KEYOUT5
, NULL
);
356 gpio_request(GPIO_FN_PORT61_KEYOUT4
, NULL
);
357 gpio_request(GPIO_FN_PORT62_KEYOUT3
, NULL
);
358 gpio_request(GPIO_FN_PORT63_KEYOUT2
, NULL
);
359 gpio_request(GPIO_FN_PORT64_KEYOUT1
, NULL
);
360 gpio_request(GPIO_FN_PORT65_KEYOUT0
, NULL
);
361 gpio_request(GPIO_FN_PORT66_KEYIN0_PU
, NULL
);
362 gpio_request(GPIO_FN_PORT67_KEYIN1_PU
, NULL
);
363 gpio_request(GPIO_FN_PORT68_KEYIN2_PU
, NULL
);
364 gpio_request(GPIO_FN_PORT69_KEYIN3_PU
, NULL
);
365 gpio_request(GPIO_FN_PORT70_KEYIN4_PU
, NULL
);
366 gpio_request(GPIO_FN_PORT71_KEYIN5_PU
, NULL
);
367 gpio_request(GPIO_FN_PORT72_KEYIN6_PU
, NULL
);
370 gpio_request(GPIO_FN_SDHICLK0
, NULL
);
371 gpio_request(GPIO_FN_SDHICD0
, NULL
);
372 gpio_request(GPIO_FN_SDHID0_0
, NULL
);
373 gpio_request(GPIO_FN_SDHID0_1
, NULL
);
374 gpio_request(GPIO_FN_SDHID0_2
, NULL
);
375 gpio_request(GPIO_FN_SDHID0_3
, NULL
);
376 gpio_request(GPIO_FN_SDHICMD0
, NULL
);
377 gpio_request(GPIO_FN_SDHIWP0
, NULL
);
378 gpio_pull_up(GPIO_SDHID0_D0
);
379 gpio_pull_up(GPIO_SDHID0_D1
);
380 gpio_pull_up(GPIO_SDHID0_D2
);
381 gpio_pull_up(GPIO_SDHID0_D3
);
382 gpio_pull_up(GPIO_SDHICMD0
);
385 gpio_request(GPIO_FN_SDHICLK1
, NULL
);
386 gpio_request(GPIO_FN_SDHID1_0
, NULL
);
387 gpio_request(GPIO_FN_SDHID1_1
, NULL
);
388 gpio_request(GPIO_FN_SDHID1_2
, NULL
);
389 gpio_request(GPIO_FN_SDHID1_3
, NULL
);
390 gpio_request(GPIO_FN_SDHICMD1
, NULL
);
391 gpio_pull_up(GPIO_SDHID1_D0
);
392 gpio_pull_up(GPIO_SDHID1_D1
);
393 gpio_pull_up(GPIO_SDHID1_D2
);
394 gpio_pull_up(GPIO_SDHID1_D3
);
395 gpio_pull_up(GPIO_SDHICMD1
);
397 sh7377_add_standard_devices();
399 platform_add_devices(g4evm_devices
, ARRAY_SIZE(g4evm_devices
));
402 static void __init
g4evm_timer_init(void)
405 shmobile_timer
.init();
408 static struct sys_timer g4evm_timer
= {
409 .init
= g4evm_timer_init
,
412 MACHINE_START(G4EVM
, "g4evm")
413 .map_io
= g4evm_map_io
,
414 .init_irq
= sh7377_init_irq
,
415 .handle_irq
= shmobile_handle_irq_intc
,
416 .init_machine
= g4evm_init
,
417 .timer
= &g4evm_timer
,