MIPS: Yosemite, Emma: Fix off-by-two in arcs_cmdline buffer size check
[linux-2.6/linux-mips.git] / arch / arm / mach-w90x900 / irq.c
blob7bf143c443f15c27ec30f079b9864304db8ae881
1 /*
2 * linux/arch/arm/mach-w90x900/irq.c
4 * based on linux/arch/arm/plat-s3c24xx/irq.c by Ben Dooks
6 * Copyright (c) 2008 Nuvoton technology corporation
7 * All rights reserved.
9 * Wan ZongShun <mcuos.com@gmail.com>
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation;version 2 of the License.
17 #include <linux/init.h>
18 #include <linux/module.h>
19 #include <linux/interrupt.h>
20 #include <linux/ioport.h>
21 #include <linux/ptrace.h>
22 #include <linux/sysdev.h>
23 #include <linux/io.h>
25 #include <asm/irq.h>
26 #include <asm/mach/irq.h>
28 #include <mach/hardware.h>
29 #include <mach/regs-irq.h>
31 struct group_irq {
32 unsigned long gpen;
33 unsigned int enabled;
34 void (*enable)(struct group_irq *, int enable);
37 static DEFINE_SPINLOCK(groupirq_lock);
39 #define DEFINE_GROUP(_name, _ctrlbit, _num) \
40 struct group_irq group_##_name = { \
41 .enable = nuc900_group_enable, \
42 .gpen = ((1 << _num) - 1) << _ctrlbit, \
45 static void nuc900_group_enable(struct group_irq *gpirq, int enable);
47 static DEFINE_GROUP(nirq0, 0, 4);
48 static DEFINE_GROUP(nirq1, 4, 4);
49 static DEFINE_GROUP(usbh, 8, 2);
50 static DEFINE_GROUP(ottimer, 16, 3);
51 static DEFINE_GROUP(gdma, 20, 2);
52 static DEFINE_GROUP(sc, 24, 2);
53 static DEFINE_GROUP(i2c, 26, 2);
54 static DEFINE_GROUP(ps2, 28, 2);
56 static int group_irq_enable(struct group_irq *group_irq)
58 unsigned long flags;
60 spin_lock_irqsave(&groupirq_lock, flags);
61 if (group_irq->enabled++ == 0)
62 (group_irq->enable)(group_irq, 1);
63 spin_unlock_irqrestore(&groupirq_lock, flags);
65 return 0;
68 static void group_irq_disable(struct group_irq *group_irq)
70 unsigned long flags;
72 WARN_ON(group_irq->enabled == 0);
74 spin_lock_irqsave(&groupirq_lock, flags);
75 if (--group_irq->enabled == 0)
76 (group_irq->enable)(group_irq, 0);
77 spin_unlock_irqrestore(&groupirq_lock, flags);
80 static void nuc900_group_enable(struct group_irq *gpirq, int enable)
82 unsigned int groupen = gpirq->gpen;
83 unsigned long regval;
85 regval = __raw_readl(REG_AIC_GEN);
87 if (enable)
88 regval |= groupen;
89 else
90 regval &= ~groupen;
92 __raw_writel(regval, REG_AIC_GEN);
95 static void nuc900_irq_mask(struct irq_data *d)
97 struct group_irq *group_irq;
99 group_irq = NULL;
101 __raw_writel(1 << d->irq, REG_AIC_MDCR);
103 switch (d->irq) {
104 case IRQ_GROUP0:
105 group_irq = &group_nirq0;
106 break;
108 case IRQ_GROUP1:
109 group_irq = &group_nirq1;
110 break;
112 case IRQ_USBH:
113 group_irq = &group_usbh;
114 break;
116 case IRQ_T_INT_GROUP:
117 group_irq = &group_ottimer;
118 break;
120 case IRQ_GDMAGROUP:
121 group_irq = &group_gdma;
122 break;
124 case IRQ_SCGROUP:
125 group_irq = &group_sc;
126 break;
128 case IRQ_I2CGROUP:
129 group_irq = &group_i2c;
130 break;
132 case IRQ_P2SGROUP:
133 group_irq = &group_ps2;
134 break;
137 if (group_irq)
138 group_irq_disable(group_irq);
142 * By the w90p910 spec,any irq,only write 1
143 * to REG_AIC_EOSCR for ACK
146 static void nuc900_irq_ack(struct irq_data *d)
148 __raw_writel(0x01, REG_AIC_EOSCR);
151 static void nuc900_irq_unmask(struct irq_data *d)
153 struct group_irq *group_irq;
155 group_irq = NULL;
157 __raw_writel(1 << d->irq, REG_AIC_MECR);
159 switch (d->irq) {
160 case IRQ_GROUP0:
161 group_irq = &group_nirq0;
162 break;
164 case IRQ_GROUP1:
165 group_irq = &group_nirq1;
166 break;
168 case IRQ_USBH:
169 group_irq = &group_usbh;
170 break;
172 case IRQ_T_INT_GROUP:
173 group_irq = &group_ottimer;
174 break;
176 case IRQ_GDMAGROUP:
177 group_irq = &group_gdma;
178 break;
180 case IRQ_SCGROUP:
181 group_irq = &group_sc;
182 break;
184 case IRQ_I2CGROUP:
185 group_irq = &group_i2c;
186 break;
188 case IRQ_P2SGROUP:
189 group_irq = &group_ps2;
190 break;
193 if (group_irq)
194 group_irq_enable(group_irq);
197 static struct irq_chip nuc900_irq_chip = {
198 .irq_ack = nuc900_irq_ack,
199 .irq_mask = nuc900_irq_mask,
200 .irq_unmask = nuc900_irq_unmask,
203 void __init nuc900_init_irq(void)
205 int irqno;
207 __raw_writel(0xFFFFFFFE, REG_AIC_MDCR);
209 for (irqno = IRQ_WDT; irqno <= IRQ_ADC; irqno++) {
210 irq_set_chip_and_handler(irqno, &nuc900_irq_chip,
211 handle_level_irq);
212 set_irq_flags(irqno, IRQF_VALID);