drivers/net/wireless/iwlwifi/iwl-agn-ucode.c

   1 /******************************************************************************
   2  *
   3  * GPL LICENSE SUMMARY
   4  *
   5  * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of version 2 of the GNU General Public License as
   9  * published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful, but
  12  * WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19  * USA
  20  *
  21  * The full GNU General Public License is included in this distribution
  22  * in the file called LICENSE.GPL.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #include <linux/kernel.h>
  31 #include <linux/module.h>
  32 #include <linux/init.h>
  33 #include <linux/sched.h>
  34
  35 #include "iwl-dev.h"
  36 #include "iwl-core.h"
  37 #include "iwl-io.h"
  38 #include "iwl-agn-hw.h"
  39 #include "iwl-agn.h"
  40 #include "iwl-agn-calib.h"
  41 #include "iwl-trans.h"
  42 #include "iwl-fh.h"
  43
  44 static struct iwl_wimax_coex_event_entry cu_priorities[COEX_NUM_OF_EVENTS] = {
  45         {COEX_CU_UNASSOC_IDLE_RP, COEX_CU_UNASSOC_IDLE_WP,
  46          0, COEX_UNASSOC_IDLE_FLAGS},
  47         {COEX_CU_UNASSOC_MANUAL_SCAN_RP, COEX_CU_UNASSOC_MANUAL_SCAN_WP,
  48          0, COEX_UNASSOC_MANUAL_SCAN_FLAGS},
  49         {COEX_CU_UNASSOC_AUTO_SCAN_RP, COEX_CU_UNASSOC_AUTO_SCAN_WP,
  50          0, COEX_UNASSOC_AUTO_SCAN_FLAGS},
  51         {COEX_CU_CALIBRATION_RP, COEX_CU_CALIBRATION_WP,
  52          0, COEX_CALIBRATION_FLAGS},
  53         {COEX_CU_PERIODIC_CALIBRATION_RP, COEX_CU_PERIODIC_CALIBRATION_WP,
  54          0, COEX_PERIODIC_CALIBRATION_FLAGS},
  55         {COEX_CU_CONNECTION_ESTAB_RP, COEX_CU_CONNECTION_ESTAB_WP,
  56          0, COEX_CONNECTION_ESTAB_FLAGS},
  57         {COEX_CU_ASSOCIATED_IDLE_RP, COEX_CU_ASSOCIATED_IDLE_WP,
  58          0, COEX_ASSOCIATED_IDLE_FLAGS},
  59         {COEX_CU_ASSOC_MANUAL_SCAN_RP, COEX_CU_ASSOC_MANUAL_SCAN_WP,
  60          0, COEX_ASSOC_MANUAL_SCAN_FLAGS},
  61         {COEX_CU_ASSOC_AUTO_SCAN_RP, COEX_CU_ASSOC_AUTO_SCAN_WP,
  62          0, COEX_ASSOC_AUTO_SCAN_FLAGS},
  63         {COEX_CU_ASSOC_ACTIVE_LEVEL_RP, COEX_CU_ASSOC_ACTIVE_LEVEL_WP,
  64          0, COEX_ASSOC_ACTIVE_LEVEL_FLAGS},
  65         {COEX_CU_RF_ON_RP, COEX_CU_RF_ON_WP, 0, COEX_CU_RF_ON_FLAGS},
  66         {COEX_CU_RF_OFF_RP, COEX_CU_RF_OFF_WP, 0, COEX_RF_OFF_FLAGS},
  67         {COEX_CU_STAND_ALONE_DEBUG_RP, COEX_CU_STAND_ALONE_DEBUG_WP,
  68          0, COEX_STAND_ALONE_DEBUG_FLAGS},
  69         {COEX_CU_IPAN_ASSOC_LEVEL_RP, COEX_CU_IPAN_ASSOC_LEVEL_WP,
  70          0, COEX_IPAN_ASSOC_LEVEL_FLAGS},
  71         {COEX_CU_RSRVD1_RP, COEX_CU_RSRVD1_WP, 0, COEX_RSRVD1_FLAGS},
  72         {COEX_CU_RSRVD2_RP, COEX_CU_RSRVD2_WP, 0, COEX_RSRVD2_FLAGS}
  73 };
  74
  75 /*
  76  * ucode
  77  */
  78 static int iwlagn_load_section(struct iwl_priv *priv, const char *name,
  79                                 struct fw_desc *image, u32 dst_addr)
  80 {
  81         dma_addr_t phy_addr = image->p_addr;
  82         u32 byte_cnt = image->len;
  83         int ret;
  84
  85         priv->ucode_write_complete = 0;
  86
  87         iwl_write_direct32(bus(priv),
  88                 FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),
  89                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE);
  90
  91         iwl_write_direct32(bus(priv),
  92                 FH_SRVC_CHNL_SRAM_ADDR_REG(FH_SRVC_CHNL), dst_addr);
  93
  94         iwl_write_direct32(bus(priv),
  95                 FH_TFDIB_CTRL0_REG(FH_SRVC_CHNL),
  96                 phy_addr & FH_MEM_TFDIB_DRAM_ADDR_LSB_MSK);
  97
  98         iwl_write_direct32(bus(priv),
  99                 FH_TFDIB_CTRL1_REG(FH_SRVC_CHNL),
 100                 (iwl_get_dma_hi_addr(phy_addr)
 101                         << FH_MEM_TFDIB_REG1_ADDR_BITSHIFT) | byte_cnt);
 102
 103         iwl_write_direct32(bus(priv),
 104                 FH_TCSR_CHNL_TX_BUF_STS_REG(FH_SRVC_CHNL),
 105                 1 << FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_NUM |
 106                 1 << FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_IDX |
 107                 FH_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_VALID);
 108
 109         iwl_write_direct32(bus(priv),
 110                 FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),
 111                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE       |
 112                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE    |
 113                 FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_ENDTFD);
 114
 115         IWL_DEBUG_FW(priv, "%s uCode section being loaded...\n", name);
 116         ret = wait_event_timeout(priv->shrd->wait_command_queue,
 117                                  priv->ucode_write_complete, 5 * HZ);
 118         if (!ret) {
 119                 IWL_ERR(priv, "Could not load the %s uCode section\n",
 120                         name);
 121                 return -ETIMEDOUT;
 122         }
 123
 124         return 0;
 125 }
 126
 127 static int iwlagn_load_given_ucode(struct iwl_priv *priv,
 128                                    struct fw_img *image)
 129 {
 130         int ret = 0;
 131
 132         ret = iwlagn_load_section(priv, "INST", &image->code,
 133                                    IWLAGN_RTC_INST_LOWER_BOUND);
 134         if (ret)
 135                 return ret;
 136
 137         return iwlagn_load_section(priv, "DATA", &image->data,
 138                                     IWLAGN_RTC_DATA_LOWER_BOUND);
 139 }
 140
 141 /*
 142  *  Calibration
 143  */
 144 static int iwlagn_set_Xtal_calib(struct iwl_priv *priv)
 145 {
 146         struct iwl_calib_xtal_freq_cmd cmd;
 147         __le16 *xtal_calib =
 148                 (__le16 *)iwl_eeprom_query_addr(priv, EEPROM_XTAL);
 149
 150         iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD);
 151         cmd.cap_pin1 = le16_to_cpu(xtal_calib[0]);
 152         cmd.cap_pin2 = le16_to_cpu(xtal_calib[1]);
 153         return iwl_calib_set(&priv->calib_results[IWL_CALIB_XTAL],
 154                              (u8 *)&cmd, sizeof(cmd));
 155 }
 156
 157 static int iwlagn_set_temperature_offset_calib(struct iwl_priv *priv)
 158 {
 159         struct iwl_calib_temperature_offset_cmd cmd;
 160         __le16 *offset_calib =
 161                 (__le16 *)iwl_eeprom_query_addr(priv, EEPROM_RAW_TEMPERATURE);
 162
 163         memset(&cmd, 0, sizeof(cmd));
 164         iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD);
 165         memcpy(&cmd.radio_sensor_offset, offset_calib, sizeof(*offset_calib));
 166         if (!(cmd.radio_sensor_offset))
 167                 cmd.radio_sensor_offset = DEFAULT_RADIO_SENSOR_OFFSET;
 168
 169         IWL_DEBUG_CALIB(priv, "Radio sensor offset: %d\n",
 170                         le16_to_cpu(cmd.radio_sensor_offset));
 171         return iwl_calib_set(&priv->calib_results[IWL_CALIB_TEMP_OFFSET],
 172                              (u8 *)&cmd, sizeof(cmd));
 173 }
 174
 175 static int iwlagn_set_temperature_offset_calib_v2(struct iwl_priv *priv)
 176 {
 177         struct iwl_calib_temperature_offset_v2_cmd cmd;
 178         __le16 *offset_calib_high = (__le16 *)iwl_eeprom_query_addr(priv,
 179                                      EEPROM_KELVIN_TEMPERATURE);
 180         __le16 *offset_calib_low =
 181                 (__le16 *)iwl_eeprom_query_addr(priv, EEPROM_RAW_TEMPERATURE);
 182         struct iwl_eeprom_calib_hdr *hdr;
 183
 184         memset(&cmd, 0, sizeof(cmd));
 185         iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD);
 186         hdr = (struct iwl_eeprom_calib_hdr *)iwl_eeprom_query_addr(priv,
 187                                                         EEPROM_CALIB_ALL);
 188         memcpy(&cmd.radio_sensor_offset_high, offset_calib_high,
 189                 sizeof(*offset_calib_high));
 190         memcpy(&cmd.radio_sensor_offset_low, offset_calib_low,
 191                 sizeof(*offset_calib_low));
 192         if (!(cmd.radio_sensor_offset_low)) {
 193                 IWL_DEBUG_CALIB(priv, "no info in EEPROM, use default\n");
 194                 cmd.radio_sensor_offset_low = DEFAULT_RADIO_SENSOR_OFFSET;
 195                 cmd.radio_sensor_offset_high = DEFAULT_RADIO_SENSOR_OFFSET;
 196         }
 197         memcpy(&cmd.burntVoltageRef, &hdr->voltage,
 198                 sizeof(hdr->voltage));
 199
 200         IWL_DEBUG_CALIB(priv, "Radio sensor offset high: %d\n",
 201                         le16_to_cpu(cmd.radio_sensor_offset_high));
 202         IWL_DEBUG_CALIB(priv, "Radio sensor offset low: %d\n",
 203                         le16_to_cpu(cmd.radio_sensor_offset_low));
 204         IWL_DEBUG_CALIB(priv, "Voltage Ref: %d\n",
 205                         le16_to_cpu(cmd.burntVoltageRef));
 206
 207         return iwl_calib_set(&priv->calib_results[IWL_CALIB_TEMP_OFFSET],
 208                              (u8 *)&cmd, sizeof(cmd));
 209 }
 210
 211 static int iwlagn_send_calib_cfg(struct iwl_priv *priv)
 212 {
 213         struct iwl_calib_cfg_cmd calib_cfg_cmd;
 214         struct iwl_host_cmd cmd = {
 215                 .id = CALIBRATION_CFG_CMD,
 216                 .len = { sizeof(struct iwl_calib_cfg_cmd), },
 217                 .data = { &calib_cfg_cmd, },
 218         };
 219
 220         memset(&calib_cfg_cmd, 0, sizeof(calib_cfg_cmd));
 221         calib_cfg_cmd.ucd_calib_cfg.once.is_enable = IWL_CALIB_INIT_CFG_ALL;
 222         calib_cfg_cmd.ucd_calib_cfg.once.start = IWL_CALIB_INIT_CFG_ALL;
 223         calib_cfg_cmd.ucd_calib_cfg.once.send_res = IWL_CALIB_INIT_CFG_ALL;
 224         calib_cfg_cmd.ucd_calib_cfg.flags =
 225                 IWL_CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_MSK;
 226
 227         return iwl_trans_send_cmd(trans(priv), &cmd);
 228 }
 229
 230 int iwlagn_rx_calib_result(struct iwl_priv *priv,
 231                             struct iwl_rx_mem_buffer *rxb,
 232                             struct iwl_device_cmd *cmd)
 233 {
 234         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 235         struct iwl_calib_hdr *hdr = (struct iwl_calib_hdr *)pkt->u.raw;
 236         int len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
 237         int index;
 238
 239         /* reduce the size of the length field itself */
 240         len -= 4;
 241
 242         /* Define the order in which the results will be sent to the runtime
 243          * uCode. iwl_send_calib_results sends them in a row according to
 244          * their index. We sort them here
 245          */
 246         switch (hdr->op_code) {
 247         case IWL_PHY_CALIBRATE_DC_CMD:
 248                 index = IWL_CALIB_DC;
 249                 break;
 250         case IWL_PHY_CALIBRATE_LO_CMD:
 251                 index = IWL_CALIB_LO;
 252                 break;
 253         case IWL_PHY_CALIBRATE_TX_IQ_CMD:
 254                 index = IWL_CALIB_TX_IQ;
 255                 break;
 256         case IWL_PHY_CALIBRATE_TX_IQ_PERD_CMD:
 257                 index = IWL_CALIB_TX_IQ_PERD;
 258                 break;
 259         case IWL_PHY_CALIBRATE_BASE_BAND_CMD:
 260                 index = IWL_CALIB_BASE_BAND;
 261                 break;
 262         default:
 263                 IWL_ERR(priv, "Unknown calibration notification %d\n",
 264                           hdr->op_code);
 265                 return -1;
 266         }
 267         iwl_calib_set(&priv->calib_results[index], pkt->u.raw, len);
 268         return 0;
 269 }
 270
 271 int iwlagn_init_alive_start(struct iwl_priv *priv)
 272 {
 273         int ret;
 274
 275         if (priv->cfg->bt_params &&
 276             priv->cfg->bt_params->advanced_bt_coexist) {
 277                 /*
 278                  * Tell uCode we are ready to perform calibration
 279                  * need to perform this before any calibration
 280                  * no need to close the envlope since we are going
 281                  * to load the runtime uCode later.
 282                  */
 283                 ret = iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_OPEN,
 284                         BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
 285                 if (ret)
 286                         return ret;
 287
 288         }
 289
 290         ret = iwlagn_send_calib_cfg(priv);
 291         if (ret)
 292                 return ret;
 293
 294         /**
 295          * temperature offset calibration is only needed for runtime ucode,
 296          * so prepare the value now.
 297          */
 298         if (priv->cfg->need_temp_offset_calib) {
 299                 if (priv->cfg->temp_offset_v2)
 300                         return iwlagn_set_temperature_offset_calib_v2(priv);
 301                 else
 302                         return iwlagn_set_temperature_offset_calib(priv);
 303         }
 304
 305         return 0;
 306 }
 307
 308 static int iwlagn_send_wimax_coex(struct iwl_priv *priv)
 309 {
 310         struct iwl_wimax_coex_cmd coex_cmd;
 311
 312         if (priv->cfg->base_params->support_wimax_coexist) {
 313                 /* UnMask wake up src at associated sleep */
 314                 coex_cmd.flags = COEX_FLAGS_ASSOC_WA_UNMASK_MSK;
 315
 316                 /* UnMask wake up src at unassociated sleep */
 317                 coex_cmd.flags |= COEX_FLAGS_UNASSOC_WA_UNMASK_MSK;
 318                 memcpy(coex_cmd.sta_prio, cu_priorities,
 319                         sizeof(struct iwl_wimax_coex_event_entry) *
 320                          COEX_NUM_OF_EVENTS);
 321
 322                 /* enabling the coexistence feature */
 323                 coex_cmd.flags |= COEX_FLAGS_COEX_ENABLE_MSK;
 324
 325                 /* enabling the priorities tables */
 326                 coex_cmd.flags |= COEX_FLAGS_STA_TABLE_VALID_MSK;
 327         } else {
 328                 /* coexistence is disabled */
 329                 memset(&coex_cmd, 0, sizeof(coex_cmd));
 330         }
 331         return iwl_trans_send_cmd_pdu(trans(priv),
 332                                 COEX_PRIORITY_TABLE_CMD, CMD_SYNC,
 333                                 sizeof(coex_cmd), &coex_cmd);
 334 }
 335
 336 static const u8 iwlagn_bt_prio_tbl[BT_COEX_PRIO_TBL_EVT_MAX] = {
 337         ((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 338                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 339         ((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 340                 (1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 341         ((BT_COEX_PRIO_TBL_PRIO_LOW << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 342                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 343         ((BT_COEX_PRIO_TBL_PRIO_LOW << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 344                 (1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 345         ((BT_COEX_PRIO_TBL_PRIO_HIGH << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 346                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 347         ((BT_COEX_PRIO_TBL_PRIO_HIGH << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 348                 (1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 349         ((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 350                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 351         ((BT_COEX_PRIO_TBL_PRIO_COEX_OFF << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 352                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 353         ((BT_COEX_PRIO_TBL_PRIO_COEX_ON << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 354                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 355         0, 0, 0, 0, 0, 0, 0
 356 };
 357
 358 void iwlagn_send_prio_tbl(struct iwl_priv *priv)
 359 {
 360         struct iwl_bt_coex_prio_table_cmd prio_tbl_cmd;
 361
 362         memcpy(prio_tbl_cmd.prio_tbl, iwlagn_bt_prio_tbl,
 363                 sizeof(iwlagn_bt_prio_tbl));
 364         if (iwl_trans_send_cmd_pdu(trans(priv),
 365                                 REPLY_BT_COEX_PRIO_TABLE, CMD_SYNC,
 366                                 sizeof(prio_tbl_cmd), &prio_tbl_cmd))
 367                 IWL_ERR(priv, "failed to send BT prio tbl command\n");
 368 }
 369
 370 int iwlagn_send_bt_env(struct iwl_priv *priv, u8 action, u8 type)
 371 {
 372         struct iwl_bt_coex_prot_env_cmd env_cmd;
 373         int ret;
 374
 375         env_cmd.action = action;
 376         env_cmd.type = type;
 377         ret = iwl_trans_send_cmd_pdu(trans(priv),
 378                                REPLY_BT_COEX_PROT_ENV, CMD_SYNC,
 379                                sizeof(env_cmd), &env_cmd);
 380         if (ret)
 381                 IWL_ERR(priv, "failed to send BT env command\n");
 382         return ret;
 383 }
 384
 385
 386 static int iwlagn_alive_notify(struct iwl_priv *priv)
 387 {
 388         struct iwl_rxon_context *ctx;
 389         int ret;
 390
 391         if (!priv->tx_cmd_pool)
 392                 priv->tx_cmd_pool =
 393                         kmem_cache_create("iwlagn_dev_cmd",
 394                                           sizeof(struct iwl_device_cmd),
 395                                           sizeof(void *), 0, NULL);
 396
 397         if (!priv->tx_cmd_pool)
 398                 return -ENOMEM;
 399
 400         iwl_trans_tx_start(trans(priv));
 401         for_each_context(priv, ctx)
 402                 ctx->last_tx_rejected = false;
 403
 404         ret = iwlagn_send_wimax_coex(priv);
 405         if (ret)
 406                 return ret;
 407
 408         ret = iwlagn_set_Xtal_calib(priv);
 409         if (ret)
 410                 return ret;
 411
 412         return iwl_send_calib_results(priv);
 413 }
 414
 415
 416 /**
 417  * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
 418  *   using sample data 100 bytes apart.  If these sample points are good,
 419  *   it's a pretty good bet that everything between them is good, too.
 420  */
 421 static int iwl_verify_inst_sparse(struct iwl_priv *priv,
 422                                       struct fw_desc *fw_desc)
 423 {
 424         __le32 *image = (__le32 *)fw_desc->v_addr;
 425         u32 len = fw_desc->len;
 426         u32 val;
 427         u32 i;
 428
 429         IWL_DEBUG_FW(priv, "ucode inst image size is %u\n", len);
 430
 431         for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
 432                 /* read data comes through single port, auto-incr addr */
 433                 /* NOTE: Use the debugless read so we don't flood kernel log
 434                  * if IWL_DL_IO is set */
 435                 iwl_write_direct32(bus(priv), HBUS_TARG_MEM_RADDR,
 436                         i + IWLAGN_RTC_INST_LOWER_BOUND);
 437                 val = iwl_read32(bus(priv), HBUS_TARG_MEM_RDAT);
 438                 if (val != le32_to_cpu(*image))
 439                         return -EIO;
 440         }
 441
 442         return 0;
 443 }
 444
 445 static void iwl_print_mismatch_inst(struct iwl_priv *priv,
 446                                     struct fw_desc *fw_desc)
 447 {
 448         __le32 *image = (__le32 *)fw_desc->v_addr;
 449         u32 len = fw_desc->len;
 450         u32 val;
 451         u32 offs;
 452         int errors = 0;
 453
 454         IWL_DEBUG_FW(priv, "ucode inst image size is %u\n", len);
 455
 456         iwl_write_direct32(bus(priv), HBUS_TARG_MEM_RADDR,
 457                            IWLAGN_RTC_INST_LOWER_BOUND);
 458
 459         for (offs = 0;
 460              offs < len && errors < 20;
 461              offs += sizeof(u32), image++) {
 462                 /* read data comes through single port, auto-incr addr */
 463                 val = iwl_read32(bus(priv), HBUS_TARG_MEM_RDAT);
 464                 if (val != le32_to_cpu(*image)) {
 465                         IWL_ERR(priv, "uCode INST section at "
 466                                 "offset 0x%x, is 0x%x, s/b 0x%x\n",
 467                                 offs, val, le32_to_cpu(*image));
 468                         errors++;
 469                 }
 470         }
 471 }
 472
 473 /**
 474  * iwl_verify_ucode - determine which instruction image is in SRAM,
 475  *    and verify its contents
 476  */
 477 static int iwl_verify_ucode(struct iwl_priv *priv, struct fw_img *img)
 478 {
 479         if (!iwl_verify_inst_sparse(priv, &img->code)) {
 480                 IWL_DEBUG_FW(priv, "uCode is good in inst SRAM\n");
 481                 return 0;
 482         }
 483
 484         IWL_ERR(priv, "UCODE IMAGE IN INSTRUCTION SRAM NOT VALID!!\n");
 485
 486         iwl_print_mismatch_inst(priv, &img->code);
 487         return -EIO;
 488 }
 489
 490 struct iwlagn_alive_data {
 491         bool valid;
 492         u8 subtype;
 493 };
 494
 495 static void iwlagn_alive_fn(struct iwl_priv *priv,
 496                             struct iwl_rx_packet *pkt,
 497                             void *data)
 498 {
 499         struct iwlagn_alive_data *alive_data = data;
 500         struct iwl_alive_resp *palive;
 501
 502         palive = &pkt->u.alive_frame;
 503
 504         IWL_DEBUG_FW(priv, "Alive ucode status 0x%08X revision "
 505                        "0x%01X 0x%01X\n",
 506                        palive->is_valid, palive->ver_type,
 507                        palive->ver_subtype);
 508
 509         priv->device_pointers.error_event_table =
 510                 le32_to_cpu(palive->error_event_table_ptr);
 511         priv->device_pointers.log_event_table =
 512                 le32_to_cpu(palive->log_event_table_ptr);
 513
 514         alive_data->subtype = palive->ver_subtype;
 515         alive_data->valid = palive->is_valid == UCODE_VALID_OK;
 516 }
 517
 518 #define UCODE_ALIVE_TIMEOUT     HZ
 519 #define UCODE_CALIB_TIMEOUT     (2*HZ)
 520
 521 int iwlagn_load_ucode_wait_alive(struct iwl_priv *priv,
 522                                  struct fw_img *image,
 523                                  enum iwlagn_ucode_type ucode_type)
 524 {
 525         struct iwl_notification_wait alive_wait;
 526         struct iwlagn_alive_data alive_data;
 527         int ret;
 528         enum iwlagn_ucode_type old_type;
 529
 530         ret = iwl_trans_start_device(trans(priv));
 531         if (ret)
 532                 return ret;
 533
 534         iwlagn_init_notification_wait(priv, &alive_wait, REPLY_ALIVE,
 535                                       iwlagn_alive_fn, &alive_data);
 536
 537         old_type = priv->ucode_type;
 538         priv->ucode_type = ucode_type;
 539
 540         ret = iwlagn_load_given_ucode(priv, image);
 541         if (ret) {
 542                 priv->ucode_type = old_type;
 543                 iwlagn_remove_notification(priv, &alive_wait);
 544                 return ret;
 545         }
 546
 547         iwl_trans_kick_nic(trans(priv));
 548
 549         /*
 550          * Some things may run in the background now, but we
 551          * just wait for the ALIVE notification here.
 552          */
 553         ret = iwlagn_wait_notification(priv, &alive_wait, UCODE_ALIVE_TIMEOUT);
 554         if (ret) {
 555                 priv->ucode_type = old_type;
 556                 return ret;
 557         }
 558
 559         if (!alive_data.valid) {
 560                 IWL_ERR(priv, "Loaded ucode is not valid!\n");
 561                 priv->ucode_type = old_type;
 562                 return -EIO;
 563         }
 564
 565         /*
 566          * This step takes a long time (60-80ms!!) and
 567          * WoWLAN image should be loaded quickly, so
 568          * skip it for WoWLAN.
 569          */
 570         if (ucode_type != IWL_UCODE_WOWLAN) {
 571                 ret = iwl_verify_ucode(priv, image);
 572                 if (ret) {
 573                         priv->ucode_type = old_type;
 574                         return ret;
 575                 }
 576
 577                 /* delay a bit to give rfkill time to run */
 578                 msleep(5);
 579         }
 580
 581         ret = iwlagn_alive_notify(priv);
 582         if (ret) {
 583                 IWL_WARN(priv,
 584                         "Could not complete ALIVE transition: %d\n", ret);
 585                 priv->ucode_type = old_type;
 586                 return ret;
 587         }
 588
 589         return 0;
 590 }
 591
 592 int iwlagn_run_init_ucode(struct iwl_priv *priv)
 593 {
 594         struct iwl_notification_wait calib_wait;
 595         int ret;
 596
 597         lockdep_assert_held(&priv->shrd->mutex);
 598
 599         /* No init ucode required? Curious, but maybe ok */
 600         if (!priv->ucode_init.code.len)
 601                 return 0;
 602
 603         if (priv->ucode_type != IWL_UCODE_NONE)
 604                 return 0;
 605
 606         iwlagn_init_notification_wait(priv, &calib_wait,
 607                                       CALIBRATION_COMPLETE_NOTIFICATION,
 608                                       NULL, NULL);
 609
 610         /* Will also start the device */
 611         ret = iwlagn_load_ucode_wait_alive(priv, &priv->ucode_init,
 612                                            IWL_UCODE_INIT);
 613         if (ret)
 614                 goto error;
 615
 616         ret = iwlagn_init_alive_start(priv);
 617         if (ret)
 618                 goto error;
 619
 620         /*
 621          * Some things may run in the background now, but we
 622          * just wait for the calibration complete notification.
 623          */
 624         ret = iwlagn_wait_notification(priv, &calib_wait, UCODE_CALIB_TIMEOUT);
 625
 626         goto out;
 627
 628  error:
 629         iwlagn_remove_notification(priv, &calib_wait);
 630  out:
 631         /* Whatever happened, stop the device */
 632         iwl_trans_stop_device(trans(priv));
 633         return ret;
 634 }