MIPS: Yosemite, Emma: Fix off-by-two in arcs_cmdline buffer size check
[linux-2.6/linux-mips.git] / drivers / regulator / mc13783-regulator.c
blob730f43ad415b11fb83803f84577eb1e5d7c4c738
1 /*
2 * Regulator Driver for Freescale MC13783 PMIC
4 * Copyright 2010 Yong Shen <yong.shen@linaro.org>
5 * Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
6 * Copyright 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/mfd/mc13783.h>
14 #include <linux/regulator/machine.h>
15 #include <linux/regulator/driver.h>
16 #include <linux/platform_device.h>
17 #include <linux/kernel.h>
18 #include <linux/slab.h>
19 #include <linux/init.h>
20 #include <linux/err.h>
21 #include "mc13xxx.h"
23 #define MC13783_REG_SWITCHERS5 29
24 #define MC13783_REG_SWITCHERS5_SW3EN (1 << 20)
25 #define MC13783_REG_SWITCHERS5_SW3VSEL 18
26 #define MC13783_REG_SWITCHERS5_SW3VSEL_M (3 << 18)
28 #define MC13783_REG_REGULATORSETTING0 30
29 #define MC13783_REG_REGULATORSETTING0_VIOLOVSEL 2
30 #define MC13783_REG_REGULATORSETTING0_VDIGVSEL 4
31 #define MC13783_REG_REGULATORSETTING0_VGENVSEL 6
32 #define MC13783_REG_REGULATORSETTING0_VRFDIGVSEL 9
33 #define MC13783_REG_REGULATORSETTING0_VRFREFVSEL 11
34 #define MC13783_REG_REGULATORSETTING0_VRFCPVSEL 13
35 #define MC13783_REG_REGULATORSETTING0_VSIMVSEL 14
36 #define MC13783_REG_REGULATORSETTING0_VESIMVSEL 15
37 #define MC13783_REG_REGULATORSETTING0_VCAMVSEL 16
39 #define MC13783_REG_REGULATORSETTING0_VIOLOVSEL_M (3 << 2)
40 #define MC13783_REG_REGULATORSETTING0_VDIGVSEL_M (3 << 4)
41 #define MC13783_REG_REGULATORSETTING0_VGENVSEL_M (7 << 6)
42 #define MC13783_REG_REGULATORSETTING0_VRFDIGVSEL_M (3 << 9)
43 #define MC13783_REG_REGULATORSETTING0_VRFREFVSEL_M (3 << 11)
44 #define MC13783_REG_REGULATORSETTING0_VRFCPVSEL_M (1 << 13)
45 #define MC13783_REG_REGULATORSETTING0_VSIMVSEL_M (1 << 14)
46 #define MC13783_REG_REGULATORSETTING0_VESIMVSEL_M (1 << 15)
47 #define MC13783_REG_REGULATORSETTING0_VCAMVSEL_M (7 << 16)
49 #define MC13783_REG_REGULATORSETTING1 31
50 #define MC13783_REG_REGULATORSETTING1_VVIBVSEL 0
51 #define MC13783_REG_REGULATORSETTING1_VRF1VSEL 2
52 #define MC13783_REG_REGULATORSETTING1_VRF2VSEL 4
53 #define MC13783_REG_REGULATORSETTING1_VMMC1VSEL 6
54 #define MC13783_REG_REGULATORSETTING1_VMMC2VSEL 9
56 #define MC13783_REG_REGULATORSETTING1_VVIBVSEL_M (3 << 0)
57 #define MC13783_REG_REGULATORSETTING1_VRF1VSEL_M (3 << 2)
58 #define MC13783_REG_REGULATORSETTING1_VRF2VSEL_M (3 << 4)
59 #define MC13783_REG_REGULATORSETTING1_VMMC1VSEL_M (7 << 6)
60 #define MC13783_REG_REGULATORSETTING1_VMMC2VSEL_M (7 << 9)
62 #define MC13783_REG_REGULATORMODE0 32
63 #define MC13783_REG_REGULATORMODE0_VAUDIOEN (1 << 0)
64 #define MC13783_REG_REGULATORMODE0_VIOHIEN (1 << 3)
65 #define MC13783_REG_REGULATORMODE0_VIOLOEN (1 << 6)
66 #define MC13783_REG_REGULATORMODE0_VDIGEN (1 << 9)
67 #define MC13783_REG_REGULATORMODE0_VGENEN (1 << 12)
68 #define MC13783_REG_REGULATORMODE0_VRFDIGEN (1 << 15)
69 #define MC13783_REG_REGULATORMODE0_VRFREFEN (1 << 18)
70 #define MC13783_REG_REGULATORMODE0_VRFCPEN (1 << 21)
72 #define MC13783_REG_REGULATORMODE1 33
73 #define MC13783_REG_REGULATORMODE1_VSIMEN (1 << 0)
74 #define MC13783_REG_REGULATORMODE1_VESIMEN (1 << 3)
75 #define MC13783_REG_REGULATORMODE1_VCAMEN (1 << 6)
76 #define MC13783_REG_REGULATORMODE1_VRFBGEN (1 << 9)
77 #define MC13783_REG_REGULATORMODE1_VVIBEN (1 << 11)
78 #define MC13783_REG_REGULATORMODE1_VRF1EN (1 << 12)
79 #define MC13783_REG_REGULATORMODE1_VRF2EN (1 << 15)
80 #define MC13783_REG_REGULATORMODE1_VMMC1EN (1 << 18)
81 #define MC13783_REG_REGULATORMODE1_VMMC2EN (1 << 21)
83 #define MC13783_REG_POWERMISC 34
84 #define MC13783_REG_POWERMISC_GPO1EN (1 << 6)
85 #define MC13783_REG_POWERMISC_GPO2EN (1 << 8)
86 #define MC13783_REG_POWERMISC_GPO3EN (1 << 10)
87 #define MC13783_REG_POWERMISC_GPO4EN (1 << 12)
88 #define MC13783_REG_POWERMISC_PWGT1SPIEN (1 << 15)
89 #define MC13783_REG_POWERMISC_PWGT2SPIEN (1 << 16)
91 #define MC13783_REG_POWERMISC_PWGTSPI_M (3 << 15)
94 /* Voltage Values */
95 static const int mc13783_sw3_val[] = {
96 5000000, 5000000, 5000000, 5500000,
99 static const int mc13783_vaudio_val[] = {
100 2775000,
103 static const int mc13783_viohi_val[] = {
104 2775000,
107 static const int mc13783_violo_val[] = {
108 1200000, 1300000, 1500000, 1800000,
111 static const int mc13783_vdig_val[] = {
112 1200000, 1300000, 1500000, 1800000,
115 static const int mc13783_vgen_val[] = {
116 1200000, 1300000, 1500000, 1800000,
117 1100000, 2000000, 2775000, 2400000,
120 static const int mc13783_vrfdig_val[] = {
121 1200000, 1500000, 1800000, 1875000,
124 static const int mc13783_vrfref_val[] = {
125 2475000, 2600000, 2700000, 2775000,
128 static const int mc13783_vrfcp_val[] = {
129 2700000, 2775000,
132 static const int mc13783_vsim_val[] = {
133 1800000, 2900000, 3000000,
136 static const int mc13783_vesim_val[] = {
137 1800000, 2900000,
140 static const int mc13783_vcam_val[] = {
141 1500000, 1800000, 2500000, 2550000,
142 2600000, 2750000, 2800000, 3000000,
145 static const int mc13783_vrfbg_val[] = {
146 1250000,
149 static const int mc13783_vvib_val[] = {
150 1300000, 1800000, 2000000, 3000000,
153 static const int mc13783_vmmc_val[] = {
154 1600000, 1800000, 2000000, 2600000,
155 2700000, 2800000, 2900000, 3000000,
158 static const int mc13783_vrf_val[] = {
159 1500000, 1875000, 2700000, 2775000,
162 static const int mc13783_gpo_val[] = {
163 3100000,
166 static const int mc13783_pwgtdrv_val[] = {
167 5500000,
170 static struct regulator_ops mc13783_gpo_regulator_ops;
172 #define MC13783_DEFINE(prefix, name, reg, vsel_reg, voltages) \
173 MC13xxx_DEFINE(MC13783_REG_, name, reg, vsel_reg, voltages, \
174 mc13xxx_regulator_ops)
176 #define MC13783_FIXED_DEFINE(prefix, name, reg, voltages) \
177 MC13xxx_FIXED_DEFINE(MC13783_REG_, name, reg, voltages, \
178 mc13xxx_fixed_regulator_ops)
180 #define MC13783_GPO_DEFINE(prefix, name, reg, voltages) \
181 MC13xxx_GPO_DEFINE(MC13783_REG_, name, reg, voltages, \
182 mc13783_gpo_regulator_ops)
184 #define MC13783_DEFINE_SW(_name, _reg, _vsel_reg, _voltages) \
185 MC13783_DEFINE(REG, _name, _reg, _vsel_reg, _voltages)
186 #define MC13783_DEFINE_REGU(_name, _reg, _vsel_reg, _voltages) \
187 MC13783_DEFINE(REG, _name, _reg, _vsel_reg, _voltages)
189 static struct mc13xxx_regulator mc13783_regulators[] = {
190 MC13783_DEFINE_SW(SW3, SWITCHERS5, SWITCHERS5, mc13783_sw3_val),
192 MC13783_FIXED_DEFINE(REG, VAUDIO, REGULATORMODE0, mc13783_vaudio_val),
193 MC13783_FIXED_DEFINE(REG, VIOHI, REGULATORMODE0, mc13783_viohi_val),
194 MC13783_DEFINE_REGU(VIOLO, REGULATORMODE0, REGULATORSETTING0, \
195 mc13783_violo_val),
196 MC13783_DEFINE_REGU(VDIG, REGULATORMODE0, REGULATORSETTING0, \
197 mc13783_vdig_val),
198 MC13783_DEFINE_REGU(VGEN, REGULATORMODE0, REGULATORSETTING0, \
199 mc13783_vgen_val),
200 MC13783_DEFINE_REGU(VRFDIG, REGULATORMODE0, REGULATORSETTING0, \
201 mc13783_vrfdig_val),
202 MC13783_DEFINE_REGU(VRFREF, REGULATORMODE0, REGULATORSETTING0, \
203 mc13783_vrfref_val),
204 MC13783_DEFINE_REGU(VRFCP, REGULATORMODE0, REGULATORSETTING0, \
205 mc13783_vrfcp_val),
206 MC13783_DEFINE_REGU(VSIM, REGULATORMODE1, REGULATORSETTING0, \
207 mc13783_vsim_val),
208 MC13783_DEFINE_REGU(VESIM, REGULATORMODE1, REGULATORSETTING0, \
209 mc13783_vesim_val),
210 MC13783_DEFINE_REGU(VCAM, REGULATORMODE1, REGULATORSETTING0, \
211 mc13783_vcam_val),
212 MC13783_FIXED_DEFINE(REG, VRFBG, REGULATORMODE1, mc13783_vrfbg_val),
213 MC13783_DEFINE_REGU(VVIB, REGULATORMODE1, REGULATORSETTING1, \
214 mc13783_vvib_val),
215 MC13783_DEFINE_REGU(VRF1, REGULATORMODE1, REGULATORSETTING1, \
216 mc13783_vrf_val),
217 MC13783_DEFINE_REGU(VRF2, REGULATORMODE1, REGULATORSETTING1, \
218 mc13783_vrf_val),
219 MC13783_DEFINE_REGU(VMMC1, REGULATORMODE1, REGULATORSETTING1, \
220 mc13783_vmmc_val),
221 MC13783_DEFINE_REGU(VMMC2, REGULATORMODE1, REGULATORSETTING1, \
222 mc13783_vmmc_val),
223 MC13783_GPO_DEFINE(REG, GPO1, POWERMISC, mc13783_gpo_val),
224 MC13783_GPO_DEFINE(REG, GPO2, POWERMISC, mc13783_gpo_val),
225 MC13783_GPO_DEFINE(REG, GPO3, POWERMISC, mc13783_gpo_val),
226 MC13783_GPO_DEFINE(REG, GPO4, POWERMISC, mc13783_gpo_val),
227 MC13783_GPO_DEFINE(REG, PWGT1SPI, POWERMISC, mc13783_pwgtdrv_val),
228 MC13783_GPO_DEFINE(REG, PWGT2SPI, POWERMISC, mc13783_pwgtdrv_val),
231 static int mc13783_powermisc_rmw(struct mc13xxx_regulator_priv *priv, u32 mask,
232 u32 val)
234 struct mc13xxx *mc13783 = priv->mc13xxx;
235 int ret;
236 u32 valread;
238 BUG_ON(val & ~mask);
240 ret = mc13xxx_reg_read(mc13783, MC13783_REG_POWERMISC, &valread);
241 if (ret)
242 return ret;
244 /* Update the stored state for Power Gates. */
245 priv->powermisc_pwgt_state =
246 (priv->powermisc_pwgt_state & ~mask) | val;
247 priv->powermisc_pwgt_state &= MC13783_REG_POWERMISC_PWGTSPI_M;
249 /* Construct the new register value */
250 valread = (valread & ~mask) | val;
251 /* Overwrite the PWGTxEN with the stored version */
252 valread = (valread & ~MC13783_REG_POWERMISC_PWGTSPI_M) |
253 priv->powermisc_pwgt_state;
255 return mc13xxx_reg_write(mc13783, MC13783_REG_POWERMISC, valread);
258 static int mc13783_gpo_regulator_enable(struct regulator_dev *rdev)
260 struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev);
261 struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators;
262 int id = rdev_get_id(rdev);
263 int ret;
264 u32 en_val = mc13xxx_regulators[id].enable_bit;
266 dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
268 /* Power Gate enable value is 0 */
269 if (id == MC13783_REG_PWGT1SPI ||
270 id == MC13783_REG_PWGT2SPI)
271 en_val = 0;
273 mc13xxx_lock(priv->mc13xxx);
274 ret = mc13783_powermisc_rmw(priv, mc13xxx_regulators[id].enable_bit,
275 en_val);
276 mc13xxx_unlock(priv->mc13xxx);
278 return ret;
281 static int mc13783_gpo_regulator_disable(struct regulator_dev *rdev)
283 struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev);
284 struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators;
285 int id = rdev_get_id(rdev);
286 int ret;
287 u32 dis_val = 0;
289 dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
291 /* Power Gate disable value is 1 */
292 if (id == MC13783_REG_PWGT1SPI ||
293 id == MC13783_REG_PWGT2SPI)
294 dis_val = mc13xxx_regulators[id].enable_bit;
296 mc13xxx_lock(priv->mc13xxx);
297 ret = mc13783_powermisc_rmw(priv, mc13xxx_regulators[id].enable_bit,
298 dis_val);
299 mc13xxx_unlock(priv->mc13xxx);
301 return ret;
304 static int mc13783_gpo_regulator_is_enabled(struct regulator_dev *rdev)
306 struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev);
307 struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators;
308 int ret, id = rdev_get_id(rdev);
309 unsigned int val;
311 mc13xxx_lock(priv->mc13xxx);
312 ret = mc13xxx_reg_read(priv->mc13xxx, mc13xxx_regulators[id].reg, &val);
313 mc13xxx_unlock(priv->mc13xxx);
315 if (ret)
316 return ret;
318 /* Power Gates state is stored in powermisc_pwgt_state
319 * where the meaning of bits is negated */
320 val = (val & ~MC13783_REG_POWERMISC_PWGTSPI_M) |
321 (priv->powermisc_pwgt_state ^ MC13783_REG_POWERMISC_PWGTSPI_M);
323 return (val & mc13xxx_regulators[id].enable_bit) != 0;
326 static struct regulator_ops mc13783_gpo_regulator_ops = {
327 .enable = mc13783_gpo_regulator_enable,
328 .disable = mc13783_gpo_regulator_disable,
329 .is_enabled = mc13783_gpo_regulator_is_enabled,
330 .list_voltage = mc13xxx_regulator_list_voltage,
331 .set_voltage = mc13xxx_fixed_regulator_set_voltage,
332 .get_voltage = mc13xxx_fixed_regulator_get_voltage,
335 static int __devinit mc13783_regulator_probe(struct platform_device *pdev)
337 struct mc13xxx_regulator_priv *priv;
338 struct mc13xxx *mc13783 = dev_get_drvdata(pdev->dev.parent);
339 struct mc13783_regulator_platform_data *pdata =
340 dev_get_platdata(&pdev->dev);
341 struct mc13783_regulator_init_data *init_data;
342 int i, ret;
344 dev_dbg(&pdev->dev, "%s id %d\n", __func__, pdev->id);
346 priv = kzalloc(sizeof(*priv) +
347 pdata->num_regulators * sizeof(priv->regulators[0]),
348 GFP_KERNEL);
349 if (!priv)
350 return -ENOMEM;
352 priv->mc13xxx_regulators = mc13783_regulators;
353 priv->mc13xxx = mc13783;
355 for (i = 0; i < pdata->num_regulators; i++) {
356 init_data = &pdata->regulators[i];
357 priv->regulators[i] = regulator_register(
358 &mc13783_regulators[init_data->id].desc,
359 &pdev->dev, init_data->init_data, priv);
361 if (IS_ERR(priv->regulators[i])) {
362 dev_err(&pdev->dev, "failed to register regulator %s\n",
363 mc13783_regulators[i].desc.name);
364 ret = PTR_ERR(priv->regulators[i]);
365 goto err;
369 platform_set_drvdata(pdev, priv);
371 return 0;
372 err:
373 while (--i >= 0)
374 regulator_unregister(priv->regulators[i]);
376 kfree(priv);
378 return ret;
381 static int __devexit mc13783_regulator_remove(struct platform_device *pdev)
383 struct mc13xxx_regulator_priv *priv = platform_get_drvdata(pdev);
384 struct mc13783_regulator_platform_data *pdata =
385 dev_get_platdata(&pdev->dev);
386 int i;
388 platform_set_drvdata(pdev, NULL);
390 for (i = 0; i < pdata->num_regulators; i++)
391 regulator_unregister(priv->regulators[i]);
393 kfree(priv);
394 return 0;
397 static struct platform_driver mc13783_regulator_driver = {
398 .driver = {
399 .name = "mc13783-regulator",
400 .owner = THIS_MODULE,
402 .remove = __devexit_p(mc13783_regulator_remove),
403 .probe = mc13783_regulator_probe,
406 static int __init mc13783_regulator_init(void)
408 return platform_driver_register(&mc13783_regulator_driver);
410 subsys_initcall(mc13783_regulator_init);
412 static void __exit mc13783_regulator_exit(void)
414 platform_driver_unregister(&mc13783_regulator_driver);
416 module_exit(mc13783_regulator_exit);
418 MODULE_LICENSE("GPL v2");
419 MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
420 MODULE_DESCRIPTION("Regulator Driver for Freescale MC13783 PMIC");
421 MODULE_ALIAS("platform:mc13783-regulator");