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MIPS: Yosemite, Emma: Fix off-by-two in arcs_cmdline buffer size check
[linux-2.6/linux-mips.git] / drivers / scsi / mpt2sas / mpt2sas_base.c
blob81209ca87274d9ff090f5d08ae0174c0e13c6d7c
1 /*
2 * This is the Fusion MPT base driver providing common API layer interface
3 * for access to MPT (Message Passing Technology) firmware.
4 *
5 * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
6 * Copyright (C) 2007-2010 LSI Corporation
7 * (mailto:DL-MPTFusionLinux@lsi.com)
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version 2
12 * of the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * NO WARRANTY
20 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
21 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
22 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
23 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
24 * solely responsible for determining the appropriateness of using and
25 * distributing the Program and assumes all risks associated with its
26 * exercise of rights under this Agreement, including but not limited to
27 * the risks and costs of program errors, damage to or loss of data,
28 * programs or equipment, and unavailability or interruption of operations.
29
30 * DISCLAIMER OF LIABILITY
31 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
32 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
34 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
35 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
36 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
37 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
38
39 * You should have received a copy of the GNU General Public License
40 * along with this program; if not, write to the Free Software
41 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
42 * USA.
43 */
44
45 #include <linux/kernel.h>
46 #include <linux/module.h>
47 #include <linux/errno.h>
48 #include <linux/init.h>
49 #include <linux/slab.h>
50 #include <linux/types.h>
51 #include <linux/pci.h>
52 #include <linux/kdev_t.h>
53 #include <linux/blkdev.h>
54 #include <linux/delay.h>
55 #include <linux/interrupt.h>
56 #include <linux/dma-mapping.h>
57 #include <linux/sort.h>
58 #include <linux/io.h>
59 #include <linux/time.h>
60 #include <linux/aer.h>
61
62 #include "mpt2sas_base.h"
63
64 static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
65
66 #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
67
68 static int max_queue_depth = -1;
69 module_param(max_queue_depth, int, 0);
70 MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
71
72 static int max_sgl_entries = -1;
73 module_param(max_sgl_entries, int, 0);
74 MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
75
76 static int msix_disable = -1;
77 module_param(msix_disable, int, 0);
78 MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
79
80 static int missing_delay[2] = {-1, -1};
81 module_param_array(missing_delay, int, NULL, 0);
82 MODULE_PARM_DESC(missing_delay, " device missing delay , io missing delay");
83
84 /* diag_buffer_enable is bitwise
85 * bit 0 set = TRACE
86 * bit 1 set = SNAPSHOT
87 * bit 2 set = EXTENDED
88 *
89 * Either bit can be set, or both
90 */
91 static int diag_buffer_enable;
92 module_param(diag_buffer_enable, int, 0);
93 MODULE_PARM_DESC(diag_buffer_enable, " post diag buffers "
94 "(TRACE=1/SNAPSHOT=2/EXTENDED=4/default=0)");
95
96 static int mpt2sas_fwfault_debug;
97 MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault "
98 "and halt firmware - (default=0)");
99
100 static int disable_discovery = -1;
101 module_param(disable_discovery, int, 0);
102 MODULE_PARM_DESC(disable_discovery, " disable discovery ");
103
104 /**
105 * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
106 *
107 */
108 static int
109 _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
110 {
111 int ret = param_set_int(val, kp);
112 struct MPT2SAS_ADAPTER *ioc;
113
114 if (ret)
115 return ret;
116
117 printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug);
118 list_for_each_entry(ioc, &mpt2sas_ioc_list, list)
119 ioc->fwfault_debug = mpt2sas_fwfault_debug;
120 return 0;
121 }
122 module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug,
123 param_get_int, &mpt2sas_fwfault_debug, 0644);
124
125 /**
126 * _base_fault_reset_work - workq handling ioc fault conditions
127 * @work: input argument, used to derive ioc
128 * Context: sleep.
129 *
130 * Return nothing.
131 */
132 static void
133 _base_fault_reset_work(struct work_struct *work)
134 {
135 struct MPT2SAS_ADAPTER *ioc =
136 container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
137 unsigned long flags;
138 u32 doorbell;
139 int rc;
140
141 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
142 if (ioc->shost_recovery)
143 goto rearm_timer;
144 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
145
146 doorbell = mpt2sas_base_get_iocstate(ioc, 0);
147 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
148 rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
149 FORCE_BIG_HAMMER);
150 printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
151 __func__, (rc == 0) ? "success" : "failed");
152 doorbell = mpt2sas_base_get_iocstate(ioc, 0);
153 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
154 mpt2sas_base_fault_info(ioc, doorbell &
155 MPI2_DOORBELL_DATA_MASK);
156 }
157
158 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
159 rearm_timer:
160 if (ioc->fault_reset_work_q)
161 queue_delayed_work(ioc->fault_reset_work_q,
162 &ioc->fault_reset_work,
163 msecs_to_jiffies(FAULT_POLLING_INTERVAL));
164 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
165 }
166
167 /**
168 * mpt2sas_base_start_watchdog - start the fault_reset_work_q
169 * @ioc: per adapter object
170 * Context: sleep.
171 *
172 * Return nothing.
173 */
174 void
175 mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
176 {
177 unsigned long flags;
178
179 if (ioc->fault_reset_work_q)
180 return;
181
182 /* initialize fault polling */
183 INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
184 snprintf(ioc->fault_reset_work_q_name,
185 sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
186 ioc->fault_reset_work_q =
187 create_singlethread_workqueue(ioc->fault_reset_work_q_name);
188 if (!ioc->fault_reset_work_q) {
189 printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
190 ioc->name, __func__, __LINE__);
191 return;
192 }
193 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
194 if (ioc->fault_reset_work_q)
195 queue_delayed_work(ioc->fault_reset_work_q,
196 &ioc->fault_reset_work,
197 msecs_to_jiffies(FAULT_POLLING_INTERVAL));
198 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
199 }
200
201 /**
202 * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
203 * @ioc: per adapter object
204 * Context: sleep.
205 *
206 * Return nothing.
207 */
208 void
209 mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
210 {
211 unsigned long flags;
212 struct workqueue_struct *wq;
213
214 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
215 wq = ioc->fault_reset_work_q;
216 ioc->fault_reset_work_q = NULL;
217 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
218 if (wq) {
219 if (!cancel_delayed_work(&ioc->fault_reset_work))
220 flush_workqueue(wq);
221 destroy_workqueue(wq);
222 }
223 }
224
225 /**
226 * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
227 * @ioc: per adapter object
228 * @fault_code: fault code
229 *
230 * Return nothing.
231 */
232 void
233 mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
234 {
235 printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
236 ioc->name, fault_code);
237 }
238
239 /**
240 * mpt2sas_halt_firmware - halt's mpt controller firmware
241 * @ioc: per adapter object
242 *
243 * For debugging timeout related issues. Writing 0xCOFFEE00
244 * to the doorbell register will halt controller firmware. With
245 * the purpose to stop both driver and firmware, the enduser can
246 * obtain a ring buffer from controller UART.
247 */
248 void
249 mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc)
250 {
251 u32 doorbell;
252
253 if (!ioc->fwfault_debug)
254 return;
255
256 dump_stack();
257
258 doorbell = readl(&ioc->chip->Doorbell);
259 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
260 mpt2sas_base_fault_info(ioc , doorbell);
261 else {
262 writel(0xC0FFEE00, &ioc->chip->Doorbell);
263 printk(MPT2SAS_ERR_FMT "Firmware is halted due to command "
264 "timeout\n", ioc->name);
265 }
266
267 panic("panic in %s\n", __func__);
268 }
269
270 #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
271 /**
272 * _base_sas_ioc_info - verbose translation of the ioc status
273 * @ioc: per adapter object
274 * @mpi_reply: reply mf payload returned from firmware
275 * @request_hdr: request mf
276 *
277 * Return nothing.
278 */
279 static void
280 _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
281 MPI2RequestHeader_t *request_hdr)
282 {
283 u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
284 MPI2_IOCSTATUS_MASK;
285 char *desc = NULL;
286 u16 frame_sz;
287 char *func_str = NULL;
288
289 /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
290 if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
291 request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
292 request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
293 return;
294
295 if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
296 return;
297
298 switch (ioc_status) {
299
300 /****************************************************************************
301 * Common IOCStatus values for all replies
302 ****************************************************************************/
303
304 case MPI2_IOCSTATUS_INVALID_FUNCTION:
305 desc = "invalid function";
306 break;
307 case MPI2_IOCSTATUS_BUSY:
308 desc = "busy";
309 break;
310 case MPI2_IOCSTATUS_INVALID_SGL:
311 desc = "invalid sgl";
312 break;
313 case MPI2_IOCSTATUS_INTERNAL_ERROR:
314 desc = "internal error";
315 break;
316 case MPI2_IOCSTATUS_INVALID_VPID:
317 desc = "invalid vpid";
318 break;
319 case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
320 desc = "insufficient resources";
321 break;
322 case MPI2_IOCSTATUS_INVALID_FIELD:
323 desc = "invalid field";
324 break;
325 case MPI2_IOCSTATUS_INVALID_STATE:
326 desc = "invalid state";
327 break;
328 case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
329 desc = "op state not supported";
330 break;
331
332 /****************************************************************************
333 * Config IOCStatus values
334 ****************************************************************************/
335
336 case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
337 desc = "config invalid action";
338 break;
339 case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
340 desc = "config invalid type";
341 break;
342 case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
343 desc = "config invalid page";
344 break;
345 case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
346 desc = "config invalid data";
347 break;
348 case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
349 desc = "config no defaults";
350 break;
351 case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
352 desc = "config cant commit";
353 break;
354
355 /****************************************************************************
356 * SCSI IO Reply
357 ****************************************************************************/
358
359 case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
360 case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
361 case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
362 case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
363 case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
364 case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
365 case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
366 case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
367 case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
368 case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
369 case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
370 case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
371 break;
372
373 /****************************************************************************
374 * For use by SCSI Initiator and SCSI Target end-to-end data protection
375 ****************************************************************************/
376
377 case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
378 desc = "eedp guard error";
379 break;
380 case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
381 desc = "eedp ref tag error";
382 break;
383 case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
384 desc = "eedp app tag error";
385 break;
386
387 /****************************************************************************
388 * SCSI Target values
389 ****************************************************************************/
390
391 case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
392 desc = "target invalid io index";
393 break;
394 case MPI2_IOCSTATUS_TARGET_ABORTED:
395 desc = "target aborted";
396 break;
397 case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
398 desc = "target no conn retryable";
399 break;
400 case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
401 desc = "target no connection";
402 break;
403 case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
404 desc = "target xfer count mismatch";
405 break;
406 case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
407 desc = "target data offset error";
408 break;
409 case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
410 desc = "target too much write data";
411 break;
412 case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
413 desc = "target iu too short";
414 break;
415 case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
416 desc = "target ack nak timeout";
417 break;
418 case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
419 desc = "target nak received";
420 break;
421
422 /****************************************************************************
423 * Serial Attached SCSI values
424 ****************************************************************************/
425
426 case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
427 desc = "smp request failed";
428 break;
429 case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
430 desc = "smp data overrun";
431 break;
432
433 /****************************************************************************
434 * Diagnostic Buffer Post / Diagnostic Release values
435 ****************************************************************************/
436
437 case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
438 desc = "diagnostic released";
439 break;
440 default:
441 break;
442 }
443
444 if (!desc)
445 return;
446
447 switch (request_hdr->Function) {
448 case MPI2_FUNCTION_CONFIG:
449 frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
450 func_str = "config_page";
451 break;
452 case MPI2_FUNCTION_SCSI_TASK_MGMT:
453 frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
454 func_str = "task_mgmt";
455 break;
456 case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
457 frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
458 func_str = "sas_iounit_ctl";
459 break;
460 case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
461 frame_sz = sizeof(Mpi2SepRequest_t);
462 func_str = "enclosure";
463 break;
464 case MPI2_FUNCTION_IOC_INIT:
465 frame_sz = sizeof(Mpi2IOCInitRequest_t);
466 func_str = "ioc_init";
467 break;
468 case MPI2_FUNCTION_PORT_ENABLE:
469 frame_sz = sizeof(Mpi2PortEnableRequest_t);
470 func_str = "port_enable";
471 break;
472 case MPI2_FUNCTION_SMP_PASSTHROUGH:
473 frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
474 func_str = "smp_passthru";
475 break;
476 default:
477 frame_sz = 32;
478 func_str = "unknown";
479 break;
480 }
481
482 printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
483 " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
484
485 _debug_dump_mf(request_hdr, frame_sz/4);
486 }
487
488 /**
489 * _base_display_event_data - verbose translation of firmware asyn events
490 * @ioc: per adapter object
491 * @mpi_reply: reply mf payload returned from firmware
492 *
493 * Return nothing.
494 */
495 static void
496 _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
497 Mpi2EventNotificationReply_t *mpi_reply)
498 {
499 char *desc = NULL;
500 u16 event;
501
502 if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
503 return;
504
505 event = le16_to_cpu(mpi_reply->Event);
506
507 switch (event) {
508 case MPI2_EVENT_LOG_DATA:
509 desc = "Log Data";
510 break;
511 case MPI2_EVENT_STATE_CHANGE:
512 desc = "Status Change";
513 break;
514 case MPI2_EVENT_HARD_RESET_RECEIVED:
515 desc = "Hard Reset Received";
516 break;
517 case MPI2_EVENT_EVENT_CHANGE:
518 desc = "Event Change";
519 break;
520 case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
521 desc = "Device Status Change";
522 break;
523 case MPI2_EVENT_IR_OPERATION_STATUS:
524 if (!ioc->hide_ir_msg)
525 desc = "IR Operation Status";
526 break;
527 case MPI2_EVENT_SAS_DISCOVERY:
528 {
529 Mpi2EventDataSasDiscovery_t *event_data =
530 (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData;
531 printk(MPT2SAS_INFO_FMT "Discovery: (%s)", ioc->name,
532 (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
533 "start" : "stop");
534 if (event_data->DiscoveryStatus)
535 printk("discovery_status(0x%08x)",
536 le32_to_cpu(event_data->DiscoveryStatus));
537 printk("\n");
538 return;
539 }
540 case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
541 desc = "SAS Broadcast Primitive";
542 break;
543 case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
544 desc = "SAS Init Device Status Change";
545 break;
546 case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
547 desc = "SAS Init Table Overflow";
548 break;
549 case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
550 desc = "SAS Topology Change List";
551 break;
552 case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
553 desc = "SAS Enclosure Device Status Change";
554 break;
555 case MPI2_EVENT_IR_VOLUME:
556 if (!ioc->hide_ir_msg)
557 desc = "IR Volume";
558 break;
559 case MPI2_EVENT_IR_PHYSICAL_DISK:
560 if (!ioc->hide_ir_msg)
561 desc = "IR Physical Disk";
562 break;
563 case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
564 if (!ioc->hide_ir_msg)
565 desc = "IR Configuration Change List";
566 break;
567 case MPI2_EVENT_LOG_ENTRY_ADDED:
568 if (!ioc->hide_ir_msg)
569 desc = "Log Entry Added";
570 break;
571 }
572
573 if (!desc)
574 return;
575
576 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
577 }
578 #endif
579
580 /**
581 * _base_sas_log_info - verbose translation of firmware log info
582 * @ioc: per adapter object
583 * @log_info: log info
584 *
585 * Return nothing.
586 */
587 static void
588 _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
589 {
590 union loginfo_type {
591 u32 loginfo;
592 struct {
593 u32 subcode:16;
594 u32 code:8;
595 u32 originator:4;
596 u32 bus_type:4;
597 } dw;
598 };
599 union loginfo_type sas_loginfo;
600 char *originator_str = NULL;
601
602 sas_loginfo.loginfo = log_info;
603 if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
604 return;
605
606 /* each nexus loss loginfo */
607 if (log_info == 0x31170000)
608 return;
609
610 /* eat the loginfos associated with task aborts */
611 if (ioc->ignore_loginfos && (log_info == 30050000 || log_info ==
612 0x31140000 || log_info == 0x31130000))
613 return;
614
615 switch (sas_loginfo.dw.originator) {
616 case 0:
617 originator_str = "IOP";
618 break;
619 case 1:
620 originator_str = "PL";
621 break;
622 case 2:
623 if (!ioc->hide_ir_msg)
624 originator_str = "IR";
625 else
626 originator_str = "WarpDrive";
627 break;
628 }
629
630 printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
631 "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
632 originator_str, sas_loginfo.dw.code,
633 sas_loginfo.dw.subcode);
634 }
635
636 /**
637 * _base_display_reply_info -
638 * @ioc: per adapter object
639 * @smid: system request message index
640 * @msix_index: MSIX table index supplied by the OS
641 * @reply: reply message frame(lower 32bit addr)
642 *
643 * Return nothing.
644 */
645 static void
646 _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
647 u32 reply)
648 {
649 MPI2DefaultReply_t *mpi_reply;
650 u16 ioc_status;
651
652 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
653 ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
654 #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
655 if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
656 (ioc->logging_level & MPT_DEBUG_REPLY)) {
657 _base_sas_ioc_info(ioc , mpi_reply,
658 mpt2sas_base_get_msg_frame(ioc, smid));
659 }
660 #endif
661 if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
662 _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
663 }
664
665 /**
666 * mpt2sas_base_done - base internal command completion routine
667 * @ioc: per adapter object
668 * @smid: system request message index
669 * @msix_index: MSIX table index supplied by the OS
670 * @reply: reply message frame(lower 32bit addr)
671 *
672 * Return 1 meaning mf should be freed from _base_interrupt
673 * 0 means the mf is freed from this function.
674 */
675 u8
676 mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
677 u32 reply)
678 {
679 MPI2DefaultReply_t *mpi_reply;
680
681 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
682 if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
683 return 1;
684
685 if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
686 return 1;
687
688 ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
689 if (mpi_reply) {
690 ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
691 memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
692 }
693 ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
694 complete(&ioc->base_cmds.done);
695 return 1;
696 }
697
698 /**
699 * _base_async_event - main callback handler for firmware asyn events
700 * @ioc: per adapter object
701 * @msix_index: MSIX table index supplied by the OS
702 * @reply: reply message frame(lower 32bit addr)
703 *
704 * Return 1 meaning mf should be freed from _base_interrupt
705 * 0 means the mf is freed from this function.
706 */
707 static u8
708 _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
709 {
710 Mpi2EventNotificationReply_t *mpi_reply;
711 Mpi2EventAckRequest_t *ack_request;
712 u16 smid;
713
714 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
715 if (!mpi_reply)
716 return 1;
717 if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
718 return 1;
719 #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
720 _base_display_event_data(ioc, mpi_reply);
721 #endif
722 if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
723 goto out;
724 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
725 if (!smid) {
726 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
727 ioc->name, __func__);
728 goto out;
729 }
730
731 ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
732 memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
733 ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
734 ack_request->Event = mpi_reply->Event;
735 ack_request->EventContext = mpi_reply->EventContext;
736 ack_request->VF_ID = 0; /* TODO */
737 ack_request->VP_ID = 0;
738 mpt2sas_base_put_smid_default(ioc, smid);
739
740 out:
741
742 /* scsih callback handler */
743 mpt2sas_scsih_event_callback(ioc, msix_index, reply);
744
745 /* ctl callback handler */
746 mpt2sas_ctl_event_callback(ioc, msix_index, reply);
747
748 return 1;
749 }
750
751 /**
752 * _base_get_cb_idx - obtain the callback index
753 * @ioc: per adapter object
754 * @smid: system request message index
755 *
756 * Return callback index.
757 */
758 static u8
759 _base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid)
760 {
761 int i;
762 u8 cb_idx;
763
764 if (smid < ioc->hi_priority_smid) {
765 i = smid - 1;
766 cb_idx = ioc->scsi_lookup[i].cb_idx;
767 } else if (smid < ioc->internal_smid) {
768 i = smid - ioc->hi_priority_smid;
769 cb_idx = ioc->hpr_lookup[i].cb_idx;
770 } else if (smid <= ioc->hba_queue_depth) {
771 i = smid - ioc->internal_smid;
772 cb_idx = ioc->internal_lookup[i].cb_idx;
773 } else
774 cb_idx = 0xFF;
775 return cb_idx;
776 }
777
778 /**
779 * _base_mask_interrupts - disable interrupts
780 * @ioc: per adapter object
781 *
782 * Disabling ResetIRQ, Reply and Doorbell Interrupts
783 *
784 * Return nothing.
785 */
786 static void
787 _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
788 {
789 u32 him_register;
790
791 ioc->mask_interrupts = 1;
792 him_register = readl(&ioc->chip->HostInterruptMask);
793 him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
794 writel(him_register, &ioc->chip->HostInterruptMask);
795 readl(&ioc->chip->HostInterruptMask);
796 }
797
798 /**
799 * _base_unmask_interrupts - enable interrupts
800 * @ioc: per adapter object
801 *
802 * Enabling only Reply Interrupts
803 *
804 * Return nothing.
805 */
806 static void
807 _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
808 {
809 u32 him_register;
810
811 him_register = readl(&ioc->chip->HostInterruptMask);
812 him_register &= ~MPI2_HIM_RIM;
813 writel(him_register, &ioc->chip->HostInterruptMask);
814 ioc->mask_interrupts = 0;
815 }
816
817 union reply_descriptor {
818 u64 word;
819 struct {
820 u32 low;
821 u32 high;
822 } u;
823 };
824
825 /**
826 * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
827 * @irq: irq number (not used)
828 * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
829 * @r: pt_regs pointer (not used)
830 *
831 * Return IRQ_HANDLE if processed, else IRQ_NONE.
832 */
833 static irqreturn_t
834 _base_interrupt(int irq, void *bus_id)
835 {
836 struct adapter_reply_queue *reply_q = bus_id;
837 union reply_descriptor rd;
838 u32 completed_cmds;
839 u8 request_desript_type;
840 u16 smid;
841 u8 cb_idx;
842 u32 reply;
843 u8 msix_index = reply_q->msix_index;
844 struct MPT2SAS_ADAPTER *ioc = reply_q->ioc;
845 Mpi2ReplyDescriptorsUnion_t *rpf;
846 u8 rc;
847
848 if (ioc->mask_interrupts)
849 return IRQ_NONE;
850
851 if (!atomic_add_unless(&reply_q->busy, 1, 1))
852 return IRQ_NONE;
853
854 rpf = &reply_q->reply_post_free[reply_q->reply_post_host_index];
855 request_desript_type = rpf->Default.ReplyFlags
856 & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
857 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) {
858 atomic_dec(&reply_q->busy);
859 return IRQ_NONE;
860 }
861
862 completed_cmds = 0;
863 cb_idx = 0xFF;
864 do {
865 rd.word = le64_to_cpu(rpf->Words);
866 if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
867 goto out;
868 reply = 0;
869 smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
870 if (request_desript_type ==
871 MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
872 reply = le32_to_cpu
873 (rpf->AddressReply.ReplyFrameAddress);
874 if (reply > ioc->reply_dma_max_address ||
875 reply < ioc->reply_dma_min_address)
876 reply = 0;
877 } else if (request_desript_type ==
878 MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
879 goto next;
880 else if (request_desript_type ==
881 MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
882 goto next;
883 if (smid)
884 cb_idx = _base_get_cb_idx(ioc, smid);
885 if (smid && cb_idx != 0xFF) {
886 rc = mpt_callbacks[cb_idx](ioc, smid, msix_index,
887 reply);
888 if (reply)
889 _base_display_reply_info(ioc, smid, msix_index,
890 reply);
891 if (rc)
892 mpt2sas_base_free_smid(ioc, smid);
893 }
894 if (!smid)
895 _base_async_event(ioc, msix_index, reply);
896
897 /* reply free queue handling */
898 if (reply) {
899 ioc->reply_free_host_index =
900 (ioc->reply_free_host_index ==
901 (ioc->reply_free_queue_depth - 1)) ?
902 0 : ioc->reply_free_host_index + 1;
903 ioc->reply_free[ioc->reply_free_host_index] =
904 cpu_to_le32(reply);
905 wmb();
906 writel(ioc->reply_free_host_index,
907 &ioc->chip->ReplyFreeHostIndex);
908 }
909
910 next:
911
912 rpf->Words = cpu_to_le64(ULLONG_MAX);
913 reply_q->reply_post_host_index =
914 (reply_q->reply_post_host_index ==
915 (ioc->reply_post_queue_depth - 1)) ? 0 :
916 reply_q->reply_post_host_index + 1;
917 request_desript_type =
918 reply_q->reply_post_free[reply_q->reply_post_host_index].
919 Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
920 completed_cmds++;
921 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
922 goto out;
923 if (!reply_q->reply_post_host_index)
924 rpf = reply_q->reply_post_free;
925 else
926 rpf++;
927 } while (1);
928
929 out:
930
931 if (!completed_cmds) {
932 atomic_dec(&reply_q->busy);
933 return IRQ_NONE;
934 }
935 wmb();
936 if (ioc->is_warpdrive) {
937 writel(reply_q->reply_post_host_index,
938 ioc->reply_post_host_index[msix_index]);
939 atomic_dec(&reply_q->busy);
940 return IRQ_HANDLED;
941 }
942 writel(reply_q->reply_post_host_index | (msix_index <<
943 MPI2_RPHI_MSIX_INDEX_SHIFT), &ioc->chip->ReplyPostHostIndex);
944 atomic_dec(&reply_q->busy);
945 return IRQ_HANDLED;
946 }
947
948 /**
949 * _base_is_controller_msix_enabled - is controller support muli-reply queues
950 * @ioc: per adapter object
951 *
952 */
953 static inline int
954 _base_is_controller_msix_enabled(struct MPT2SAS_ADAPTER *ioc)
955 {
956 return (ioc->facts.IOCCapabilities &
957 MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX) && ioc->msix_enable;
958 }
959
960 /**
961 * mpt2sas_base_flush_reply_queues - flushing the MSIX reply queues
962 * @ioc: per adapter object
963 * Context: ISR conext
964 *
965 * Called when a Task Management request has completed. We want
966 * to flush the other reply queues so all the outstanding IO has been
967 * completed back to OS before we process the TM completetion.
968 *
969 * Return nothing.
970 */
971 void
972 mpt2sas_base_flush_reply_queues(struct MPT2SAS_ADAPTER *ioc)
973 {
974 struct adapter_reply_queue *reply_q;
975
976 /* If MSIX capability is turned off
977 * then multi-queues are not enabled
978 */
979 if (!_base_is_controller_msix_enabled(ioc))
980 return;
981
982 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
983 if (ioc->shost_recovery)
984 return;
985 /* TMs are on msix_index == 0 */
986 if (reply_q->msix_index == 0)
987 continue;
988 _base_interrupt(reply_q->vector, (void *)reply_q);
989 }
990 }
991
992 /**
993 * mpt2sas_base_release_callback_handler - clear interrupt callback handler
994 * @cb_idx: callback index
995 *
996 * Return nothing.
997 */
998 void
999 mpt2sas_base_release_callback_handler(u8 cb_idx)
1000 {
1001 mpt_callbacks[cb_idx] = NULL;
1002 }
1003
1004 /**
1005 * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
1006 * @cb_func: callback function
1007 *
1008 * Returns cb_func.
1009 */
1010 u8
1011 mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
1012 {
1013 u8 cb_idx;
1014
1015 for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
1016 if (mpt_callbacks[cb_idx] == NULL)
1017 break;
1018
1019 mpt_callbacks[cb_idx] = cb_func;
1020 return cb_idx;
1021 }
1022
1023 /**
1024 * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
1025 *
1026 * Return nothing.
1027 */
1028 void
1029 mpt2sas_base_initialize_callback_handler(void)
1030 {
1031 u8 cb_idx;
1032
1033 for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
1034 mpt2sas_base_release_callback_handler(cb_idx);
1035 }
1036
1037 /**
1038 * mpt2sas_base_build_zero_len_sge - build zero length sg entry
1039 * @ioc: per adapter object
1040 * @paddr: virtual address for SGE
1041 *
1042 * Create a zero length scatter gather entry to insure the IOCs hardware has
1043 * something to use if the target device goes brain dead and tries
1044 * to send data even when none is asked for.
1045 *
1046 * Return nothing.
1047 */
1048 void
1049 mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
1050 {
1051 u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
1052 MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
1053 MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
1054 MPI2_SGE_FLAGS_SHIFT);
1055 ioc->base_add_sg_single(paddr, flags_length, -1);
1056 }
1057
1058 /**
1059 * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
1060 * @paddr: virtual address for SGE
1061 * @flags_length: SGE flags and data transfer length
1062 * @dma_addr: Physical address
1063 *
1064 * Return nothing.
1065 */
1066 static void
1067 _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
1068 {
1069 Mpi2SGESimple32_t *sgel = paddr;
1070
1071 flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
1072 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
1073 sgel->FlagsLength = cpu_to_le32(flags_length);
1074 sgel->Address = cpu_to_le32(dma_addr);
1075 }
1076
1077
1078 /**
1079 * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
1080 * @paddr: virtual address for SGE
1081 * @flags_length: SGE flags and data transfer length
1082 * @dma_addr: Physical address
1083 *
1084 * Return nothing.
1085 */
1086 static void
1087 _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
1088 {
1089 Mpi2SGESimple64_t *sgel = paddr;
1090
1091 flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
1092 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
1093 sgel->FlagsLength = cpu_to_le32(flags_length);
1094 sgel->Address = cpu_to_le64(dma_addr);
1095 }
1096
1097 #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
1098
1099 /**
1100 * _base_config_dma_addressing - set dma addressing
1101 * @ioc: per adapter object
1102 * @pdev: PCI device struct
1103 *
1104 * Returns 0 for success, non-zero for failure.
1105 */
1106 static int
1107 _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
1108 {
1109 struct sysinfo s;
1110 char *desc = NULL;
1111
1112 if (sizeof(dma_addr_t) > 4) {
1113 const uint64_t required_mask =
1114 dma_get_required_mask(&pdev->dev);
1115 if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
1116 DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
1117 DMA_BIT_MASK(64))) {
1118 ioc->base_add_sg_single = &_base_add_sg_single_64;
1119 ioc->sge_size = sizeof(Mpi2SGESimple64_t);
1120 desc = "64";
1121 goto out;
1122 }
1123 }
1124
1125 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
1126 && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
1127 ioc->base_add_sg_single = &_base_add_sg_single_32;
1128 ioc->sge_size = sizeof(Mpi2SGESimple32_t);
1129 desc = "32";
1130 } else
1131 return -ENODEV;
1132
1133 out:
1134 si_meminfo(&s);
1135 printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
1136 "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
1137
1138 return 0;
1139 }
1140
1141 /**
1142 * _base_check_enable_msix - checks MSIX capabable.
1143 * @ioc: per adapter object
1144 *
1145 * Check to see if card is capable of MSIX, and set number
1146 * of available msix vectors
1147 */
1148 static int
1149 _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
1150 {
1151 int base;
1152 u16 message_control;
1153
1154
1155 base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
1156 if (!base) {
1157 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
1158 "supported\n", ioc->name));
1159 return -EINVAL;
1160 }
1161
1162 /* get msix vector count */
1163 /* NUMA_IO not supported for older controllers */
1164 if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2004 ||
1165 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 ||
1166 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_1 ||
1167 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_2 ||
1168 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_3 ||
1169 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_1 ||
1170 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_2)
1171 ioc->msix_vector_count = 1;
1172 else {
1173 pci_read_config_word(ioc->pdev, base + 2, &message_control);
1174 ioc->msix_vector_count = (message_control & 0x3FF) + 1;
1175 }
1176 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
1177 "vector_count(%d)\n", ioc->name, ioc->msix_vector_count));
1178
1179 return 0;
1180 }
1181
1182 /**
1183 * _base_free_irq - free irq
1184 * @ioc: per adapter object
1185 *
1186 * Freeing respective reply_queue from the list.
1187 */
1188 static void
1189 _base_free_irq(struct MPT2SAS_ADAPTER *ioc)
1190 {
1191 struct adapter_reply_queue *reply_q, *next;
1192
1193 if (list_empty(&ioc->reply_queue_list))
1194 return;
1195
1196 list_for_each_entry_safe(reply_q, next, &ioc->reply_queue_list, list) {
1197 list_del(&reply_q->list);
1198 synchronize_irq(reply_q->vector);
1199 free_irq(reply_q->vector, reply_q);
1200 kfree(reply_q);
1201 }
1202 }
1203
1204 /**
1205 * _base_request_irq - request irq
1206 * @ioc: per adapter object
1207 * @index: msix index into vector table
1208 * @vector: irq vector
1209 *
1210 * Inserting respective reply_queue into the list.
1211 */
1212 static int
1213 _base_request_irq(struct MPT2SAS_ADAPTER *ioc, u8 index, u32 vector)
1214 {
1215 struct adapter_reply_queue *reply_q;
1216 int r;
1217
1218 reply_q = kzalloc(sizeof(struct adapter_reply_queue), GFP_KERNEL);
1219 if (!reply_q) {
1220 printk(MPT2SAS_ERR_FMT "unable to allocate memory %d!\n",
1221 ioc->name, (int)sizeof(struct adapter_reply_queue));
1222 return -ENOMEM;
1223 }
1224 reply_q->ioc = ioc;
1225 reply_q->msix_index = index;
1226 reply_q->vector = vector;
1227 atomic_set(&reply_q->busy, 0);
1228 if (ioc->msix_enable)
1229 snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d-msix%d",
1230 MPT2SAS_DRIVER_NAME, ioc->id, index);
1231 else
1232 snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d",
1233 MPT2SAS_DRIVER_NAME, ioc->id);
1234 r = request_irq(vector, _base_interrupt, IRQF_SHARED, reply_q->name,
1235 reply_q);
1236 if (r) {
1237 printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
1238 reply_q->name, vector);
1239 kfree(reply_q);
1240 return -EBUSY;
1241 }
1242
1243 INIT_LIST_HEAD(&reply_q->list);
1244 list_add_tail(&reply_q->list, &ioc->reply_queue_list);
1245 return 0;
1246 }
1247
1248 /**
1249 * _base_assign_reply_queues - assigning msix index for each cpu
1250 * @ioc: per adapter object
1251 *
1252 * The enduser would need to set the affinity via /proc/irq/#/smp_affinity
1253 *
1254 * It would nice if we could call irq_set_affinity, however it is not
1255 * an exported symbol
1256 */
1257 static void
1258 _base_assign_reply_queues(struct MPT2SAS_ADAPTER *ioc)
1259 {
1260 struct adapter_reply_queue *reply_q;
1261 int cpu_id;
1262 int cpu_grouping, loop, grouping, grouping_mod;
1263
1264 if (!_base_is_controller_msix_enabled(ioc))
1265 return;
1266
1267 memset(ioc->cpu_msix_table, 0, ioc->cpu_msix_table_sz);
1268 /* when there are more cpus than available msix vectors,
1269 * then group cpus togeather on same irq
1270 */
1271 if (ioc->cpu_count > ioc->msix_vector_count) {
1272 grouping = ioc->cpu_count / ioc->msix_vector_count;
1273 grouping_mod = ioc->cpu_count % ioc->msix_vector_count;
1274 if (grouping < 2 || (grouping == 2 && !grouping_mod))
1275 cpu_grouping = 2;
1276 else if (grouping < 4 || (grouping == 4 && !grouping_mod))
1277 cpu_grouping = 4;
1278 else if (grouping < 8 || (grouping == 8 && !grouping_mod))
1279 cpu_grouping = 8;
1280 else
1281 cpu_grouping = 16;
1282 } else
1283 cpu_grouping = 0;
1284
1285 loop = 0;
1286 reply_q = list_entry(ioc->reply_queue_list.next,
1287 struct adapter_reply_queue, list);
1288 for_each_online_cpu(cpu_id) {
1289 if (!cpu_grouping) {
1290 ioc->cpu_msix_table[cpu_id] = reply_q->msix_index;
1291 reply_q = list_entry(reply_q->list.next,
1292 struct adapter_reply_queue, list);
1293 } else {
1294 if (loop < cpu_grouping) {
1295 ioc->cpu_msix_table[cpu_id] =
1296 reply_q->msix_index;
1297 loop++;
1298 } else {
1299 reply_q = list_entry(reply_q->list.next,
1300 struct adapter_reply_queue, list);
1301 ioc->cpu_msix_table[cpu_id] =
1302 reply_q->msix_index;
1303 loop = 1;
1304 }
1305 }
1306 }
1307 }
1308
1309 /**
1310 * _base_disable_msix - disables msix
1311 * @ioc: per adapter object
1312 *
1313 */
1314 static void
1315 _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
1316 {
1317 if (ioc->msix_enable) {
1318 pci_disable_msix(ioc->pdev);
1319 ioc->msix_enable = 0;
1320 }
1321 }
1322
1323 /**
1324 * _base_enable_msix - enables msix, failback to io_apic
1325 * @ioc: per adapter object
1326 *
1327 */
1328 static int
1329 _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
1330 {
1331 struct msix_entry *entries, *a;
1332 int r;
1333 int i;
1334 u8 try_msix = 0;
1335
1336 INIT_LIST_HEAD(&ioc->reply_queue_list);
1337
1338 if (msix_disable == -1 || msix_disable == 0)
1339 try_msix = 1;
1340
1341 if (!try_msix)
1342 goto try_ioapic;
1343
1344 if (_base_check_enable_msix(ioc) != 0)
1345 goto try_ioapic;
1346
1347 ioc->reply_queue_count = min_t(u8, ioc->cpu_count,
1348 ioc->msix_vector_count);
1349
1350 entries = kcalloc(ioc->reply_queue_count, sizeof(struct msix_entry),
1351 GFP_KERNEL);
1352 if (!entries) {
1353 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "kcalloc "
1354 "failed @ at %s:%d/%s() !!!\n", ioc->name, __FILE__,
1355 __LINE__, __func__));
1356 goto try_ioapic;
1357 }
1358
1359 for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++)
1360 a->entry = i;
1361
1362 r = pci_enable_msix(ioc->pdev, entries, ioc->reply_queue_count);
1363 if (r) {
1364 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
1365 "failed (r=%d) !!!\n", ioc->name, r));
1366 kfree(entries);
1367 goto try_ioapic;
1368 }
1369
1370 ioc->msix_enable = 1;
1371 for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++) {
1372 r = _base_request_irq(ioc, i, a->vector);
1373 if (r) {
1374 _base_free_irq(ioc);
1375 _base_disable_msix(ioc);
1376 kfree(entries);
1377 goto try_ioapic;
1378 }
1379 }
1380
1381 kfree(entries);
1382 return 0;
1383
1384 /* failback to io_apic interrupt routing */
1385 try_ioapic:
1386
1387 r = _base_request_irq(ioc, 0, ioc->pdev->irq);
1388
1389 return r;
1390 }
1391
1392 /**
1393 * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
1394 * @ioc: per adapter object
1395 *
1396 * Returns 0 for success, non-zero for failure.
1397 */
1398 int
1399 mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
1400 {
1401 struct pci_dev *pdev = ioc->pdev;
1402 u32 memap_sz;
1403 u32 pio_sz;
1404 int i, r = 0;
1405 u64 pio_chip = 0;
1406 u64 chip_phys = 0;
1407 struct adapter_reply_queue *reply_q;
1408
1409 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n",
1410 ioc->name, __func__));
1411
1412 ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
1413 if (pci_enable_device_mem(pdev)) {
1414 printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
1415 "failed\n", ioc->name);
1416 return -ENODEV;
1417 }
1418
1419
1420 if (pci_request_selected_regions(pdev, ioc->bars,
1421 MPT2SAS_DRIVER_NAME)) {
1422 printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
1423 "failed\n", ioc->name);
1424 r = -ENODEV;
1425 goto out_fail;
1426 }
1427
1428 /* AER (Advanced Error Reporting) hooks */
1429 pci_enable_pcie_error_reporting(pdev);
1430
1431 pci_set_master(pdev);
1432
1433 if (_base_config_dma_addressing(ioc, pdev) != 0) {
1434 printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
1435 ioc->name, pci_name(pdev));
1436 r = -ENODEV;
1437 goto out_fail;
1438 }
1439
1440 for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
1441 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1442 if (pio_sz)
1443 continue;
1444 pio_chip = (u64)pci_resource_start(pdev, i);
1445 pio_sz = pci_resource_len(pdev, i);
1446 } else {
1447 if (memap_sz)
1448 continue;
1449 /* verify memory resource is valid before using */
1450 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
1451 ioc->chip_phys = pci_resource_start(pdev, i);
1452 chip_phys = (u64)ioc->chip_phys;
1453 memap_sz = pci_resource_len(pdev, i);
1454 ioc->chip = ioremap(ioc->chip_phys, memap_sz);
1455 if (ioc->chip == NULL) {
1456 printk(MPT2SAS_ERR_FMT "unable to map "
1457 "adapter memory!\n", ioc->name);
1458 r = -EINVAL;
1459 goto out_fail;
1460 }
1461 }
1462 }
1463 }
1464
1465 _base_mask_interrupts(ioc);
1466 r = _base_enable_msix(ioc);
1467 if (r)
1468 goto out_fail;
1469
1470 list_for_each_entry(reply_q, &ioc->reply_queue_list, list)
1471 printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
1472 reply_q->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
1473 "IO-APIC enabled"), reply_q->vector);
1474
1475 printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
1476 ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
1477 printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n",
1478 ioc->name, (unsigned long long)pio_chip, pio_sz);
1479
1480 /* Save PCI configuration state for recovery from PCI AER/EEH errors */
1481 pci_save_state(pdev);
1482
1483 return 0;
1484
1485 out_fail:
1486 if (ioc->chip_phys)
1487 iounmap(ioc->chip);
1488 ioc->chip_phys = 0;
1489 pci_release_selected_regions(ioc->pdev, ioc->bars);
1490 pci_disable_pcie_error_reporting(pdev);
1491 pci_disable_device(pdev);
1492 return r;
1493 }
1494
1495 /**
1496 * mpt2sas_base_get_msg_frame - obtain request mf pointer
1497 * @ioc: per adapter object
1498 * @smid: system request message index(smid zero is invalid)
1499 *
1500 * Returns virt pointer to message frame.
1501 */
1502 void *
1503 mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1504 {
1505 return (void *)(ioc->request + (smid * ioc->request_sz));
1506 }
1507
1508 /**
1509 * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
1510 * @ioc: per adapter object
1511 * @smid: system request message index
1512 *
1513 * Returns virt pointer to sense buffer.
1514 */
1515 void *
1516 mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1517 {
1518 return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
1519 }
1520
1521 /**
1522 * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
1523 * @ioc: per adapter object
1524 * @smid: system request message index
1525 *
1526 * Returns phys pointer to the low 32bit address of the sense buffer.
1527 */
1528 __le32
1529 mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1530 {
1531 return cpu_to_le32(ioc->sense_dma +
1532 ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
1533 }
1534
1535 /**
1536 * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
1537 * @ioc: per adapter object
1538 * @phys_addr: lower 32 physical addr of the reply
1539 *
1540 * Converts 32bit lower physical addr into a virt address.
1541 */
1542 void *
1543 mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
1544 {
1545 if (!phys_addr)
1546 return NULL;
1547 return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
1548 }
1549
1550 /**
1551 * mpt2sas_base_get_smid - obtain a free smid from internal queue
1552 * @ioc: per adapter object
1553 * @cb_idx: callback index
1554 *
1555 * Returns smid (zero is invalid)
1556 */
1557 u16
1558 mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
1559 {
1560 unsigned long flags;
1561 struct request_tracker *request;
1562 u16 smid;
1563
1564 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1565 if (list_empty(&ioc->internal_free_list)) {
1566 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1567 printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
1568 ioc->name, __func__);
1569 return 0;
1570 }
1571
1572 request = list_entry(ioc->internal_free_list.next,
1573 struct request_tracker, tracker_list);
1574 request->cb_idx = cb_idx;
1575 smid = request->smid;
1576 list_del(&request->tracker_list);
1577 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1578 return smid;
1579 }
1580
1581 /**
1582 * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
1583 * @ioc: per adapter object
1584 * @cb_idx: callback index
1585 * @scmd: pointer to scsi command object
1586 *
1587 * Returns smid (zero is invalid)
1588 */
1589 u16
1590 mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx,
1591 struct scsi_cmnd *scmd)
1592 {
1593 unsigned long flags;
1594 struct scsiio_tracker *request;
1595 u16 smid;
1596
1597 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1598 if (list_empty(&ioc->free_list)) {
1599 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1600 printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
1601 ioc->name, __func__);
1602 return 0;
1603 }
1604
1605 request = list_entry(ioc->free_list.next,
1606 struct scsiio_tracker, tracker_list);
1607 request->scmd = scmd;
1608 request->cb_idx = cb_idx;
1609 smid = request->smid;
1610 list_del(&request->tracker_list);
1611 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1612 return smid;
1613 }
1614
1615 /**
1616 * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
1617 * @ioc: per adapter object
1618 * @cb_idx: callback index
1619 *
1620 * Returns smid (zero is invalid)
1621 */
1622 u16
1623 mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
1624 {
1625 unsigned long flags;
1626 struct request_tracker *request;
1627 u16 smid;
1628
1629 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1630 if (list_empty(&ioc->hpr_free_list)) {
1631 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1632 return 0;
1633 }
1634
1635 request = list_entry(ioc->hpr_free_list.next,
1636 struct request_tracker, tracker_list);
1637 request->cb_idx = cb_idx;
1638 smid = request->smid;
1639 list_del(&request->tracker_list);
1640 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1641 return smid;
1642 }
1643
1644
1645 /**
1646 * mpt2sas_base_free_smid - put smid back on free_list
1647 * @ioc: per adapter object
1648 * @smid: system request message index
1649 *
1650 * Return nothing.
1651 */
1652 void
1653 mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1654 {
1655 unsigned long flags;
1656 int i;
1657 struct chain_tracker *chain_req, *next;
1658
1659 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1660 if (smid < ioc->hi_priority_smid) {
1661 /* scsiio queue */
1662 i = smid - 1;
1663 if (!list_empty(&ioc->scsi_lookup[i].chain_list)) {
1664 list_for_each_entry_safe(chain_req, next,
1665 &ioc->scsi_lookup[i].chain_list, tracker_list) {
1666 list_del_init(&chain_req->tracker_list);
1667 list_add_tail(&chain_req->tracker_list,
1668 &ioc->free_chain_list);
1669 }
1670 }
1671 ioc->scsi_lookup[i].cb_idx = 0xFF;
1672 ioc->scsi_lookup[i].scmd = NULL;
1673 ioc->scsi_lookup[i].direct_io = 0;
1674 list_add_tail(&ioc->scsi_lookup[i].tracker_list,
1675 &ioc->free_list);
1676 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1677
1678 /*
1679 * See _wait_for_commands_to_complete() call with regards
1680 * to this code.
1681 */
1682 if (ioc->shost_recovery && ioc->pending_io_count) {
1683 if (ioc->pending_io_count == 1)
1684 wake_up(&ioc->reset_wq);
1685 ioc->pending_io_count--;
1686 }
1687 return;
1688 } else if (smid < ioc->internal_smid) {
1689 /* hi-priority */
1690 i = smid - ioc->hi_priority_smid;
1691 ioc->hpr_lookup[i].cb_idx = 0xFF;
1692 list_add_tail(&ioc->hpr_lookup[i].tracker_list,
1693 &ioc->hpr_free_list);
1694 } else if (smid <= ioc->hba_queue_depth) {
1695 /* internal queue */
1696 i = smid - ioc->internal_smid;
1697 ioc->internal_lookup[i].cb_idx = 0xFF;
1698 list_add_tail(&ioc->internal_lookup[i].tracker_list,
1699 &ioc->internal_free_list);
1700 }
1701 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1702 }
1703
1704 /**
1705 * _base_writeq - 64 bit write to MMIO
1706 * @ioc: per adapter object
1707 * @b: data payload
1708 * @addr: address in MMIO space
1709 * @writeq_lock: spin lock
1710 *
1711 * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
1712 * care of 32 bit environment where its not quarenteed to send the entire word
1713 * in one transfer.
1714 */
1715 #ifndef writeq
1716 static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
1717 spinlock_t *writeq_lock)
1718 {
1719 unsigned long flags;
1720 __u64 data_out = cpu_to_le64(b);
1721
1722 spin_lock_irqsave(writeq_lock, flags);
1723 writel((u32)(data_out), addr);
1724 writel((u32)(data_out >> 32), (addr + 4));
1725 spin_unlock_irqrestore(writeq_lock, flags);
1726 }
1727 #else
1728 static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
1729 spinlock_t *writeq_lock)
1730 {
1731 writeq(cpu_to_le64(b), addr);
1732 }
1733 #endif
1734
1735 static inline u8
1736 _base_get_msix_index(struct MPT2SAS_ADAPTER *ioc)
1737 {
1738 return ioc->cpu_msix_table[smp_processor_id()];
1739 }
1740
1741 /**
1742 * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
1743 * @ioc: per adapter object
1744 * @smid: system request message index
1745 * @handle: device handle
1746 *
1747 * Return nothing.
1748 */
1749 void
1750 mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle)
1751 {
1752 Mpi2RequestDescriptorUnion_t descriptor;
1753 u64 *request = (u64 *)&descriptor;
1754
1755
1756 descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
1757 descriptor.SCSIIO.MSIxIndex = _base_get_msix_index(ioc);
1758 descriptor.SCSIIO.SMID = cpu_to_le16(smid);
1759 descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
1760 descriptor.SCSIIO.LMID = 0;
1761 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1762 &ioc->scsi_lookup_lock);
1763 }
1764
1765
1766 /**
1767 * mpt2sas_base_put_smid_hi_priority - send Task Management request to firmware
1768 * @ioc: per adapter object
1769 * @smid: system request message index
1770 *
1771 * Return nothing.
1772 */
1773 void
1774 mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1775 {
1776 Mpi2RequestDescriptorUnion_t descriptor;
1777 u64 *request = (u64 *)&descriptor;
1778
1779 descriptor.HighPriority.RequestFlags =
1780 MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
1781 descriptor.HighPriority.MSIxIndex = 0;
1782 descriptor.HighPriority.SMID = cpu_to_le16(smid);
1783 descriptor.HighPriority.LMID = 0;
1784 descriptor.HighPriority.Reserved1 = 0;
1785 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1786 &ioc->scsi_lookup_lock);
1787 }
1788
1789 /**
1790 * mpt2sas_base_put_smid_default - Default, primarily used for config pages
1791 * @ioc: per adapter object
1792 * @smid: system request message index
1793 *
1794 * Return nothing.
1795 */
1796 void
1797 mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1798 {
1799 Mpi2RequestDescriptorUnion_t descriptor;
1800 u64 *request = (u64 *)&descriptor;
1801
1802 descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
1803 descriptor.Default.MSIxIndex = _base_get_msix_index(ioc);
1804 descriptor.Default.SMID = cpu_to_le16(smid);
1805 descriptor.Default.LMID = 0;
1806 descriptor.Default.DescriptorTypeDependent = 0;
1807 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1808 &ioc->scsi_lookup_lock);
1809 }
1810
1811 /**
1812 * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
1813 * @ioc: per adapter object
1814 * @smid: system request message index
1815 * @io_index: value used to track the IO
1816 *
1817 * Return nothing.
1818 */
1819 void
1820 mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
1821 u16 io_index)
1822 {
1823 Mpi2RequestDescriptorUnion_t descriptor;
1824 u64 *request = (u64 *)&descriptor;
1825
1826 descriptor.SCSITarget.RequestFlags =
1827 MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
1828 descriptor.SCSITarget.MSIxIndex = _base_get_msix_index(ioc);
1829 descriptor.SCSITarget.SMID = cpu_to_le16(smid);
1830 descriptor.SCSITarget.LMID = 0;
1831 descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
1832 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1833 &ioc->scsi_lookup_lock);
1834 }
1835
1836 /**
1837 * _base_display_dell_branding - Disply branding string
1838 * @ioc: per adapter object
1839 *
1840 * Return nothing.
1841 */
1842 static void
1843 _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
1844 {
1845 char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
1846
1847 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
1848 return;
1849
1850 memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
1851 switch (ioc->pdev->subsystem_device) {
1852 case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
1853 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
1854 MPT2SAS_DELL_BRANDING_SIZE - 1);
1855 break;
1856 case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
1857 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
1858 MPT2SAS_DELL_BRANDING_SIZE - 1);
1859 break;
1860 case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
1861 strncpy(dell_branding,
1862 MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
1863 MPT2SAS_DELL_BRANDING_SIZE - 1);
1864 break;
1865 case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
1866 strncpy(dell_branding,
1867 MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
1868 MPT2SAS_DELL_BRANDING_SIZE - 1);
1869 break;
1870 case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
1871 strncpy(dell_branding,
1872 MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
1873 MPT2SAS_DELL_BRANDING_SIZE - 1);
1874 break;
1875 case MPT2SAS_DELL_PERC_H200_SSDID:
1876 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
1877 MPT2SAS_DELL_BRANDING_SIZE - 1);
1878 break;
1879 case MPT2SAS_DELL_6GBPS_SAS_SSDID:
1880 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
1881 MPT2SAS_DELL_BRANDING_SIZE - 1);
1882 break;
1883 default:
1884 sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
1885 break;
1886 }
1887
1888 printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
1889 " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
1890 ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
1891 ioc->pdev->subsystem_device);
1892 }
1893
1894 /**
1895 * _base_display_intel_branding - Display branding string
1896 * @ioc: per adapter object
1897 *
1898 * Return nothing.
1899 */
1900 static void
1901 _base_display_intel_branding(struct MPT2SAS_ADAPTER *ioc)
1902 {
1903 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_INTEL)
1904 return;
1905
1906 switch (ioc->pdev->device) {
1907 case MPI2_MFGPAGE_DEVID_SAS2008:
1908 switch (ioc->pdev->subsystem_device) {
1909 case MPT2SAS_INTEL_RMS2LL080_SSDID:
1910 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1911 MPT2SAS_INTEL_RMS2LL080_BRANDING);
1912 break;
1913 case MPT2SAS_INTEL_RMS2LL040_SSDID:
1914 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1915 MPT2SAS_INTEL_RMS2LL040_BRANDING);
1916 break;
1917 default:
1918 break;
1919 }
1920 case MPI2_MFGPAGE_DEVID_SAS2308_2:
1921 switch (ioc->pdev->subsystem_device) {
1922 case MPT2SAS_INTEL_RS25GB008_SSDID:
1923 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1924 MPT2SAS_INTEL_RS25GB008_BRANDING);
1925 break;
1926 default:
1927 break;
1928 }
1929 default:
1930 break;
1931 }
1932 }
1933
1934 /**
1935 * _base_display_hp_branding - Display branding string
1936 * @ioc: per adapter object
1937 *
1938 * Return nothing.
1939 */
1940 static void
1941 _base_display_hp_branding(struct MPT2SAS_ADAPTER *ioc)
1942 {
1943 if (ioc->pdev->subsystem_vendor != MPT2SAS_HP_3PAR_SSVID)
1944 return;
1945
1946 switch (ioc->pdev->device) {
1947 case MPI2_MFGPAGE_DEVID_SAS2004:
1948 switch (ioc->pdev->subsystem_device) {
1949 case MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID:
1950 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1951 MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING);
1952 break;
1953 default:
1954 break;
1955 }
1956 case MPI2_MFGPAGE_DEVID_SAS2308_2:
1957 switch (ioc->pdev->subsystem_device) {
1958 case MPT2SAS_HP_2_4_INTERNAL_SSDID:
1959 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1960 MPT2SAS_HP_2_4_INTERNAL_BRANDING);
1961 break;
1962 case MPT2SAS_HP_2_4_EXTERNAL_SSDID:
1963 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1964 MPT2SAS_HP_2_4_EXTERNAL_BRANDING);
1965 break;
1966 case MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID:
1967 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1968 MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING);
1969 break;
1970 case MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID:
1971 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1972 MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING);
1973 break;
1974 default:
1975 break;
1976 }
1977 default:
1978 break;
1979 }
1980 }
1981
1982 /**
1983 * _base_display_ioc_capabilities - Disply IOC's capabilities.
1984 * @ioc: per adapter object
1985 *
1986 * Return nothing.
1987 */
1988 static void
1989 _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
1990 {
1991 int i = 0;
1992 char desc[16];
1993 u8 revision;
1994 u32 iounit_pg1_flags;
1995 u32 bios_version;
1996
1997 bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion);
1998 pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision);
1999 strncpy(desc, ioc->manu_pg0.ChipName, 16);
2000 printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
2001 "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
2002 ioc->name, desc,
2003 (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
2004 (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
2005 (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
2006 ioc->facts.FWVersion.Word & 0x000000FF,
2007 revision,
2008 (bios_version & 0xFF000000) >> 24,
2009 (bios_version & 0x00FF0000) >> 16,
2010 (bios_version & 0x0000FF00) >> 8,
2011 bios_version & 0x000000FF);
2012
2013 _base_display_dell_branding(ioc);
2014 _base_display_intel_branding(ioc);
2015 _base_display_hp_branding(ioc);
2016
2017 printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
2018
2019 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
2020 printk("Initiator");
2021 i++;
2022 }
2023
2024 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
2025 printk("%sTarget", i ? "," : "");
2026 i++;
2027 }
2028
2029 i = 0;
2030 printk("), ");
2031 printk("Capabilities=(");
2032
2033 if (!ioc->hide_ir_msg) {
2034 if (ioc->facts.IOCCapabilities &
2035 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
2036 printk("Raid");
2037 i++;
2038 }
2039 }
2040
2041 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
2042 printk("%sTLR", i ? "," : "");
2043 i++;
2044 }
2045
2046 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
2047 printk("%sMulticast", i ? "," : "");
2048 i++;
2049 }
2050
2051 if (ioc->facts.IOCCapabilities &
2052 MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
2053 printk("%sBIDI Target", i ? "," : "");
2054 i++;
2055 }
2056
2057 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
2058 printk("%sEEDP", i ? "," : "");
2059 i++;
2060 }
2061
2062 if (ioc->facts.IOCCapabilities &
2063 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
2064 printk("%sSnapshot Buffer", i ? "," : "");
2065 i++;
2066 }
2067
2068 if (ioc->facts.IOCCapabilities &
2069 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
2070 printk("%sDiag Trace Buffer", i ? "," : "");
2071 i++;
2072 }
2073
2074 if (ioc->facts.IOCCapabilities &
2075 MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
2076 printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : "");
2077 i++;
2078 }
2079
2080 if (ioc->facts.IOCCapabilities &
2081 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
2082 printk("%sTask Set Full", i ? "," : "");
2083 i++;
2084 }
2085
2086 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
2087 if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
2088 printk("%sNCQ", i ? "," : "");
2089 i++;
2090 }
2091
2092 printk(")\n");
2093 }
2094
2095 /**
2096 * _base_update_missing_delay - change the missing delay timers
2097 * @ioc: per adapter object
2098 * @device_missing_delay: amount of time till device is reported missing
2099 * @io_missing_delay: interval IO is returned when there is a missing device
2100 *
2101 * Return nothing.
2102 *
2103 * Passed on the command line, this function will modify the device missing
2104 * delay, as well as the io missing delay. This should be called at driver
2105 * load time.
2106 */
2107 static void
2108 _base_update_missing_delay(struct MPT2SAS_ADAPTER *ioc,
2109 u16 device_missing_delay, u8 io_missing_delay)
2110 {
2111 u16 dmd, dmd_new, dmd_orignal;
2112 u8 io_missing_delay_original;
2113 u16 sz;
2114 Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL;
2115 Mpi2ConfigReply_t mpi_reply;
2116 u8 num_phys = 0;
2117 u16 ioc_status;
2118
2119 mpt2sas_config_get_number_hba_phys(ioc, &num_phys);
2120 if (!num_phys)
2121 return;
2122
2123 sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (num_phys *
2124 sizeof(Mpi2SasIOUnit1PhyData_t));
2125 sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
2126 if (!sas_iounit_pg1) {
2127 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
2128 ioc->name, __FILE__, __LINE__, __func__);
2129 goto out;
2130 }
2131 if ((mpt2sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
2132 sas_iounit_pg1, sz))) {
2133 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
2134 ioc->name, __FILE__, __LINE__, __func__);
2135 goto out;
2136 }
2137 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
2138 MPI2_IOCSTATUS_MASK;
2139 if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
2140 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
2141 ioc->name, __FILE__, __LINE__, __func__);
2142 goto out;
2143 }
2144
2145 /* device missing delay */
2146 dmd = sas_iounit_pg1->ReportDeviceMissingDelay;
2147 if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
2148 dmd = (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
2149 else
2150 dmd = dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
2151 dmd_orignal = dmd;
2152 if (device_missing_delay > 0x7F) {
2153 dmd = (device_missing_delay > 0x7F0) ? 0x7F0 :
2154 device_missing_delay;
2155 dmd = dmd / 16;
2156 dmd |= MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16;
2157 } else
2158 dmd = device_missing_delay;
2159 sas_iounit_pg1->ReportDeviceMissingDelay = dmd;
2160
2161 /* io missing delay */
2162 io_missing_delay_original = sas_iounit_pg1->IODeviceMissingDelay;
2163 sas_iounit_pg1->IODeviceMissingDelay = io_missing_delay;
2164
2165 if (!mpt2sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1,
2166 sz)) {
2167 if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
2168 dmd_new = (dmd &
2169 MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
2170 else
2171 dmd_new =
2172 dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
2173 printk(MPT2SAS_INFO_FMT "device_missing_delay: old(%d), "
2174 "new(%d)\n", ioc->name, dmd_orignal, dmd_new);
2175 printk(MPT2SAS_INFO_FMT "ioc_missing_delay: old(%d), "
2176 "new(%d)\n", ioc->name, io_missing_delay_original,
2177 io_missing_delay);
2178 ioc->device_missing_delay = dmd_new;
2179 ioc->io_missing_delay = io_missing_delay;
2180 }
2181
2182 out:
2183 kfree(sas_iounit_pg1);
2184 }
2185
2186 /**
2187 * _base_static_config_pages - static start of day config pages
2188 * @ioc: per adapter object
2189 *
2190 * Return nothing.
2191 */
2192 static void
2193 _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
2194 {
2195 Mpi2ConfigReply_t mpi_reply;
2196 u32 iounit_pg1_flags;
2197
2198 mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
2199 if (ioc->ir_firmware)
2200 mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
2201 &ioc->manu_pg10);
2202 mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
2203 mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
2204 mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
2205 mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
2206 mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
2207 _base_display_ioc_capabilities(ioc);
2208
2209 /*
2210 * Enable task_set_full handling in iounit_pg1 when the
2211 * facts capabilities indicate that its supported.
2212 */
2213 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
2214 if ((ioc->facts.IOCCapabilities &
2215 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
2216 iounit_pg1_flags &=
2217 ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
2218 else
2219 iounit_pg1_flags |=
2220 MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
2221 ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
2222 mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
2223
2224 }
2225
2226 /**
2227 * _base_release_memory_pools - release memory
2228 * @ioc: per adapter object
2229 *
2230 * Free memory allocated from _base_allocate_memory_pools.
2231 *
2232 * Return nothing.
2233 */
2234 static void
2235 _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
2236 {
2237 int i;
2238
2239 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2240 __func__));
2241
2242 if (ioc->request) {
2243 pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
2244 ioc->request, ioc->request_dma);
2245 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
2246 ": free\n", ioc->name, ioc->request));
2247 ioc->request = NULL;
2248 }
2249
2250 if (ioc->sense) {
2251 pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
2252 if (ioc->sense_dma_pool)
2253 pci_pool_destroy(ioc->sense_dma_pool);
2254 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
2255 ": free\n", ioc->name, ioc->sense));
2256 ioc->sense = NULL;
2257 }
2258
2259 if (ioc->reply) {
2260 pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
2261 if (ioc->reply_dma_pool)
2262 pci_pool_destroy(ioc->reply_dma_pool);
2263 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
2264 ": free\n", ioc->name, ioc->reply));
2265 ioc->reply = NULL;
2266 }
2267
2268 if (ioc->reply_free) {
2269 pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
2270 ioc->reply_free_dma);
2271 if (ioc->reply_free_dma_pool)
2272 pci_pool_destroy(ioc->reply_free_dma_pool);
2273 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
2274 "(0x%p): free\n", ioc->name, ioc->reply_free));
2275 ioc->reply_free = NULL;
2276 }
2277
2278 if (ioc->reply_post_free) {
2279 pci_pool_free(ioc->reply_post_free_dma_pool,
2280 ioc->reply_post_free, ioc->reply_post_free_dma);
2281 if (ioc->reply_post_free_dma_pool)
2282 pci_pool_destroy(ioc->reply_post_free_dma_pool);
2283 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
2284 "reply_post_free_pool(0x%p): free\n", ioc->name,
2285 ioc->reply_post_free));
2286 ioc->reply_post_free = NULL;
2287 }
2288
2289 if (ioc->config_page) {
2290 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
2291 "config_page(0x%p): free\n", ioc->name,
2292 ioc->config_page));
2293 pci_free_consistent(ioc->pdev, ioc->config_page_sz,
2294 ioc->config_page, ioc->config_page_dma);
2295 }
2296
2297 if (ioc->scsi_lookup) {
2298 free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages);
2299 ioc->scsi_lookup = NULL;
2300 }
2301 kfree(ioc->hpr_lookup);
2302 kfree(ioc->internal_lookup);
2303 if (ioc->chain_lookup) {
2304 for (i = 0; i < ioc->chain_depth; i++) {
2305 if (ioc->chain_lookup[i].chain_buffer)
2306 pci_pool_free(ioc->chain_dma_pool,
2307 ioc->chain_lookup[i].chain_buffer,
2308 ioc->chain_lookup[i].chain_buffer_dma);
2309 }
2310 if (ioc->chain_dma_pool)
2311 pci_pool_destroy(ioc->chain_dma_pool);
2312 }
2313 if (ioc->chain_lookup) {
2314 free_pages((ulong)ioc->chain_lookup, ioc->chain_pages);
2315 ioc->chain_lookup = NULL;
2316 }
2317 }
2318
2319
2320 /**
2321 * _base_allocate_memory_pools - allocate start of day memory pools
2322 * @ioc: per adapter object
2323 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2324 *
2325 * Returns 0 success, anything else error
2326 */
2327 static int
2328 _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
2329 {
2330 struct mpt2sas_facts *facts;
2331 u32 queue_size, queue_diff;
2332 u16 max_sge_elements;
2333 u16 num_of_reply_frames;
2334 u16 chains_needed_per_io;
2335 u32 sz, total_sz, reply_post_free_sz;
2336 u32 retry_sz;
2337 u16 max_request_credit;
2338 int i;
2339
2340 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2341 __func__));
2342
2343 retry_sz = 0;
2344 facts = &ioc->facts;
2345
2346 /* command line tunables for max sgl entries */
2347 if (max_sgl_entries != -1) {
2348 ioc->shost->sg_tablesize = (max_sgl_entries <
2349 MPT2SAS_SG_DEPTH) ? max_sgl_entries :
2350 MPT2SAS_SG_DEPTH;
2351 } else {
2352 ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
2353 }
2354
2355 /* command line tunables for max controller queue depth */
2356 if (max_queue_depth != -1)
2357 max_request_credit = (max_queue_depth < facts->RequestCredit)
2358 ? max_queue_depth : facts->RequestCredit;
2359 else
2360 max_request_credit = facts->RequestCredit;
2361
2362 ioc->hba_queue_depth = max_request_credit;
2363 ioc->hi_priority_depth = facts->HighPriorityCredit;
2364 ioc->internal_depth = ioc->hi_priority_depth + 5;
2365
2366 /* request frame size */
2367 ioc->request_sz = facts->IOCRequestFrameSize * 4;
2368
2369 /* reply frame size */
2370 ioc->reply_sz = facts->ReplyFrameSize * 4;
2371
2372 retry_allocation:
2373 total_sz = 0;
2374 /* calculate number of sg elements left over in the 1st frame */
2375 max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
2376 sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
2377 ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
2378
2379 /* now do the same for a chain buffer */
2380 max_sge_elements = ioc->request_sz - ioc->sge_size;
2381 ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
2382
2383 ioc->chain_offset_value_for_main_message =
2384 ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
2385 (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
2386
2387 /*
2388 * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
2389 */
2390 chains_needed_per_io = ((ioc->shost->sg_tablesize -
2391 ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
2392 + 1;
2393 if (chains_needed_per_io > facts->MaxChainDepth) {
2394 chains_needed_per_io = facts->MaxChainDepth;
2395 ioc->shost->sg_tablesize = min_t(u16,
2396 ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
2397 * chains_needed_per_io), ioc->shost->sg_tablesize);
2398 }
2399 ioc->chains_needed_per_io = chains_needed_per_io;
2400
2401 /* reply free queue sizing - taking into account for events */
2402 num_of_reply_frames = ioc->hba_queue_depth + 32;
2403
2404 /* number of replies frames can't be a multiple of 16 */
2405 /* decrease number of reply frames by 1 */
2406 if (!(num_of_reply_frames % 16))
2407 num_of_reply_frames--;
2408
2409 /* calculate number of reply free queue entries
2410 * (must be multiple of 16)
2411 */
2412
2413 /* (we know reply_free_queue_depth is not a multiple of 16) */
2414 queue_size = num_of_reply_frames;
2415 queue_size += 16 - (queue_size % 16);
2416 ioc->reply_free_queue_depth = queue_size;
2417
2418 /* reply descriptor post queue sizing */
2419 /* this size should be the number of request frames + number of reply
2420 * frames
2421 */
2422
2423 queue_size = ioc->hba_queue_depth + num_of_reply_frames + 1;
2424 /* round up to 16 byte boundary */
2425 if (queue_size % 16)
2426 queue_size += 16 - (queue_size % 16);
2427
2428 /* check against IOC maximum reply post queue depth */
2429 if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) {
2430 queue_diff = queue_size -
2431 facts->MaxReplyDescriptorPostQueueDepth;
2432
2433 /* round queue_diff up to multiple of 16 */
2434 if (queue_diff % 16)
2435 queue_diff += 16 - (queue_diff % 16);
2436
2437 /* adjust hba_queue_depth, reply_free_queue_depth,
2438 * and queue_size
2439 */
2440 ioc->hba_queue_depth -= (queue_diff / 2);
2441 ioc->reply_free_queue_depth -= (queue_diff / 2);
2442 queue_size = facts->MaxReplyDescriptorPostQueueDepth;
2443 }
2444 ioc->reply_post_queue_depth = queue_size;
2445
2446 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
2447 "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
2448 "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
2449 ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
2450 ioc->chains_needed_per_io));
2451
2452 ioc->scsiio_depth = ioc->hba_queue_depth -
2453 ioc->hi_priority_depth - ioc->internal_depth;
2454
2455 /* set the scsi host can_queue depth
2456 * with some internal commands that could be outstanding
2457 */
2458 ioc->shost->can_queue = ioc->scsiio_depth - (2);
2459 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: "
2460 "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue));
2461
2462 /* contiguous pool for request and chains, 16 byte align, one extra "
2463 * "frame for smid=0
2464 */
2465 ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
2466 sz = ((ioc->scsiio_depth + 1) * ioc->request_sz);
2467
2468 /* hi-priority queue */
2469 sz += (ioc->hi_priority_depth * ioc->request_sz);
2470
2471 /* internal queue */
2472 sz += (ioc->internal_depth * ioc->request_sz);
2473
2474 ioc->request_dma_sz = sz;
2475 ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
2476 if (!ioc->request) {
2477 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
2478 "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
2479 "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
2480 ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
2481 if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH)
2482 goto out;
2483 retry_sz += 64;
2484 ioc->hba_queue_depth = max_request_credit - retry_sz;
2485 goto retry_allocation;
2486 }
2487
2488 if (retry_sz)
2489 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
2490 "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
2491 "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
2492 ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
2493
2494
2495 /* hi-priority queue */
2496 ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
2497 ioc->request_sz);
2498 ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
2499 ioc->request_sz);
2500
2501 /* internal queue */
2502 ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
2503 ioc->request_sz);
2504 ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
2505 ioc->request_sz);
2506
2507
2508 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
2509 "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
2510 ioc->request, ioc->hba_queue_depth, ioc->request_sz,
2511 (ioc->hba_queue_depth * ioc->request_sz)/1024));
2512 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
2513 ioc->name, (unsigned long long) ioc->request_dma));
2514 total_sz += sz;
2515
2516 sz = ioc->scsiio_depth * sizeof(struct scsiio_tracker);
2517 ioc->scsi_lookup_pages = get_order(sz);
2518 ioc->scsi_lookup = (struct scsiio_tracker *)__get_free_pages(
2519 GFP_KERNEL, ioc->scsi_lookup_pages);
2520 if (!ioc->scsi_lookup) {
2521 printk(MPT2SAS_ERR_FMT "scsi_lookup: get_free_pages failed, "
2522 "sz(%d)\n", ioc->name, (int)sz);
2523 goto out;
2524 }
2525
2526 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): "
2527 "depth(%d)\n", ioc->name, ioc->request,
2528 ioc->scsiio_depth));
2529
2530 /* loop till the allocation succeeds */
2531 do {
2532 sz = ioc->chain_depth * sizeof(struct chain_tracker);
2533 ioc->chain_pages = get_order(sz);
2534 ioc->chain_lookup = (struct chain_tracker *)__get_free_pages(
2535 GFP_KERNEL, ioc->chain_pages);
2536 if (ioc->chain_lookup == NULL)
2537 ioc->chain_depth -= 100;
2538 } while (ioc->chain_lookup == NULL);
2539 ioc->chain_dma_pool = pci_pool_create("chain pool", ioc->pdev,
2540 ioc->request_sz, 16, 0);
2541 if (!ioc->chain_dma_pool) {
2542 printk(MPT2SAS_ERR_FMT "chain_dma_pool: pci_pool_create "
2543 "failed\n", ioc->name);
2544 goto out;
2545 }
2546 for (i = 0; i < ioc->chain_depth; i++) {
2547 ioc->chain_lookup[i].chain_buffer = pci_pool_alloc(
2548 ioc->chain_dma_pool , GFP_KERNEL,
2549 &ioc->chain_lookup[i].chain_buffer_dma);
2550 if (!ioc->chain_lookup[i].chain_buffer) {
2551 ioc->chain_depth = i;
2552 goto chain_done;
2553 }
2554 total_sz += ioc->request_sz;
2555 }
2556 chain_done:
2557 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool depth"
2558 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
2559 ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
2560 ioc->request_sz))/1024));
2561
2562 /* initialize hi-priority queue smid's */
2563 ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
2564 sizeof(struct request_tracker), GFP_KERNEL);
2565 if (!ioc->hpr_lookup) {
2566 printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n",
2567 ioc->name);
2568 goto out;
2569 }
2570 ioc->hi_priority_smid = ioc->scsiio_depth + 1;
2571 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): "
2572 "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority,
2573 ioc->hi_priority_depth, ioc->hi_priority_smid));
2574
2575 /* initialize internal queue smid's */
2576 ioc->internal_lookup = kcalloc(ioc->internal_depth,
2577 sizeof(struct request_tracker), GFP_KERNEL);
2578 if (!ioc->internal_lookup) {
2579 printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n",
2580 ioc->name);
2581 goto out;
2582 }
2583 ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
2584 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): "
2585 "depth(%d), start smid(%d)\n", ioc->name, ioc->internal,
2586 ioc->internal_depth, ioc->internal_smid));
2587
2588 /* sense buffers, 4 byte align */
2589 sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
2590 ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
2591 0);
2592 if (!ioc->sense_dma_pool) {
2593 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
2594 ioc->name);
2595 goto out;
2596 }
2597 ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
2598 &ioc->sense_dma);
2599 if (!ioc->sense) {
2600 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
2601 ioc->name);
2602 goto out;
2603 }
2604 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
2605 "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
2606 "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
2607 SCSI_SENSE_BUFFERSIZE, sz/1024));
2608 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
2609 ioc->name, (unsigned long long)ioc->sense_dma));
2610 total_sz += sz;
2611
2612 /* reply pool, 4 byte align */
2613 sz = ioc->reply_free_queue_depth * ioc->reply_sz;
2614 ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
2615 0);
2616 if (!ioc->reply_dma_pool) {
2617 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
2618 ioc->name);
2619 goto out;
2620 }
2621 ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
2622 &ioc->reply_dma);
2623 if (!ioc->reply) {
2624 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
2625 ioc->name);
2626 goto out;
2627 }
2628 ioc->reply_dma_min_address = (u32)(ioc->reply_dma);
2629 ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz;
2630 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
2631 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
2632 ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
2633 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
2634 ioc->name, (unsigned long long)ioc->reply_dma));
2635 total_sz += sz;
2636
2637 /* reply free queue, 16 byte align */
2638 sz = ioc->reply_free_queue_depth * 4;
2639 ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
2640 ioc->pdev, sz, 16, 0);
2641 if (!ioc->reply_free_dma_pool) {
2642 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
2643 "failed\n", ioc->name);
2644 goto out;
2645 }
2646 ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
2647 &ioc->reply_free_dma);
2648 if (!ioc->reply_free) {
2649 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
2650 "failed\n", ioc->name);
2651 goto out;
2652 }
2653 memset(ioc->reply_free, 0, sz);
2654 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
2655 "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
2656 ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
2657 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
2658 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
2659 total_sz += sz;
2660
2661 /* reply post queue, 16 byte align */
2662 reply_post_free_sz = ioc->reply_post_queue_depth *
2663 sizeof(Mpi2DefaultReplyDescriptor_t);
2664 if (_base_is_controller_msix_enabled(ioc))
2665 sz = reply_post_free_sz * ioc->reply_queue_count;
2666 else
2667 sz = reply_post_free_sz;
2668 ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
2669 ioc->pdev, sz, 16, 0);
2670 if (!ioc->reply_post_free_dma_pool) {
2671 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
2672 "failed\n", ioc->name);
2673 goto out;
2674 }
2675 ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
2676 GFP_KERNEL, &ioc->reply_post_free_dma);
2677 if (!ioc->reply_post_free) {
2678 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
2679 "failed\n", ioc->name);
2680 goto out;
2681 }
2682 memset(ioc->reply_post_free, 0, sz);
2683 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
2684 "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
2685 ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
2686 sz/1024));
2687 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
2688 "(0x%llx)\n", ioc->name, (unsigned long long)
2689 ioc->reply_post_free_dma));
2690 total_sz += sz;
2691
2692 ioc->config_page_sz = 512;
2693 ioc->config_page = pci_alloc_consistent(ioc->pdev,
2694 ioc->config_page_sz, &ioc->config_page_dma);
2695 if (!ioc->config_page) {
2696 printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
2697 "failed\n", ioc->name);
2698 goto out;
2699 }
2700 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
2701 "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
2702 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
2703 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
2704 total_sz += ioc->config_page_sz;
2705
2706 printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
2707 ioc->name, total_sz/1024);
2708 printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
2709 "Max Controller Queue Depth(%d)\n",
2710 ioc->name, ioc->shost->can_queue, facts->RequestCredit);
2711 printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
2712 ioc->name, ioc->shost->sg_tablesize);
2713 return 0;
2714
2715 out:
2716 return -ENOMEM;
2717 }
2718
2719
2720 /**
2721 * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
2722 * @ioc: Pointer to MPT_ADAPTER structure
2723 * @cooked: Request raw or cooked IOC state
2724 *
2725 * Returns all IOC Doorbell register bits if cooked==0, else just the
2726 * Doorbell bits in MPI_IOC_STATE_MASK.
2727 */
2728 u32
2729 mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
2730 {
2731 u32 s, sc;
2732
2733 s = readl(&ioc->chip->Doorbell);
2734 sc = s & MPI2_IOC_STATE_MASK;
2735 return cooked ? sc : s;
2736 }
2737
2738 /**
2739 * _base_wait_on_iocstate - waiting on a particular ioc state
2740 * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
2741 * @timeout: timeout in second
2742 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2743 *
2744 * Returns 0 for success, non-zero for failure.
2745 */
2746 static int
2747 _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
2748 int sleep_flag)
2749 {
2750 u32 count, cntdn;
2751 u32 current_state;
2752
2753 count = 0;
2754 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2755 do {
2756 current_state = mpt2sas_base_get_iocstate(ioc, 1);
2757 if (current_state == ioc_state)
2758 return 0;
2759 if (count && current_state == MPI2_IOC_STATE_FAULT)
2760 break;
2761 if (sleep_flag == CAN_SLEEP)
2762 msleep(1);
2763 else
2764 udelay(500);
2765 count++;
2766 } while (--cntdn);
2767
2768 return current_state;
2769 }
2770
2771 /**
2772 * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
2773 * a write to the doorbell)
2774 * @ioc: per adapter object
2775 * @timeout: timeout in second
2776 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2777 *
2778 * Returns 0 for success, non-zero for failure.
2779 *
2780 * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
2781 */
2782 static int
2783 _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
2784 int sleep_flag)
2785 {
2786 u32 cntdn, count;
2787 u32 int_status;
2788
2789 count = 0;
2790 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2791 do {
2792 int_status = readl(&ioc->chip->HostInterruptStatus);
2793 if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
2794 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
2795 "successful count(%d), timeout(%d)\n", ioc->name,
2796 __func__, count, timeout));
2797 return 0;
2798 }
2799 if (sleep_flag == CAN_SLEEP)
2800 msleep(1);
2801 else
2802 udelay(500);
2803 count++;
2804 } while (--cntdn);
2805
2806 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2807 "int_status(%x)!\n", ioc->name, __func__, count, int_status);
2808 return -EFAULT;
2809 }
2810
2811 /**
2812 * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
2813 * @ioc: per adapter object
2814 * @timeout: timeout in second
2815 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2816 *
2817 * Returns 0 for success, non-zero for failure.
2818 *
2819 * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
2820 * doorbell.
2821 */
2822 static int
2823 _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
2824 int sleep_flag)
2825 {
2826 u32 cntdn, count;
2827 u32 int_status;
2828 u32 doorbell;
2829
2830 count = 0;
2831 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2832 do {
2833 int_status = readl(&ioc->chip->HostInterruptStatus);
2834 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
2835 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
2836 "successful count(%d), timeout(%d)\n", ioc->name,
2837 __func__, count, timeout));
2838 return 0;
2839 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
2840 doorbell = readl(&ioc->chip->Doorbell);
2841 if ((doorbell & MPI2_IOC_STATE_MASK) ==
2842 MPI2_IOC_STATE_FAULT) {
2843 mpt2sas_base_fault_info(ioc , doorbell);
2844 return -EFAULT;
2845 }
2846 } else if (int_status == 0xFFFFFFFF)
2847 goto out;
2848
2849 if (sleep_flag == CAN_SLEEP)
2850 msleep(1);
2851 else
2852 udelay(500);
2853 count++;
2854 } while (--cntdn);
2855
2856 out:
2857 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2858 "int_status(%x)!\n", ioc->name, __func__, count, int_status);
2859 return -EFAULT;
2860 }
2861
2862 /**
2863 * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
2864 * @ioc: per adapter object
2865 * @timeout: timeout in second
2866 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2867 *
2868 * Returns 0 for success, non-zero for failure.
2869 *
2870 */
2871 static int
2872 _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
2873 int sleep_flag)
2874 {
2875 u32 cntdn, count;
2876 u32 doorbell_reg;
2877
2878 count = 0;
2879 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2880 do {
2881 doorbell_reg = readl(&ioc->chip->Doorbell);
2882 if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
2883 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
2884 "successful count(%d), timeout(%d)\n", ioc->name,
2885 __func__, count, timeout));
2886 return 0;
2887 }
2888 if (sleep_flag == CAN_SLEEP)
2889 msleep(1);
2890 else
2891 udelay(500);
2892 count++;
2893 } while (--cntdn);
2894
2895 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2896 "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
2897 return -EFAULT;
2898 }
2899
2900 /**
2901 * _base_send_ioc_reset - send doorbell reset
2902 * @ioc: per adapter object
2903 * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
2904 * @timeout: timeout in second
2905 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2906 *
2907 * Returns 0 for success, non-zero for failure.
2908 */
2909 static int
2910 _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
2911 int sleep_flag)
2912 {
2913 u32 ioc_state;
2914 int r = 0;
2915
2916 if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
2917 printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
2918 ioc->name, __func__);
2919 return -EFAULT;
2920 }
2921
2922 if (!(ioc->facts.IOCCapabilities &
2923 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
2924 return -EFAULT;
2925
2926 printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
2927
2928 writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
2929 &ioc->chip->Doorbell);
2930 if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
2931 r = -EFAULT;
2932 goto out;
2933 }
2934 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
2935 timeout, sleep_flag);
2936 if (ioc_state) {
2937 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
2938 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
2939 r = -EFAULT;
2940 goto out;
2941 }
2942 out:
2943 printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
2944 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
2945 return r;
2946 }
2947
2948 /**
2949 * _base_handshake_req_reply_wait - send request thru doorbell interface
2950 * @ioc: per adapter object
2951 * @request_bytes: request length
2952 * @request: pointer having request payload
2953 * @reply_bytes: reply length
2954 * @reply: pointer to reply payload
2955 * @timeout: timeout in second
2956 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2957 *
2958 * Returns 0 for success, non-zero for failure.
2959 */
2960 static int
2961 _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
2962 u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
2963 {
2964 MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
2965 int i;
2966 u8 failed;
2967 u16 dummy;
2968 __le32 *mfp;
2969
2970 /* make sure doorbell is not in use */
2971 if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
2972 printk(MPT2SAS_ERR_FMT "doorbell is in use "
2973 " (line=%d)\n", ioc->name, __LINE__);
2974 return -EFAULT;
2975 }
2976
2977 /* clear pending doorbell interrupts from previous state changes */
2978 if (readl(&ioc->chip->HostInterruptStatus) &
2979 MPI2_HIS_IOC2SYS_DB_STATUS)
2980 writel(0, &ioc->chip->HostInterruptStatus);
2981
2982 /* send message to ioc */
2983 writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
2984 ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
2985 &ioc->chip->Doorbell);
2986
2987 if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
2988 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2989 "int failed (line=%d)\n", ioc->name, __LINE__);
2990 return -EFAULT;
2991 }
2992 writel(0, &ioc->chip->HostInterruptStatus);
2993
2994 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
2995 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2996 "ack failed (line=%d)\n", ioc->name, __LINE__);
2997 return -EFAULT;
2998 }
2999
3000 /* send message 32-bits at a time */
3001 for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
3002 writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
3003 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
3004 failed = 1;
3005 }
3006
3007 if (failed) {
3008 printk(MPT2SAS_ERR_FMT "doorbell handshake "
3009 "sending request failed (line=%d)\n", ioc->name, __LINE__);
3010 return -EFAULT;
3011 }
3012
3013 /* now wait for the reply */
3014 if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
3015 printk(MPT2SAS_ERR_FMT "doorbell handshake "
3016 "int failed (line=%d)\n", ioc->name, __LINE__);
3017 return -EFAULT;
3018 }
3019
3020 /* read the first two 16-bits, it gives the total length of the reply */
3021 reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
3022 & MPI2_DOORBELL_DATA_MASK);
3023 writel(0, &ioc->chip->HostInterruptStatus);
3024 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
3025 printk(MPT2SAS_ERR_FMT "doorbell handshake "
3026 "int failed (line=%d)\n", ioc->name, __LINE__);
3027 return -EFAULT;
3028 }
3029 reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
3030 & MPI2_DOORBELL_DATA_MASK);
3031 writel(0, &ioc->chip->HostInterruptStatus);
3032
3033 for (i = 2; i < default_reply->MsgLength * 2; i++) {
3034 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
3035 printk(MPT2SAS_ERR_FMT "doorbell "
3036 "handshake int failed (line=%d)\n", ioc->name,
3037 __LINE__);
3038 return -EFAULT;
3039 }
3040 if (i >= reply_bytes/2) /* overflow case */
3041 dummy = readl(&ioc->chip->Doorbell);
3042 else
3043 reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
3044 & MPI2_DOORBELL_DATA_MASK);
3045 writel(0, &ioc->chip->HostInterruptStatus);
3046 }
3047
3048 _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
3049 if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
3050 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
3051 " (line=%d)\n", ioc->name, __LINE__));
3052 }
3053 writel(0, &ioc->chip->HostInterruptStatus);
3054
3055 if (ioc->logging_level & MPT_DEBUG_INIT) {
3056 mfp = (__le32 *)reply;
3057 printk(KERN_INFO "\toffset:data\n");
3058 for (i = 0; i < reply_bytes/4; i++)
3059 printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
3060 le32_to_cpu(mfp[i]));
3061 }
3062 return 0;
3063 }
3064
3065 /**
3066 * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
3067 * @ioc: per adapter object
3068 * @mpi_reply: the reply payload from FW
3069 * @mpi_request: the request payload sent to FW
3070 *
3071 * The SAS IO Unit Control Request message allows the host to perform low-level
3072 * operations, such as resets on the PHYs of the IO Unit, also allows the host
3073 * to obtain the IOC assigned device handles for a device if it has other
3074 * identifying information about the device, in addition allows the host to
3075 * remove IOC resources associated with the device.
3076 *
3077 * Returns 0 for success, non-zero for failure.
3078 */
3079 int
3080 mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
3081 Mpi2SasIoUnitControlReply_t *mpi_reply,
3082 Mpi2SasIoUnitControlRequest_t *mpi_request)
3083 {
3084 u16 smid;
3085 u32 ioc_state;
3086 unsigned long timeleft;
3087 u8 issue_reset;
3088 int rc;
3089 void *request;
3090 u16 wait_state_count;
3091
3092 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3093 __func__));
3094
3095 mutex_lock(&ioc->base_cmds.mutex);
3096
3097 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
3098 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
3099 ioc->name, __func__);
3100 rc = -EAGAIN;
3101 goto out;
3102 }
3103
3104 wait_state_count = 0;
3105 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
3106 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
3107 if (wait_state_count++ == 10) {
3108 printk(MPT2SAS_ERR_FMT
3109 "%s: failed due to ioc not operational\n",
3110 ioc->name, __func__);
3111 rc = -EFAULT;
3112 goto out;
3113 }
3114 ssleep(1);
3115 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
3116 printk(MPT2SAS_INFO_FMT "%s: waiting for "
3117 "operational state(count=%d)\n", ioc->name,
3118 __func__, wait_state_count);
3119 }
3120
3121 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
3122 if (!smid) {
3123 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3124 ioc->name, __func__);
3125 rc = -EAGAIN;
3126 goto out;
3127 }
3128
3129 rc = 0;
3130 ioc->base_cmds.status = MPT2_CMD_PENDING;
3131 request = mpt2sas_base_get_msg_frame(ioc, smid);
3132 ioc->base_cmds.smid = smid;
3133 memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
3134 if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
3135 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
3136 ioc->ioc_link_reset_in_progress = 1;
3137 mpt2sas_base_put_smid_default(ioc, smid);
3138 init_completion(&ioc->base_cmds.done);
3139 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
3140 msecs_to_jiffies(10000));
3141 if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
3142 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
3143 ioc->ioc_link_reset_in_progress)
3144 ioc->ioc_link_reset_in_progress = 0;
3145 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
3146 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3147 ioc->name, __func__);
3148 _debug_dump_mf(mpi_request,
3149 sizeof(Mpi2SasIoUnitControlRequest_t)/4);
3150 if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
3151 issue_reset = 1;
3152 goto issue_host_reset;
3153 }
3154 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
3155 memcpy(mpi_reply, ioc->base_cmds.reply,
3156 sizeof(Mpi2SasIoUnitControlReply_t));
3157 else
3158 memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
3159 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3160 goto out;
3161
3162 issue_host_reset:
3163 if (issue_reset)
3164 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
3165 FORCE_BIG_HAMMER);
3166 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3167 rc = -EFAULT;
3168 out:
3169 mutex_unlock(&ioc->base_cmds.mutex);
3170 return rc;
3171 }
3172
3173
3174 /**
3175 * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
3176 * @ioc: per adapter object
3177 * @mpi_reply: the reply payload from FW
3178 * @mpi_request: the request payload sent to FW
3179 *
3180 * The SCSI Enclosure Processor request message causes the IOC to
3181 * communicate with SES devices to control LED status signals.
3182 *
3183 * Returns 0 for success, non-zero for failure.
3184 */
3185 int
3186 mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
3187 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
3188 {
3189 u16 smid;
3190 u32 ioc_state;
3191 unsigned long timeleft;
3192 u8 issue_reset;
3193 int rc;
3194 void *request;
3195 u16 wait_state_count;
3196
3197 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3198 __func__));
3199
3200 mutex_lock(&ioc->base_cmds.mutex);
3201
3202 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
3203 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
3204 ioc->name, __func__);
3205 rc = -EAGAIN;
3206 goto out;
3207 }
3208
3209 wait_state_count = 0;
3210 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
3211 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
3212 if (wait_state_count++ == 10) {
3213 printk(MPT2SAS_ERR_FMT
3214 "%s: failed due to ioc not operational\n",
3215 ioc->name, __func__);
3216 rc = -EFAULT;
3217 goto out;
3218 }
3219 ssleep(1);
3220 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
3221 printk(MPT2SAS_INFO_FMT "%s: waiting for "
3222 "operational state(count=%d)\n", ioc->name,
3223 __func__, wait_state_count);
3224 }
3225
3226 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
3227 if (!smid) {
3228 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3229 ioc->name, __func__);
3230 rc = -EAGAIN;
3231 goto out;
3232 }
3233
3234 rc = 0;
3235 ioc->base_cmds.status = MPT2_CMD_PENDING;
3236 request = mpt2sas_base_get_msg_frame(ioc, smid);
3237 ioc->base_cmds.smid = smid;
3238 memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
3239 mpt2sas_base_put_smid_default(ioc, smid);
3240 init_completion(&ioc->base_cmds.done);
3241 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
3242 msecs_to_jiffies(10000));
3243 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
3244 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3245 ioc->name, __func__);
3246 _debug_dump_mf(mpi_request,
3247 sizeof(Mpi2SepRequest_t)/4);
3248 if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
3249 issue_reset = 1;
3250 goto issue_host_reset;
3251 }
3252 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
3253 memcpy(mpi_reply, ioc->base_cmds.reply,
3254 sizeof(Mpi2SepReply_t));
3255 else
3256 memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
3257 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3258 goto out;
3259
3260 issue_host_reset:
3261 if (issue_reset)
3262 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
3263 FORCE_BIG_HAMMER);
3264 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3265 rc = -EFAULT;
3266 out:
3267 mutex_unlock(&ioc->base_cmds.mutex);
3268 return rc;
3269 }
3270
3271 /**
3272 * _base_get_port_facts - obtain port facts reply and save in ioc
3273 * @ioc: per adapter object
3274 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3275 *
3276 * Returns 0 for success, non-zero for failure.
3277 */
3278 static int
3279 _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
3280 {
3281 Mpi2PortFactsRequest_t mpi_request;
3282 Mpi2PortFactsReply_t mpi_reply;
3283 struct mpt2sas_port_facts *pfacts;
3284 int mpi_reply_sz, mpi_request_sz, r;
3285
3286 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3287 __func__));
3288
3289 mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
3290 mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
3291 memset(&mpi_request, 0, mpi_request_sz);
3292 mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
3293 mpi_request.PortNumber = port;
3294 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
3295 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
3296
3297 if (r != 0) {
3298 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
3299 ioc->name, __func__, r);
3300 return r;
3301 }
3302
3303 pfacts = &ioc->pfacts[port];
3304 memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t));
3305 pfacts->PortNumber = mpi_reply.PortNumber;
3306 pfacts->VP_ID = mpi_reply.VP_ID;
3307 pfacts->VF_ID = mpi_reply.VF_ID;
3308 pfacts->MaxPostedCmdBuffers =
3309 le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
3310
3311 return 0;
3312 }
3313
3314 /**
3315 * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
3316 * @ioc: per adapter object
3317 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3318 *
3319 * Returns 0 for success, non-zero for failure.
3320 */
3321 static int
3322 _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3323 {
3324 Mpi2IOCFactsRequest_t mpi_request;
3325 Mpi2IOCFactsReply_t mpi_reply;
3326 struct mpt2sas_facts *facts;
3327 int mpi_reply_sz, mpi_request_sz, r;
3328
3329 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3330 __func__));
3331
3332 mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
3333 mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
3334 memset(&mpi_request, 0, mpi_request_sz);
3335 mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
3336 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
3337 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
3338
3339 if (r != 0) {
3340 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
3341 ioc->name, __func__, r);
3342 return r;
3343 }
3344
3345 facts = &ioc->facts;
3346 memset(facts, 0, sizeof(Mpi2IOCFactsReply_t));
3347 facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
3348 facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
3349 facts->VP_ID = mpi_reply.VP_ID;
3350 facts->VF_ID = mpi_reply.VF_ID;
3351 facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
3352 facts->MaxChainDepth = mpi_reply.MaxChainDepth;
3353 facts->WhoInit = mpi_reply.WhoInit;
3354 facts->NumberOfPorts = mpi_reply.NumberOfPorts;
3355 facts->MaxMSIxVectors = mpi_reply.MaxMSIxVectors;
3356 facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
3357 facts->MaxReplyDescriptorPostQueueDepth =
3358 le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
3359 facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
3360 facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
3361 if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
3362 ioc->ir_firmware = 1;
3363 facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
3364 facts->IOCRequestFrameSize =
3365 le16_to_cpu(mpi_reply.IOCRequestFrameSize);
3366 facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
3367 facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
3368 ioc->shost->max_id = -1;
3369 facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
3370 facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
3371 facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
3372 facts->HighPriorityCredit =
3373 le16_to_cpu(mpi_reply.HighPriorityCredit);
3374 facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
3375 facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
3376
3377 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
3378 "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
3379 facts->MaxChainDepth));
3380 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
3381 "reply frame size(%d)\n", ioc->name,
3382 facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
3383 return 0;
3384 }
3385
3386 /**
3387 * _base_send_ioc_init - send ioc_init to firmware
3388 * @ioc: per adapter object
3389 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3390 *
3391 * Returns 0 for success, non-zero for failure.
3392 */
3393 static int
3394 _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3395 {
3396 Mpi2IOCInitRequest_t mpi_request;
3397 Mpi2IOCInitReply_t mpi_reply;
3398 int r;
3399 struct timeval current_time;
3400 u16 ioc_status;
3401
3402 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3403 __func__));
3404
3405 memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
3406 mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
3407 mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
3408 mpi_request.VF_ID = 0; /* TODO */
3409 mpi_request.VP_ID = 0;
3410 mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
3411 mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
3412
3413 if (_base_is_controller_msix_enabled(ioc))
3414 mpi_request.HostMSIxVectors = ioc->reply_queue_count;
3415 mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
3416 mpi_request.ReplyDescriptorPostQueueDepth =
3417 cpu_to_le16(ioc->reply_post_queue_depth);
3418 mpi_request.ReplyFreeQueueDepth =
3419 cpu_to_le16(ioc->reply_free_queue_depth);
3420
3421 mpi_request.SenseBufferAddressHigh =
3422 cpu_to_le32((u64)ioc->sense_dma >> 32);
3423 mpi_request.SystemReplyAddressHigh =
3424 cpu_to_le32((u64)ioc->reply_dma >> 32);
3425 mpi_request.SystemRequestFrameBaseAddress =
3426 cpu_to_le64((u64)ioc->request_dma);
3427 mpi_request.ReplyFreeQueueAddress =
3428 cpu_to_le64((u64)ioc->reply_free_dma);
3429 mpi_request.ReplyDescriptorPostQueueAddress =
3430 cpu_to_le64((u64)ioc->reply_post_free_dma);
3431
3432
3433 /* This time stamp specifies number of milliseconds
3434 * since epoch ~ midnight January 1, 1970.
3435 */
3436 do_gettimeofday(&current_time);
3437 mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 +
3438 (current_time.tv_usec / 1000));
3439
3440 if (ioc->logging_level & MPT_DEBUG_INIT) {
3441 __le32 *mfp;
3442 int i;
3443
3444 mfp = (__le32 *)&mpi_request;
3445 printk(KERN_INFO "\toffset:data\n");
3446 for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
3447 printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
3448 le32_to_cpu(mfp[i]));
3449 }
3450
3451 r = _base_handshake_req_reply_wait(ioc,
3452 sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
3453 sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
3454 sleep_flag);
3455
3456 if (r != 0) {
3457 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
3458 ioc->name, __func__, r);
3459 return r;
3460 }
3461
3462 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
3463 if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
3464 mpi_reply.IOCLogInfo) {
3465 printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
3466 r = -EIO;
3467 }
3468
3469 return 0;
3470 }
3471
3472 /**
3473 * _base_send_port_enable - send port_enable(discovery stuff) to firmware
3474 * @ioc: per adapter object
3475 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3476 *
3477 * Returns 0 for success, non-zero for failure.
3478 */
3479 static int
3480 _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3481 {
3482 Mpi2PortEnableRequest_t *mpi_request;
3483 u32 ioc_state;
3484 unsigned long timeleft;
3485 int r = 0;
3486 u16 smid;
3487
3488 printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
3489
3490 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
3491 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
3492 ioc->name, __func__);
3493 return -EAGAIN;
3494 }
3495
3496 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
3497 if (!smid) {
3498 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3499 ioc->name, __func__);
3500 return -EAGAIN;
3501 }
3502
3503 ioc->base_cmds.status = MPT2_CMD_PENDING;
3504 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
3505 ioc->base_cmds.smid = smid;
3506 memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
3507 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
3508 mpi_request->VF_ID = 0; /* TODO */
3509 mpi_request->VP_ID = 0;
3510
3511 mpt2sas_base_put_smid_default(ioc, smid);
3512 init_completion(&ioc->base_cmds.done);
3513 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
3514 300*HZ);
3515 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
3516 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3517 ioc->name, __func__);
3518 _debug_dump_mf(mpi_request,
3519 sizeof(Mpi2PortEnableRequest_t)/4);
3520 if (ioc->base_cmds.status & MPT2_CMD_RESET)
3521 r = -EFAULT;
3522 else
3523 r = -ETIME;
3524 goto out;
3525 } else
3526 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
3527 ioc->name, __func__));
3528
3529 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_OPERATIONAL,
3530 60, sleep_flag);
3531 if (ioc_state) {
3532 printk(MPT2SAS_ERR_FMT "%s: failed going to operational state "
3533 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
3534 r = -EFAULT;
3535 }
3536 out:
3537 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3538 printk(MPT2SAS_INFO_FMT "port enable: %s\n",
3539 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
3540 return r;
3541 }
3542
3543 /**
3544 * _base_unmask_events - turn on notification for this event
3545 * @ioc: per adapter object
3546 * @event: firmware event
3547 *
3548 * The mask is stored in ioc->event_masks.
3549 */
3550 static void
3551 _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
3552 {
3553 u32 desired_event;
3554
3555 if (event >= 128)
3556 return;
3557
3558 desired_event = (1 << (event % 32));
3559
3560 if (event < 32)
3561 ioc->event_masks[0] &= ~desired_event;
3562 else if (event < 64)
3563 ioc->event_masks[1] &= ~desired_event;
3564 else if (event < 96)
3565 ioc->event_masks[2] &= ~desired_event;
3566 else if (event < 128)
3567 ioc->event_masks[3] &= ~desired_event;
3568 }
3569
3570 /**
3571 * _base_event_notification - send event notification
3572 * @ioc: per adapter object
3573 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3574 *
3575 * Returns 0 for success, non-zero for failure.
3576 */
3577 static int
3578 _base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3579 {
3580 Mpi2EventNotificationRequest_t *mpi_request;
3581 unsigned long timeleft;
3582 u16 smid;
3583 int r = 0;
3584 int i;
3585
3586 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3587 __func__));
3588
3589 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
3590 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
3591 ioc->name, __func__);
3592 return -EAGAIN;
3593 }
3594
3595 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
3596 if (!smid) {
3597 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3598 ioc->name, __func__);
3599 return -EAGAIN;
3600 }
3601 ioc->base_cmds.status = MPT2_CMD_PENDING;
3602 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
3603 ioc->base_cmds.smid = smid;
3604 memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
3605 mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
3606 mpi_request->VF_ID = 0; /* TODO */
3607 mpi_request->VP_ID = 0;
3608 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
3609 mpi_request->EventMasks[i] =
3610 cpu_to_le32(ioc->event_masks[i]);
3611 mpt2sas_base_put_smid_default(ioc, smid);
3612 init_completion(&ioc->base_cmds.done);
3613 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
3614 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
3615 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3616 ioc->name, __func__);
3617 _debug_dump_mf(mpi_request,
3618 sizeof(Mpi2EventNotificationRequest_t)/4);
3619 if (ioc->base_cmds.status & MPT2_CMD_RESET)
3620 r = -EFAULT;
3621 else
3622 r = -ETIME;
3623 } else
3624 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
3625 ioc->name, __func__));
3626 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3627 return r;
3628 }
3629
3630 /**
3631 * mpt2sas_base_validate_event_type - validating event types
3632 * @ioc: per adapter object
3633 * @event: firmware event
3634 *
3635 * This will turn on firmware event notification when application
3636 * ask for that event. We don't mask events that are already enabled.
3637 */
3638 void
3639 mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
3640 {
3641 int i, j;
3642 u32 event_mask, desired_event;
3643 u8 send_update_to_fw;
3644
3645 for (i = 0, send_update_to_fw = 0; i <
3646 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
3647 event_mask = ~event_type[i];
3648 desired_event = 1;
3649 for (j = 0; j < 32; j++) {
3650 if (!(event_mask & desired_event) &&
3651 (ioc->event_masks[i] & desired_event)) {
3652 ioc->event_masks[i] &= ~desired_event;
3653 send_update_to_fw = 1;
3654 }
3655 desired_event = (desired_event << 1);
3656 }
3657 }
3658
3659 if (!send_update_to_fw)
3660 return;
3661
3662 mutex_lock(&ioc->base_cmds.mutex);
3663 _base_event_notification(ioc, CAN_SLEEP);
3664 mutex_unlock(&ioc->base_cmds.mutex);
3665 }
3666
3667 /**
3668 * _base_diag_reset - the "big hammer" start of day reset
3669 * @ioc: per adapter object
3670 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3671 *
3672 * Returns 0 for success, non-zero for failure.
3673 */
3674 static int
3675 _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3676 {
3677 u32 host_diagnostic;
3678 u32 ioc_state;
3679 u32 count;
3680 u32 hcb_size;
3681
3682 printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
3683 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "clear interrupts\n",
3684 ioc->name));
3685
3686 count = 0;
3687 do {
3688 /* Write magic sequence to WriteSequence register
3689 * Loop until in diagnostic mode
3690 */
3691 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "write magic "
3692 "sequence\n", ioc->name));
3693 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
3694 writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
3695 writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
3696 writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
3697 writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
3698 writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
3699 writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
3700
3701 /* wait 100 msec */
3702 if (sleep_flag == CAN_SLEEP)
3703 msleep(100);
3704 else
3705 mdelay(100);
3706
3707 if (count++ > 20)
3708 goto out;
3709
3710 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
3711 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "wrote magic "
3712 "sequence: count(%d), host_diagnostic(0x%08x)\n",
3713 ioc->name, count, host_diagnostic));
3714
3715 } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
3716
3717 hcb_size = readl(&ioc->chip->HCBSize);
3718
3719 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "diag reset: issued\n",
3720 ioc->name));
3721 writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
3722 &ioc->chip->HostDiagnostic);
3723
3724 /* don't access any registers for 50 milliseconds */
3725 msleep(50);
3726
3727 /* 300 second max wait */
3728 for (count = 0; count < 3000000 ; count++) {
3729
3730 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
3731
3732 if (host_diagnostic == 0xFFFFFFFF)
3733 goto out;
3734 if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
3735 break;
3736
3737 /* wait 100 msec */
3738 if (sleep_flag == CAN_SLEEP)
3739 msleep(1);
3740 else
3741 mdelay(1);
3742 }
3743
3744 if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
3745
3746 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter "
3747 "assuming the HCB Address points to good F/W\n",
3748 ioc->name));
3749 host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
3750 host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
3751 writel(host_diagnostic, &ioc->chip->HostDiagnostic);
3752
3753 drsprintk(ioc, printk(MPT2SAS_INFO_FMT
3754 "re-enable the HCDW\n", ioc->name));
3755 writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
3756 &ioc->chip->HCBSize);
3757 }
3758
3759 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter\n",
3760 ioc->name));
3761 writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
3762 &ioc->chip->HostDiagnostic);
3763
3764 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "disable writes to the "
3765 "diagnostic register\n", ioc->name));
3766 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
3767
3768 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "Wait for FW to go to the "
3769 "READY state\n", ioc->name));
3770 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
3771 sleep_flag);
3772 if (ioc_state) {
3773 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
3774 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
3775 goto out;
3776 }
3777
3778 printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
3779 return 0;
3780
3781 out:
3782 printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
3783 return -EFAULT;
3784 }
3785
3786 /**
3787 * _base_make_ioc_ready - put controller in READY state
3788 * @ioc: per adapter object
3789 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3790 * @type: FORCE_BIG_HAMMER or SOFT_RESET
3791 *
3792 * Returns 0 for success, non-zero for failure.
3793 */
3794 static int
3795 _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
3796 enum reset_type type)
3797 {
3798 u32 ioc_state;
3799 int rc;
3800
3801 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3802 __func__));
3803
3804 if (ioc->pci_error_recovery)
3805 return 0;
3806
3807 ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
3808 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: ioc_state(0x%08x)\n",
3809 ioc->name, __func__, ioc_state));
3810
3811 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
3812 return 0;
3813
3814 if (ioc_state & MPI2_DOORBELL_USED) {
3815 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "unexpected doorbell "
3816 "active!\n", ioc->name));
3817 goto issue_diag_reset;
3818 }
3819
3820 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
3821 mpt2sas_base_fault_info(ioc, ioc_state &
3822 MPI2_DOORBELL_DATA_MASK);
3823 goto issue_diag_reset;
3824 }
3825
3826 if (type == FORCE_BIG_HAMMER)
3827 goto issue_diag_reset;
3828
3829 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
3830 if (!(_base_send_ioc_reset(ioc,
3831 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) {
3832 ioc->ioc_reset_count++;
3833 return 0;
3834 }
3835
3836 issue_diag_reset:
3837 rc = _base_diag_reset(ioc, CAN_SLEEP);
3838 ioc->ioc_reset_count++;
3839 return rc;
3840 }
3841
3842 /**
3843 * _base_make_ioc_operational - put controller in OPERATIONAL state
3844 * @ioc: per adapter object
3845 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3846 *
3847 * Returns 0 for success, non-zero for failure.
3848 */
3849 static int
3850 _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3851 {
3852 int r, i;
3853 unsigned long flags;
3854 u32 reply_address;
3855 u16 smid;
3856 struct _tr_list *delayed_tr, *delayed_tr_next;
3857 u8 hide_flag;
3858 struct adapter_reply_queue *reply_q;
3859 long reply_post_free;
3860 u32 reply_post_free_sz;
3861
3862 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3863 __func__));
3864
3865 /* clean the delayed target reset list */
3866 list_for_each_entry_safe(delayed_tr, delayed_tr_next,
3867 &ioc->delayed_tr_list, list) {
3868 list_del(&delayed_tr->list);
3869 kfree(delayed_tr);
3870 }
3871
3872 list_for_each_entry_safe(delayed_tr, delayed_tr_next,
3873 &ioc->delayed_tr_volume_list, list) {
3874 list_del(&delayed_tr->list);
3875 kfree(delayed_tr);
3876 }
3877
3878 /* initialize the scsi lookup free list */
3879 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
3880 INIT_LIST_HEAD(&ioc->free_list);
3881 smid = 1;
3882 for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
3883 INIT_LIST_HEAD(&ioc->scsi_lookup[i].chain_list);
3884 ioc->scsi_lookup[i].cb_idx = 0xFF;
3885 ioc->scsi_lookup[i].smid = smid;
3886 ioc->scsi_lookup[i].scmd = NULL;
3887 ioc->scsi_lookup[i].direct_io = 0;
3888 list_add_tail(&ioc->scsi_lookup[i].tracker_list,
3889 &ioc->free_list);
3890 }
3891
3892 /* hi-priority queue */
3893 INIT_LIST_HEAD(&ioc->hpr_free_list);
3894 smid = ioc->hi_priority_smid;
3895 for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
3896 ioc->hpr_lookup[i].cb_idx = 0xFF;
3897 ioc->hpr_lookup[i].smid = smid;
3898 list_add_tail(&ioc->hpr_lookup[i].tracker_list,
3899 &ioc->hpr_free_list);
3900 }
3901
3902 /* internal queue */
3903 INIT_LIST_HEAD(&ioc->internal_free_list);
3904 smid = ioc->internal_smid;
3905 for (i = 0; i < ioc->internal_depth; i++, smid++) {
3906 ioc->internal_lookup[i].cb_idx = 0xFF;
3907 ioc->internal_lookup[i].smid = smid;
3908 list_add_tail(&ioc->internal_lookup[i].tracker_list,
3909 &ioc->internal_free_list);
3910 }
3911
3912 /* chain pool */
3913 INIT_LIST_HEAD(&ioc->free_chain_list);
3914 for (i = 0; i < ioc->chain_depth; i++)
3915 list_add_tail(&ioc->chain_lookup[i].tracker_list,
3916 &ioc->free_chain_list);
3917
3918 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
3919
3920 /* initialize Reply Free Queue */
3921 for (i = 0, reply_address = (u32)ioc->reply_dma ;
3922 i < ioc->reply_free_queue_depth ; i++, reply_address +=
3923 ioc->reply_sz)
3924 ioc->reply_free[i] = cpu_to_le32(reply_address);
3925
3926 /* initialize reply queues */
3927 _base_assign_reply_queues(ioc);
3928
3929 /* initialize Reply Post Free Queue */
3930 reply_post_free = (long)ioc->reply_post_free;
3931 reply_post_free_sz = ioc->reply_post_queue_depth *
3932 sizeof(Mpi2DefaultReplyDescriptor_t);
3933 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
3934 reply_q->reply_post_host_index = 0;
3935 reply_q->reply_post_free = (Mpi2ReplyDescriptorsUnion_t *)
3936 reply_post_free;
3937 for (i = 0; i < ioc->reply_post_queue_depth; i++)
3938 reply_q->reply_post_free[i].Words =
3939 cpu_to_le64(ULLONG_MAX);
3940 if (!_base_is_controller_msix_enabled(ioc))
3941 goto skip_init_reply_post_free_queue;
3942 reply_post_free += reply_post_free_sz;
3943 }
3944 skip_init_reply_post_free_queue:
3945
3946 r = _base_send_ioc_init(ioc, sleep_flag);
3947 if (r)
3948 return r;
3949
3950 /* initialize reply free host index */
3951 ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
3952 writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
3953
3954 /* initialize reply post host index */
3955 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
3956 writel(reply_q->msix_index << MPI2_RPHI_MSIX_INDEX_SHIFT,
3957 &ioc->chip->ReplyPostHostIndex);
3958 if (!_base_is_controller_msix_enabled(ioc))
3959 goto skip_init_reply_post_host_index;
3960 }
3961
3962 skip_init_reply_post_host_index:
3963
3964 _base_unmask_interrupts(ioc);
3965 r = _base_event_notification(ioc, sleep_flag);
3966 if (r)
3967 return r;
3968
3969 if (sleep_flag == CAN_SLEEP)
3970 _base_static_config_pages(ioc);
3971
3972 if (ioc->wait_for_port_enable_to_complete && ioc->is_warpdrive) {
3973 if (ioc->manu_pg10.OEMIdentifier == 0x80) {
3974 hide_flag = (u8) (ioc->manu_pg10.OEMSpecificFlags0 &
3975 MFG_PAGE10_HIDE_SSDS_MASK);
3976 if (hide_flag != MFG_PAGE10_HIDE_SSDS_MASK)
3977 ioc->mfg_pg10_hide_flag = hide_flag;
3978 }
3979 }
3980
3981 if (ioc->wait_for_port_enable_to_complete) {
3982 if (diag_buffer_enable != 0)
3983 mpt2sas_enable_diag_buffer(ioc, diag_buffer_enable);
3984 if (disable_discovery > 0)
3985 return r;
3986 }
3987
3988 r = _base_send_port_enable(ioc, sleep_flag);
3989 if (r)
3990 return r;
3991
3992 return r;
3993 }
3994
3995 /**
3996 * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
3997 * @ioc: per adapter object
3998 *
3999 * Return nothing.
4000 */
4001 void
4002 mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
4003 {
4004 struct pci_dev *pdev = ioc->pdev;
4005
4006 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
4007 __func__));
4008
4009 _base_mask_interrupts(ioc);
4010 ioc->shost_recovery = 1;
4011 _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
4012 ioc->shost_recovery = 0;
4013 _base_free_irq(ioc);
4014 _base_disable_msix(ioc);
4015 if (ioc->chip_phys)
4016 iounmap(ioc->chip);
4017 ioc->chip_phys = 0;
4018 pci_release_selected_regions(ioc->pdev, ioc->bars);
4019 pci_disable_pcie_error_reporting(pdev);
4020 pci_disable_device(pdev);
4021 return;
4022 }
4023
4024 /**
4025 * mpt2sas_base_attach - attach controller instance
4026 * @ioc: per adapter object
4027 *
4028 * Returns 0 for success, non-zero for failure.
4029 */
4030 int
4031 mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
4032 {
4033 int r, i;
4034 int cpu_id, last_cpu_id = 0;
4035
4036 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
4037 __func__));
4038
4039 /* setup cpu_msix_table */
4040 ioc->cpu_count = num_online_cpus();
4041 for_each_online_cpu(cpu_id)
4042 last_cpu_id = cpu_id;
4043 ioc->cpu_msix_table_sz = last_cpu_id + 1;
4044 ioc->cpu_msix_table = kzalloc(ioc->cpu_msix_table_sz, GFP_KERNEL);
4045 ioc->reply_queue_count = 1;
4046 if (!ioc->cpu_msix_table) {
4047 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
4048 "cpu_msix_table failed!!!\n", ioc->name));
4049 r = -ENOMEM;
4050 goto out_free_resources;
4051 }
4052
4053 if (ioc->is_warpdrive) {
4054 ioc->reply_post_host_index = kcalloc(ioc->cpu_msix_table_sz,
4055 sizeof(resource_size_t *), GFP_KERNEL);
4056 if (!ioc->reply_post_host_index) {
4057 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation "
4058 "for cpu_msix_table failed!!!\n", ioc->name));
4059 r = -ENOMEM;
4060 goto out_free_resources;
4061 }
4062 }
4063
4064 r = mpt2sas_base_map_resources(ioc);
4065 if (r)
4066 return r;
4067
4068 if (ioc->is_warpdrive) {
4069 ioc->reply_post_host_index[0] =
4070 (resource_size_t *)&ioc->chip->ReplyPostHostIndex;
4071
4072 for (i = 1; i < ioc->cpu_msix_table_sz; i++)
4073 ioc->reply_post_host_index[i] = (resource_size_t *)
4074 ((u8 *)&ioc->chip->Doorbell + (0x4000 + ((i - 1)
4075 * 4)));
4076 }
4077
4078 pci_set_drvdata(ioc->pdev, ioc->shost);
4079 r = _base_get_ioc_facts(ioc, CAN_SLEEP);
4080 if (r)
4081 goto out_free_resources;
4082
4083 r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
4084 if (r)
4085 goto out_free_resources;
4086
4087 ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
4088 sizeof(Mpi2PortFactsReply_t), GFP_KERNEL);
4089 if (!ioc->pfacts) {
4090 r = -ENOMEM;
4091 goto out_free_resources;
4092 }
4093
4094 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
4095 r = _base_get_port_facts(ioc, i, CAN_SLEEP);
4096 if (r)
4097 goto out_free_resources;
4098 }
4099
4100 r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
4101 if (r)
4102 goto out_free_resources;
4103
4104 init_waitqueue_head(&ioc->reset_wq);
4105
4106 /* allocate memory pd handle bitmask list */
4107 ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8);
4108 if (ioc->facts.MaxDevHandle % 8)
4109 ioc->pd_handles_sz++;
4110 ioc->pd_handles = kzalloc(ioc->pd_handles_sz,
4111 GFP_KERNEL);
4112 if (!ioc->pd_handles) {
4113 r = -ENOMEM;
4114 goto out_free_resources;
4115 }
4116
4117 ioc->fwfault_debug = mpt2sas_fwfault_debug;
4118
4119 /* base internal command bits */
4120 mutex_init(&ioc->base_cmds.mutex);
4121 ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4122 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
4123
4124 /* transport internal command bits */
4125 ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4126 ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
4127 mutex_init(&ioc->transport_cmds.mutex);
4128
4129 /* scsih internal command bits */
4130 ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4131 ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
4132 mutex_init(&ioc->scsih_cmds.mutex);
4133
4134 /* task management internal command bits */
4135 ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4136 ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
4137 mutex_init(&ioc->tm_cmds.mutex);
4138
4139 /* config page internal command bits */
4140 ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4141 ioc->config_cmds.status = MPT2_CMD_NOT_USED;
4142 mutex_init(&ioc->config_cmds.mutex);
4143
4144 /* ctl module internal command bits */
4145 ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4146 ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
4147 ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
4148 mutex_init(&ioc->ctl_cmds.mutex);
4149
4150 if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
4151 !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
4152 !ioc->config_cmds.reply || !ioc->ctl_cmds.reply ||
4153 !ioc->ctl_cmds.sense) {
4154 r = -ENOMEM;
4155 goto out_free_resources;
4156 }
4157
4158 if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
4159 !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
4160 !ioc->config_cmds.reply || !ioc->ctl_cmds.reply) {
4161 r = -ENOMEM;
4162 goto out_free_resources;
4163 }
4164
4165 init_completion(&ioc->shost_recovery_done);
4166
4167 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
4168 ioc->event_masks[i] = -1;
4169
4170 /* here we enable the events we care about */
4171 _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
4172 _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
4173 _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
4174 _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
4175 _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
4176 _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
4177 _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
4178 _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
4179 _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
4180 _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
4181 r = _base_make_ioc_operational(ioc, CAN_SLEEP);
4182 if (r)
4183 goto out_free_resources;
4184
4185 if (missing_delay[0] != -1 && missing_delay[1] != -1)
4186 _base_update_missing_delay(ioc, missing_delay[0],
4187 missing_delay[1]);
4188
4189 mpt2sas_base_start_watchdog(ioc);
4190 return 0;
4191
4192 out_free_resources:
4193
4194 ioc->remove_host = 1;
4195 mpt2sas_base_free_resources(ioc);
4196 _base_release_memory_pools(ioc);
4197 pci_set_drvdata(ioc->pdev, NULL);
4198 kfree(ioc->cpu_msix_table);
4199 if (ioc->is_warpdrive)
4200 kfree(ioc->reply_post_host_index);
4201 kfree(ioc->pd_handles);
4202 kfree(ioc->tm_cmds.reply);
4203 kfree(ioc->transport_cmds.reply);
4204 kfree(ioc->scsih_cmds.reply);
4205 kfree(ioc->config_cmds.reply);
4206 kfree(ioc->base_cmds.reply);
4207 kfree(ioc->ctl_cmds.reply);
4208 kfree(ioc->ctl_cmds.sense);
4209 kfree(ioc->pfacts);
4210 ioc->ctl_cmds.reply = NULL;
4211 ioc->base_cmds.reply = NULL;
4212 ioc->tm_cmds.reply = NULL;
4213 ioc->scsih_cmds.reply = NULL;
4214 ioc->transport_cmds.reply = NULL;
4215 ioc->config_cmds.reply = NULL;
4216 ioc->pfacts = NULL;
4217 return r;
4218 }
4219
4220
4221 /**
4222 * mpt2sas_base_detach - remove controller instance
4223 * @ioc: per adapter object
4224 *
4225 * Return nothing.
4226 */
4227 void
4228 mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
4229 {
4230
4231 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
4232 __func__));
4233
4234 mpt2sas_base_stop_watchdog(ioc);
4235 mpt2sas_base_free_resources(ioc);
4236 _base_release_memory_pools(ioc);
4237 pci_set_drvdata(ioc->pdev, NULL);
4238 kfree(ioc->cpu_msix_table);
4239 if (ioc->is_warpdrive)
4240 kfree(ioc->reply_post_host_index);
4241 kfree(ioc->pd_handles);
4242 kfree(ioc->pfacts);
4243 kfree(ioc->ctl_cmds.reply);
4244 kfree(ioc->ctl_cmds.sense);
4245 kfree(ioc->base_cmds.reply);
4246 kfree(ioc->tm_cmds.reply);
4247 kfree(ioc->transport_cmds.reply);
4248 kfree(ioc->scsih_cmds.reply);
4249 kfree(ioc->config_cmds.reply);
4250 }
4251
4252 /**
4253 * _base_reset_handler - reset callback handler (for base)
4254 * @ioc: per adapter object
4255 * @reset_phase: phase
4256 *
4257 * The handler for doing any required cleanup or initialization.
4258 *
4259 * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
4260 * MPT2_IOC_DONE_RESET
4261 *
4262 * Return nothing.
4263 */
4264 static void
4265 _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
4266 {
4267 mpt2sas_scsih_reset_handler(ioc, reset_phase);
4268 mpt2sas_ctl_reset_handler(ioc, reset_phase);
4269 switch (reset_phase) {
4270 case MPT2_IOC_PRE_RESET:
4271 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
4272 "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
4273 break;
4274 case MPT2_IOC_AFTER_RESET:
4275 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
4276 "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
4277 if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
4278 ioc->transport_cmds.status |= MPT2_CMD_RESET;
4279 mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
4280 complete(&ioc->transport_cmds.done);
4281 }
4282 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
4283 ioc->base_cmds.status |= MPT2_CMD_RESET;
4284 mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
4285 complete(&ioc->base_cmds.done);
4286 }
4287 if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
4288 ioc->config_cmds.status |= MPT2_CMD_RESET;
4289 mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
4290 ioc->config_cmds.smid = USHRT_MAX;
4291 complete(&ioc->config_cmds.done);
4292 }
4293 break;
4294 case MPT2_IOC_DONE_RESET:
4295 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
4296 "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
4297 break;
4298 }
4299 }
4300
4301 /**
4302 * _wait_for_commands_to_complete - reset controller
4303 * @ioc: Pointer to MPT_ADAPTER structure
4304 * @sleep_flag: CAN_SLEEP or NO_SLEEP
4305 *
4306 * This function waiting(3s) for all pending commands to complete
4307 * prior to putting controller in reset.
4308 */
4309 static void
4310 _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
4311 {
4312 u32 ioc_state;
4313 unsigned long flags;
4314 u16 i;
4315
4316 ioc->pending_io_count = 0;
4317 if (sleep_flag != CAN_SLEEP)
4318 return;
4319
4320 ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
4321 if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
4322 return;
4323
4324 /* pending command count */
4325 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
4326 for (i = 0; i < ioc->scsiio_depth; i++)
4327 if (ioc->scsi_lookup[i].cb_idx != 0xFF)
4328 ioc->pending_io_count++;
4329 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
4330
4331 if (!ioc->pending_io_count)
4332 return;
4333
4334 /* wait for pending commands to complete */
4335 wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ);
4336 }
4337
4338 /**
4339 * mpt2sas_base_hard_reset_handler - reset controller
4340 * @ioc: Pointer to MPT_ADAPTER structure
4341 * @sleep_flag: CAN_SLEEP or NO_SLEEP
4342 * @type: FORCE_BIG_HAMMER or SOFT_RESET
4343 *
4344 * Returns 0 for success, non-zero for failure.
4345 */
4346 int
4347 mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
4348 enum reset_type type)
4349 {
4350 int r;
4351 unsigned long flags;
4352 u8 pe_complete = ioc->wait_for_port_enable_to_complete;
4353
4354 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc->name,
4355 __func__));
4356
4357 if (ioc->pci_error_recovery) {
4358 printk(MPT2SAS_ERR_FMT "%s: pci error recovery reset\n",
4359 ioc->name, __func__);
4360 r = 0;
4361 goto out;
4362 }
4363
4364 if (mpt2sas_fwfault_debug)
4365 mpt2sas_halt_firmware(ioc);
4366
4367 /* TODO - What we really should be doing is pulling
4368 * out all the code associated with NO_SLEEP; its never used.
4369 * That is legacy code from mpt fusion driver, ported over.
4370 * I will leave this BUG_ON here for now till its been resolved.
4371 */
4372 BUG_ON(sleep_flag == NO_SLEEP);
4373
4374 /* wait for an active reset in progress to complete */
4375 if (!mutex_trylock(&ioc->reset_in_progress_mutex)) {
4376 do {
4377 ssleep(1);
4378 } while (ioc->shost_recovery == 1);
4379 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
4380 __func__));
4381 return ioc->ioc_reset_in_progress_status;
4382 }
4383
4384 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
4385 ioc->shost_recovery = 1;
4386 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
4387
4388 _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
4389 _wait_for_commands_to_complete(ioc, sleep_flag);
4390 _base_mask_interrupts(ioc);
4391 r = _base_make_ioc_ready(ioc, sleep_flag, type);
4392 if (r)
4393 goto out;
4394 _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
4395
4396 /* If this hard reset is called while port enable is active, then
4397 * there is no reason to call make_ioc_operational
4398 */
4399 if (pe_complete) {
4400 r = -EFAULT;
4401 goto out;
4402 }
4403 r = _base_make_ioc_operational(ioc, sleep_flag);
4404 if (!r)
4405 _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
4406 out:
4407 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: %s\n",
4408 ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
4409
4410 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
4411 ioc->ioc_reset_in_progress_status = r;
4412 ioc->shost_recovery = 0;
4413 complete(&ioc->shost_recovery_done);
4414 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
4415 mutex_unlock(&ioc->reset_in_progress_mutex);
4416
4417 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
4418 __func__));
4419 return r;
4420 }
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