x86: cache_info: Kill the atomic allocation in amd_init_l3_cache()
[linux-2.6/linux-mips.git] / drivers / tty / serial / atmel_serial.c
blobaf9b7814965a461921d337047c068aed9bb5d051
1 /*
2 * Driver for Atmel AT91 / AT32 Serial ports
3 * Copyright (C) 2003 Rick Bronson
5 * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * DMA support added by Chip Coldwell.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 #include <linux/module.h>
26 #include <linux/tty.h>
27 #include <linux/ioport.h>
28 #include <linux/slab.h>
29 #include <linux/init.h>
30 #include <linux/serial.h>
31 #include <linux/clk.h>
32 #include <linux/console.h>
33 #include <linux/sysrq.h>
34 #include <linux/tty_flip.h>
35 #include <linux/platform_device.h>
36 #include <linux/dma-mapping.h>
37 #include <linux/atmel_pdc.h>
38 #include <linux/atmel_serial.h>
39 #include <linux/uaccess.h>
41 #include <asm/io.h>
42 #include <asm/ioctls.h>
44 #include <asm/mach/serial_at91.h>
45 #include <mach/board.h>
47 #ifdef CONFIG_ARM
48 #include <mach/cpu.h>
49 #include <mach/gpio.h>
50 #endif
52 #define PDC_BUFFER_SIZE 512
53 /* Revisit: We should calculate this based on the actual port settings */
54 #define PDC_RX_TIMEOUT (3 * 10) /* 3 bytes */
56 #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
57 #define SUPPORT_SYSRQ
58 #endif
60 #include <linux/serial_core.h>
62 static void atmel_start_rx(struct uart_port *port);
63 static void atmel_stop_rx(struct uart_port *port);
65 #ifdef CONFIG_SERIAL_ATMEL_TTYAT
67 /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
68 * should coexist with the 8250 driver, such as if we have an external 16C550
69 * UART. */
70 #define SERIAL_ATMEL_MAJOR 204
71 #define MINOR_START 154
72 #define ATMEL_DEVICENAME "ttyAT"
74 #else
76 /* Use device name ttyS, major 4, minor 64-68. This is the usual serial port
77 * name, but it is legally reserved for the 8250 driver. */
78 #define SERIAL_ATMEL_MAJOR TTY_MAJOR
79 #define MINOR_START 64
80 #define ATMEL_DEVICENAME "ttyS"
82 #endif
84 #define ATMEL_ISR_PASS_LIMIT 256
86 /* UART registers. CR is write-only, hence no GET macro */
87 #define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR)
88 #define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR)
89 #define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR)
90 #define UART_PUT_IER(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IER)
91 #define UART_PUT_IDR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IDR)
92 #define UART_GET_IMR(port) __raw_readl((port)->membase + ATMEL_US_IMR)
93 #define UART_GET_CSR(port) __raw_readl((port)->membase + ATMEL_US_CSR)
94 #define UART_GET_CHAR(port) __raw_readl((port)->membase + ATMEL_US_RHR)
95 #define UART_PUT_CHAR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_THR)
96 #define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR)
97 #define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR)
98 #define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR)
99 #define UART_PUT_TTGR(port, v) __raw_writel(v, (port)->membase + ATMEL_US_TTGR)
101 /* PDC registers */
102 #define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
103 #define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR)
105 #define UART_PUT_RPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RPR)
106 #define UART_GET_RPR(port) __raw_readl((port)->membase + ATMEL_PDC_RPR)
107 #define UART_PUT_RCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RCR)
108 #define UART_PUT_RNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNPR)
109 #define UART_PUT_RNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNCR)
111 #define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR)
112 #define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR)
113 #define UART_GET_TCR(port) __raw_readl((port)->membase + ATMEL_PDC_TCR)
115 static int (*atmel_open_hook)(struct uart_port *);
116 static void (*atmel_close_hook)(struct uart_port *);
118 struct atmel_dma_buffer {
119 unsigned char *buf;
120 dma_addr_t dma_addr;
121 unsigned int dma_size;
122 unsigned int ofs;
125 struct atmel_uart_char {
126 u16 status;
127 u16 ch;
130 #define ATMEL_SERIAL_RINGSIZE 1024
133 * We wrap our port structure around the generic uart_port.
135 struct atmel_uart_port {
136 struct uart_port uart; /* uart */
137 struct clk *clk; /* uart clock */
138 int may_wakeup; /* cached value of device_may_wakeup for times we need to disable it */
139 u32 backup_imr; /* IMR saved during suspend */
140 int break_active; /* break being received */
142 short use_dma_rx; /* enable PDC receiver */
143 short pdc_rx_idx; /* current PDC RX buffer */
144 struct atmel_dma_buffer pdc_rx[2]; /* PDC receier */
146 short use_dma_tx; /* enable PDC transmitter */
147 struct atmel_dma_buffer pdc_tx; /* PDC transmitter */
149 struct tasklet_struct tasklet;
150 unsigned int irq_status;
151 unsigned int irq_status_prev;
153 struct circ_buf rx_ring;
155 struct serial_rs485 rs485; /* rs485 settings */
156 unsigned int tx_done_mask;
159 static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
161 #ifdef SUPPORT_SYSRQ
162 static struct console atmel_console;
163 #endif
165 static inline struct atmel_uart_port *
166 to_atmel_uart_port(struct uart_port *uart)
168 return container_of(uart, struct atmel_uart_port, uart);
171 #ifdef CONFIG_SERIAL_ATMEL_PDC
172 static bool atmel_use_dma_rx(struct uart_port *port)
174 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
176 return atmel_port->use_dma_rx;
179 static bool atmel_use_dma_tx(struct uart_port *port)
181 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
183 return atmel_port->use_dma_tx;
185 #else
186 static bool atmel_use_dma_rx(struct uart_port *port)
188 return false;
191 static bool atmel_use_dma_tx(struct uart_port *port)
193 return false;
195 #endif
197 /* Enable or disable the rs485 support */
198 void atmel_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf)
200 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
201 unsigned int mode;
203 spin_lock(&port->lock);
205 /* Disable interrupts */
206 UART_PUT_IDR(port, atmel_port->tx_done_mask);
208 mode = UART_GET_MR(port);
210 /* Resetting serial mode to RS232 (0x0) */
211 mode &= ~ATMEL_US_USMODE;
213 atmel_port->rs485 = *rs485conf;
215 if (rs485conf->flags & SER_RS485_ENABLED) {
216 dev_dbg(port->dev, "Setting UART to RS485\n");
217 atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
218 if (rs485conf->flags & SER_RS485_RTS_AFTER_SEND)
219 UART_PUT_TTGR(port, rs485conf->delay_rts_after_send);
220 mode |= ATMEL_US_USMODE_RS485;
221 } else {
222 dev_dbg(port->dev, "Setting UART to RS232\n");
223 if (atmel_use_dma_tx(port))
224 atmel_port->tx_done_mask = ATMEL_US_ENDTX |
225 ATMEL_US_TXBUFE;
226 else
227 atmel_port->tx_done_mask = ATMEL_US_TXRDY;
229 UART_PUT_MR(port, mode);
231 /* Enable interrupts */
232 UART_PUT_IER(port, atmel_port->tx_done_mask);
234 spin_unlock(&port->lock);
239 * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
241 static u_int atmel_tx_empty(struct uart_port *port)
243 return (UART_GET_CSR(port) & ATMEL_US_TXEMPTY) ? TIOCSER_TEMT : 0;
247 * Set state of the modem control output lines
249 static void atmel_set_mctrl(struct uart_port *port, u_int mctrl)
251 unsigned int control = 0;
252 unsigned int mode;
253 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
255 #ifdef CONFIG_ARCH_AT91RM9200
256 if (cpu_is_at91rm9200()) {
258 * AT91RM9200 Errata #39: RTS0 is not internally connected
259 * to PA21. We need to drive the pin manually.
261 if (port->mapbase == AT91RM9200_BASE_US0) {
262 if (mctrl & TIOCM_RTS)
263 at91_set_gpio_value(AT91_PIN_PA21, 0);
264 else
265 at91_set_gpio_value(AT91_PIN_PA21, 1);
268 #endif
270 if (mctrl & TIOCM_RTS)
271 control |= ATMEL_US_RTSEN;
272 else
273 control |= ATMEL_US_RTSDIS;
275 if (mctrl & TIOCM_DTR)
276 control |= ATMEL_US_DTREN;
277 else
278 control |= ATMEL_US_DTRDIS;
280 UART_PUT_CR(port, control);
282 /* Local loopback mode? */
283 mode = UART_GET_MR(port) & ~ATMEL_US_CHMODE;
284 if (mctrl & TIOCM_LOOP)
285 mode |= ATMEL_US_CHMODE_LOC_LOOP;
286 else
287 mode |= ATMEL_US_CHMODE_NORMAL;
289 /* Resetting serial mode to RS232 (0x0) */
290 mode &= ~ATMEL_US_USMODE;
292 if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
293 dev_dbg(port->dev, "Setting UART to RS485\n");
294 if (atmel_port->rs485.flags & SER_RS485_RTS_AFTER_SEND)
295 UART_PUT_TTGR(port,
296 atmel_port->rs485.delay_rts_after_send);
297 mode |= ATMEL_US_USMODE_RS485;
298 } else {
299 dev_dbg(port->dev, "Setting UART to RS232\n");
301 UART_PUT_MR(port, mode);
305 * Get state of the modem control input lines
307 static u_int atmel_get_mctrl(struct uart_port *port)
309 unsigned int status, ret = 0;
311 status = UART_GET_CSR(port);
314 * The control signals are active low.
316 if (!(status & ATMEL_US_DCD))
317 ret |= TIOCM_CD;
318 if (!(status & ATMEL_US_CTS))
319 ret |= TIOCM_CTS;
320 if (!(status & ATMEL_US_DSR))
321 ret |= TIOCM_DSR;
322 if (!(status & ATMEL_US_RI))
323 ret |= TIOCM_RI;
325 return ret;
329 * Stop transmitting.
331 static void atmel_stop_tx(struct uart_port *port)
333 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
335 if (atmel_use_dma_tx(port)) {
336 /* disable PDC transmit */
337 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
339 /* Disable interrupts */
340 UART_PUT_IDR(port, atmel_port->tx_done_mask);
342 if (atmel_port->rs485.flags & SER_RS485_ENABLED)
343 atmel_start_rx(port);
347 * Start transmitting.
349 static void atmel_start_tx(struct uart_port *port)
351 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
353 if (atmel_use_dma_tx(port)) {
354 if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN)
355 /* The transmitter is already running. Yes, we
356 really need this.*/
357 return;
359 if (atmel_port->rs485.flags & SER_RS485_ENABLED)
360 atmel_stop_rx(port);
362 /* re-enable PDC transmit */
363 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
365 /* Enable interrupts */
366 UART_PUT_IER(port, atmel_port->tx_done_mask);
370 * start receiving - port is in process of being opened.
372 static void atmel_start_rx(struct uart_port *port)
374 UART_PUT_CR(port, ATMEL_US_RSTSTA); /* reset status and receiver */
376 if (atmel_use_dma_rx(port)) {
377 /* enable PDC controller */
378 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
379 port->read_status_mask);
380 UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
381 } else {
382 UART_PUT_IER(port, ATMEL_US_RXRDY);
387 * Stop receiving - port is in process of being closed.
389 static void atmel_stop_rx(struct uart_port *port)
391 if (atmel_use_dma_rx(port)) {
392 /* disable PDC receive */
393 UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS);
394 UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
395 port->read_status_mask);
396 } else {
397 UART_PUT_IDR(port, ATMEL_US_RXRDY);
402 * Enable modem status interrupts
404 static void atmel_enable_ms(struct uart_port *port)
406 UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC
407 | ATMEL_US_DCDIC | ATMEL_US_CTSIC);
411 * Control the transmission of a break signal
413 static void atmel_break_ctl(struct uart_port *port, int break_state)
415 if (break_state != 0)
416 UART_PUT_CR(port, ATMEL_US_STTBRK); /* start break */
417 else
418 UART_PUT_CR(port, ATMEL_US_STPBRK); /* stop break */
422 * Stores the incoming character in the ring buffer
424 static void
425 atmel_buffer_rx_char(struct uart_port *port, unsigned int status,
426 unsigned int ch)
428 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
429 struct circ_buf *ring = &atmel_port->rx_ring;
430 struct atmel_uart_char *c;
432 if (!CIRC_SPACE(ring->head, ring->tail, ATMEL_SERIAL_RINGSIZE))
433 /* Buffer overflow, ignore char */
434 return;
436 c = &((struct atmel_uart_char *)ring->buf)[ring->head];
437 c->status = status;
438 c->ch = ch;
440 /* Make sure the character is stored before we update head. */
441 smp_wmb();
443 ring->head = (ring->head + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
447 * Deal with parity, framing and overrun errors.
449 static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status)
451 /* clear error */
452 UART_PUT_CR(port, ATMEL_US_RSTSTA);
454 if (status & ATMEL_US_RXBRK) {
455 /* ignore side-effect */
456 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
457 port->icount.brk++;
459 if (status & ATMEL_US_PARE)
460 port->icount.parity++;
461 if (status & ATMEL_US_FRAME)
462 port->icount.frame++;
463 if (status & ATMEL_US_OVRE)
464 port->icount.overrun++;
468 * Characters received (called from interrupt handler)
470 static void atmel_rx_chars(struct uart_port *port)
472 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
473 unsigned int status, ch;
475 status = UART_GET_CSR(port);
476 while (status & ATMEL_US_RXRDY) {
477 ch = UART_GET_CHAR(port);
480 * note that the error handling code is
481 * out of the main execution path
483 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
484 | ATMEL_US_OVRE | ATMEL_US_RXBRK)
485 || atmel_port->break_active)) {
487 /* clear error */
488 UART_PUT_CR(port, ATMEL_US_RSTSTA);
490 if (status & ATMEL_US_RXBRK
491 && !atmel_port->break_active) {
492 atmel_port->break_active = 1;
493 UART_PUT_IER(port, ATMEL_US_RXBRK);
494 } else {
496 * This is either the end-of-break
497 * condition or we've received at
498 * least one character without RXBRK
499 * being set. In both cases, the next
500 * RXBRK will indicate start-of-break.
502 UART_PUT_IDR(port, ATMEL_US_RXBRK);
503 status &= ~ATMEL_US_RXBRK;
504 atmel_port->break_active = 0;
508 atmel_buffer_rx_char(port, status, ch);
509 status = UART_GET_CSR(port);
512 tasklet_schedule(&atmel_port->tasklet);
516 * Transmit characters (called from tasklet with TXRDY interrupt
517 * disabled)
519 static void atmel_tx_chars(struct uart_port *port)
521 struct circ_buf *xmit = &port->state->xmit;
522 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
524 if (port->x_char && UART_GET_CSR(port) & atmel_port->tx_done_mask) {
525 UART_PUT_CHAR(port, port->x_char);
526 port->icount.tx++;
527 port->x_char = 0;
529 if (uart_circ_empty(xmit) || uart_tx_stopped(port))
530 return;
532 while (UART_GET_CSR(port) & atmel_port->tx_done_mask) {
533 UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
534 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
535 port->icount.tx++;
536 if (uart_circ_empty(xmit))
537 break;
540 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
541 uart_write_wakeup(port);
543 if (!uart_circ_empty(xmit))
544 /* Enable interrupts */
545 UART_PUT_IER(port, atmel_port->tx_done_mask);
549 * receive interrupt handler.
551 static void
552 atmel_handle_receive(struct uart_port *port, unsigned int pending)
554 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
556 if (atmel_use_dma_rx(port)) {
558 * PDC receive. Just schedule the tasklet and let it
559 * figure out the details.
561 * TODO: We're not handling error flags correctly at
562 * the moment.
564 if (pending & (ATMEL_US_ENDRX | ATMEL_US_TIMEOUT)) {
565 UART_PUT_IDR(port, (ATMEL_US_ENDRX
566 | ATMEL_US_TIMEOUT));
567 tasklet_schedule(&atmel_port->tasklet);
570 if (pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE |
571 ATMEL_US_FRAME | ATMEL_US_PARE))
572 atmel_pdc_rxerr(port, pending);
575 /* Interrupt receive */
576 if (pending & ATMEL_US_RXRDY)
577 atmel_rx_chars(port);
578 else if (pending & ATMEL_US_RXBRK) {
580 * End of break detected. If it came along with a
581 * character, atmel_rx_chars will handle it.
583 UART_PUT_CR(port, ATMEL_US_RSTSTA);
584 UART_PUT_IDR(port, ATMEL_US_RXBRK);
585 atmel_port->break_active = 0;
590 * transmit interrupt handler. (Transmit is IRQF_NODELAY safe)
592 static void
593 atmel_handle_transmit(struct uart_port *port, unsigned int pending)
595 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
597 if (pending & atmel_port->tx_done_mask) {
598 /* Either PDC or interrupt transmission */
599 UART_PUT_IDR(port, atmel_port->tx_done_mask);
600 tasklet_schedule(&atmel_port->tasklet);
605 * status flags interrupt handler.
607 static void
608 atmel_handle_status(struct uart_port *port, unsigned int pending,
609 unsigned int status)
611 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
613 if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC
614 | ATMEL_US_CTSIC)) {
615 atmel_port->irq_status = status;
616 tasklet_schedule(&atmel_port->tasklet);
621 * Interrupt handler
623 static irqreturn_t atmel_interrupt(int irq, void *dev_id)
625 struct uart_port *port = dev_id;
626 unsigned int status, pending, pass_counter = 0;
628 do {
629 status = UART_GET_CSR(port);
630 pending = status & UART_GET_IMR(port);
631 if (!pending)
632 break;
634 atmel_handle_receive(port, pending);
635 atmel_handle_status(port, pending, status);
636 atmel_handle_transmit(port, pending);
637 } while (pass_counter++ < ATMEL_ISR_PASS_LIMIT);
639 return pass_counter ? IRQ_HANDLED : IRQ_NONE;
643 * Called from tasklet with ENDTX and TXBUFE interrupts disabled.
645 static void atmel_tx_dma(struct uart_port *port)
647 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
648 struct circ_buf *xmit = &port->state->xmit;
649 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
650 int count;
652 /* nothing left to transmit? */
653 if (UART_GET_TCR(port))
654 return;
656 xmit->tail += pdc->ofs;
657 xmit->tail &= UART_XMIT_SIZE - 1;
659 port->icount.tx += pdc->ofs;
660 pdc->ofs = 0;
662 /* more to transmit - setup next transfer */
664 /* disable PDC transmit */
665 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
667 if (!uart_circ_empty(xmit) && !uart_tx_stopped(port)) {
668 dma_sync_single_for_device(port->dev,
669 pdc->dma_addr,
670 pdc->dma_size,
671 DMA_TO_DEVICE);
673 count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
674 pdc->ofs = count;
676 UART_PUT_TPR(port, pdc->dma_addr + xmit->tail);
677 UART_PUT_TCR(port, count);
678 /* re-enable PDC transmit */
679 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
680 /* Enable interrupts */
681 UART_PUT_IER(port, atmel_port->tx_done_mask);
682 } else {
683 if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
684 /* DMA done, stop TX, start RX for RS485 */
685 atmel_start_rx(port);
689 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
690 uart_write_wakeup(port);
693 static void atmel_rx_from_ring(struct uart_port *port)
695 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
696 struct circ_buf *ring = &atmel_port->rx_ring;
697 unsigned int flg;
698 unsigned int status;
700 while (ring->head != ring->tail) {
701 struct atmel_uart_char c;
703 /* Make sure c is loaded after head. */
704 smp_rmb();
706 c = ((struct atmel_uart_char *)ring->buf)[ring->tail];
708 ring->tail = (ring->tail + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
710 port->icount.rx++;
711 status = c.status;
712 flg = TTY_NORMAL;
715 * note that the error handling code is
716 * out of the main execution path
718 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
719 | ATMEL_US_OVRE | ATMEL_US_RXBRK))) {
720 if (status & ATMEL_US_RXBRK) {
721 /* ignore side-effect */
722 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
724 port->icount.brk++;
725 if (uart_handle_break(port))
726 continue;
728 if (status & ATMEL_US_PARE)
729 port->icount.parity++;
730 if (status & ATMEL_US_FRAME)
731 port->icount.frame++;
732 if (status & ATMEL_US_OVRE)
733 port->icount.overrun++;
735 status &= port->read_status_mask;
737 if (status & ATMEL_US_RXBRK)
738 flg = TTY_BREAK;
739 else if (status & ATMEL_US_PARE)
740 flg = TTY_PARITY;
741 else if (status & ATMEL_US_FRAME)
742 flg = TTY_FRAME;
746 if (uart_handle_sysrq_char(port, c.ch))
747 continue;
749 uart_insert_char(port, status, ATMEL_US_OVRE, c.ch, flg);
753 * Drop the lock here since it might end up calling
754 * uart_start(), which takes the lock.
756 spin_unlock(&port->lock);
757 tty_flip_buffer_push(port->state->port.tty);
758 spin_lock(&port->lock);
761 static void atmel_rx_from_dma(struct uart_port *port)
763 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
764 struct tty_struct *tty = port->state->port.tty;
765 struct atmel_dma_buffer *pdc;
766 int rx_idx = atmel_port->pdc_rx_idx;
767 unsigned int head;
768 unsigned int tail;
769 unsigned int count;
771 do {
772 /* Reset the UART timeout early so that we don't miss one */
773 UART_PUT_CR(port, ATMEL_US_STTTO);
775 pdc = &atmel_port->pdc_rx[rx_idx];
776 head = UART_GET_RPR(port) - pdc->dma_addr;
777 tail = pdc->ofs;
779 /* If the PDC has switched buffers, RPR won't contain
780 * any address within the current buffer. Since head
781 * is unsigned, we just need a one-way comparison to
782 * find out.
784 * In this case, we just need to consume the entire
785 * buffer and resubmit it for DMA. This will clear the
786 * ENDRX bit as well, so that we can safely re-enable
787 * all interrupts below.
789 head = min(head, pdc->dma_size);
791 if (likely(head != tail)) {
792 dma_sync_single_for_cpu(port->dev, pdc->dma_addr,
793 pdc->dma_size, DMA_FROM_DEVICE);
796 * head will only wrap around when we recycle
797 * the DMA buffer, and when that happens, we
798 * explicitly set tail to 0. So head will
799 * always be greater than tail.
801 count = head - tail;
803 tty_insert_flip_string(tty, pdc->buf + pdc->ofs, count);
805 dma_sync_single_for_device(port->dev, pdc->dma_addr,
806 pdc->dma_size, DMA_FROM_DEVICE);
808 port->icount.rx += count;
809 pdc->ofs = head;
813 * If the current buffer is full, we need to check if
814 * the next one contains any additional data.
816 if (head >= pdc->dma_size) {
817 pdc->ofs = 0;
818 UART_PUT_RNPR(port, pdc->dma_addr);
819 UART_PUT_RNCR(port, pdc->dma_size);
821 rx_idx = !rx_idx;
822 atmel_port->pdc_rx_idx = rx_idx;
824 } while (head >= pdc->dma_size);
827 * Drop the lock here since it might end up calling
828 * uart_start(), which takes the lock.
830 spin_unlock(&port->lock);
831 tty_flip_buffer_push(tty);
832 spin_lock(&port->lock);
834 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
838 * tasklet handling tty stuff outside the interrupt handler.
840 static void atmel_tasklet_func(unsigned long data)
842 struct uart_port *port = (struct uart_port *)data;
843 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
844 unsigned int status;
845 unsigned int status_change;
847 /* The interrupt handler does not take the lock */
848 spin_lock(&port->lock);
850 if (atmel_use_dma_tx(port))
851 atmel_tx_dma(port);
852 else
853 atmel_tx_chars(port);
855 status = atmel_port->irq_status;
856 status_change = status ^ atmel_port->irq_status_prev;
858 if (status_change & (ATMEL_US_RI | ATMEL_US_DSR
859 | ATMEL_US_DCD | ATMEL_US_CTS)) {
860 /* TODO: All reads to CSR will clear these interrupts! */
861 if (status_change & ATMEL_US_RI)
862 port->icount.rng++;
863 if (status_change & ATMEL_US_DSR)
864 port->icount.dsr++;
865 if (status_change & ATMEL_US_DCD)
866 uart_handle_dcd_change(port, !(status & ATMEL_US_DCD));
867 if (status_change & ATMEL_US_CTS)
868 uart_handle_cts_change(port, !(status & ATMEL_US_CTS));
870 wake_up_interruptible(&port->state->port.delta_msr_wait);
872 atmel_port->irq_status_prev = status;
875 if (atmel_use_dma_rx(port))
876 atmel_rx_from_dma(port);
877 else
878 atmel_rx_from_ring(port);
880 spin_unlock(&port->lock);
884 * Perform initialization and enable port for reception
886 static int atmel_startup(struct uart_port *port)
888 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
889 struct tty_struct *tty = port->state->port.tty;
890 int retval;
893 * Ensure that no interrupts are enabled otherwise when
894 * request_irq() is called we could get stuck trying to
895 * handle an unexpected interrupt
897 UART_PUT_IDR(port, -1);
900 * Allocate the IRQ
902 retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED,
903 tty ? tty->name : "atmel_serial", port);
904 if (retval) {
905 printk("atmel_serial: atmel_startup - Can't get irq\n");
906 return retval;
910 * Initialize DMA (if necessary)
912 if (atmel_use_dma_rx(port)) {
913 int i;
915 for (i = 0; i < 2; i++) {
916 struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
918 pdc->buf = kmalloc(PDC_BUFFER_SIZE, GFP_KERNEL);
919 if (pdc->buf == NULL) {
920 if (i != 0) {
921 dma_unmap_single(port->dev,
922 atmel_port->pdc_rx[0].dma_addr,
923 PDC_BUFFER_SIZE,
924 DMA_FROM_DEVICE);
925 kfree(atmel_port->pdc_rx[0].buf);
927 free_irq(port->irq, port);
928 return -ENOMEM;
930 pdc->dma_addr = dma_map_single(port->dev,
931 pdc->buf,
932 PDC_BUFFER_SIZE,
933 DMA_FROM_DEVICE);
934 pdc->dma_size = PDC_BUFFER_SIZE;
935 pdc->ofs = 0;
938 atmel_port->pdc_rx_idx = 0;
940 UART_PUT_RPR(port, atmel_port->pdc_rx[0].dma_addr);
941 UART_PUT_RCR(port, PDC_BUFFER_SIZE);
943 UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr);
944 UART_PUT_RNCR(port, PDC_BUFFER_SIZE);
946 if (atmel_use_dma_tx(port)) {
947 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
948 struct circ_buf *xmit = &port->state->xmit;
950 pdc->buf = xmit->buf;
951 pdc->dma_addr = dma_map_single(port->dev,
952 pdc->buf,
953 UART_XMIT_SIZE,
954 DMA_TO_DEVICE);
955 pdc->dma_size = UART_XMIT_SIZE;
956 pdc->ofs = 0;
960 * If there is a specific "open" function (to register
961 * control line interrupts)
963 if (atmel_open_hook) {
964 retval = atmel_open_hook(port);
965 if (retval) {
966 free_irq(port->irq, port);
967 return retval;
971 /* Save current CSR for comparison in atmel_tasklet_func() */
972 atmel_port->irq_status_prev = UART_GET_CSR(port);
973 atmel_port->irq_status = atmel_port->irq_status_prev;
976 * Finally, enable the serial port
978 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
979 /* enable xmit & rcvr */
980 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
982 if (atmel_use_dma_rx(port)) {
983 /* set UART timeout */
984 UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
985 UART_PUT_CR(port, ATMEL_US_STTTO);
987 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
988 /* enable PDC controller */
989 UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
990 } else {
991 /* enable receive only */
992 UART_PUT_IER(port, ATMEL_US_RXRDY);
995 return 0;
999 * Disable the port
1001 static void atmel_shutdown(struct uart_port *port)
1003 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1005 * Ensure everything is stopped.
1007 atmel_stop_rx(port);
1008 atmel_stop_tx(port);
1011 * Shut-down the DMA.
1013 if (atmel_use_dma_rx(port)) {
1014 int i;
1016 for (i = 0; i < 2; i++) {
1017 struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
1019 dma_unmap_single(port->dev,
1020 pdc->dma_addr,
1021 pdc->dma_size,
1022 DMA_FROM_DEVICE);
1023 kfree(pdc->buf);
1026 if (atmel_use_dma_tx(port)) {
1027 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
1029 dma_unmap_single(port->dev,
1030 pdc->dma_addr,
1031 pdc->dma_size,
1032 DMA_TO_DEVICE);
1036 * Disable all interrupts, port and break condition.
1038 UART_PUT_CR(port, ATMEL_US_RSTSTA);
1039 UART_PUT_IDR(port, -1);
1042 * Free the interrupt
1044 free_irq(port->irq, port);
1047 * If there is a specific "close" function (to unregister
1048 * control line interrupts)
1050 if (atmel_close_hook)
1051 atmel_close_hook(port);
1055 * Flush any TX data submitted for DMA. Called when the TX circular
1056 * buffer is reset.
1058 static void atmel_flush_buffer(struct uart_port *port)
1060 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1062 if (atmel_use_dma_tx(port)) {
1063 UART_PUT_TCR(port, 0);
1064 atmel_port->pdc_tx.ofs = 0;
1069 * Power / Clock management.
1071 static void atmel_serial_pm(struct uart_port *port, unsigned int state,
1072 unsigned int oldstate)
1074 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1076 switch (state) {
1077 case 0:
1079 * Enable the peripheral clock for this serial port.
1080 * This is called on uart_open() or a resume event.
1082 clk_enable(atmel_port->clk);
1084 /* re-enable interrupts if we disabled some on suspend */
1085 UART_PUT_IER(port, atmel_port->backup_imr);
1086 break;
1087 case 3:
1088 /* Back up the interrupt mask and disable all interrupts */
1089 atmel_port->backup_imr = UART_GET_IMR(port);
1090 UART_PUT_IDR(port, -1);
1093 * Disable the peripheral clock for this serial port.
1094 * This is called on uart_close() or a suspend event.
1096 clk_disable(atmel_port->clk);
1097 break;
1098 default:
1099 printk(KERN_ERR "atmel_serial: unknown pm %d\n", state);
1104 * Change the port parameters
1106 static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
1107 struct ktermios *old)
1109 unsigned long flags;
1110 unsigned int mode, imr, quot, baud;
1111 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1113 /* Get current mode register */
1114 mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL
1115 | ATMEL_US_NBSTOP | ATMEL_US_PAR
1116 | ATMEL_US_USMODE);
1118 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
1119 quot = uart_get_divisor(port, baud);
1121 if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */
1122 quot /= 8;
1123 mode |= ATMEL_US_USCLKS_MCK_DIV8;
1126 /* byte size */
1127 switch (termios->c_cflag & CSIZE) {
1128 case CS5:
1129 mode |= ATMEL_US_CHRL_5;
1130 break;
1131 case CS6:
1132 mode |= ATMEL_US_CHRL_6;
1133 break;
1134 case CS7:
1135 mode |= ATMEL_US_CHRL_7;
1136 break;
1137 default:
1138 mode |= ATMEL_US_CHRL_8;
1139 break;
1142 /* stop bits */
1143 if (termios->c_cflag & CSTOPB)
1144 mode |= ATMEL_US_NBSTOP_2;
1146 /* parity */
1147 if (termios->c_cflag & PARENB) {
1148 /* Mark or Space parity */
1149 if (termios->c_cflag & CMSPAR) {
1150 if (termios->c_cflag & PARODD)
1151 mode |= ATMEL_US_PAR_MARK;
1152 else
1153 mode |= ATMEL_US_PAR_SPACE;
1154 } else if (termios->c_cflag & PARODD)
1155 mode |= ATMEL_US_PAR_ODD;
1156 else
1157 mode |= ATMEL_US_PAR_EVEN;
1158 } else
1159 mode |= ATMEL_US_PAR_NONE;
1161 /* hardware handshake (RTS/CTS) */
1162 if (termios->c_cflag & CRTSCTS)
1163 mode |= ATMEL_US_USMODE_HWHS;
1164 else
1165 mode |= ATMEL_US_USMODE_NORMAL;
1167 spin_lock_irqsave(&port->lock, flags);
1169 port->read_status_mask = ATMEL_US_OVRE;
1170 if (termios->c_iflag & INPCK)
1171 port->read_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
1172 if (termios->c_iflag & (BRKINT | PARMRK))
1173 port->read_status_mask |= ATMEL_US_RXBRK;
1175 if (atmel_use_dma_rx(port))
1176 /* need to enable error interrupts */
1177 UART_PUT_IER(port, port->read_status_mask);
1180 * Characters to ignore
1182 port->ignore_status_mask = 0;
1183 if (termios->c_iflag & IGNPAR)
1184 port->ignore_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
1185 if (termios->c_iflag & IGNBRK) {
1186 port->ignore_status_mask |= ATMEL_US_RXBRK;
1188 * If we're ignoring parity and break indicators,
1189 * ignore overruns too (for real raw support).
1191 if (termios->c_iflag & IGNPAR)
1192 port->ignore_status_mask |= ATMEL_US_OVRE;
1194 /* TODO: Ignore all characters if CREAD is set.*/
1196 /* update the per-port timeout */
1197 uart_update_timeout(port, termios->c_cflag, baud);
1200 * save/disable interrupts. The tty layer will ensure that the
1201 * transmitter is empty if requested by the caller, so there's
1202 * no need to wait for it here.
1204 imr = UART_GET_IMR(port);
1205 UART_PUT_IDR(port, -1);
1207 /* disable receiver and transmitter */
1208 UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS);
1210 /* Resetting serial mode to RS232 (0x0) */
1211 mode &= ~ATMEL_US_USMODE;
1213 if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
1214 dev_dbg(port->dev, "Setting UART to RS485\n");
1215 if (atmel_port->rs485.flags & SER_RS485_RTS_AFTER_SEND)
1216 UART_PUT_TTGR(port,
1217 atmel_port->rs485.delay_rts_after_send);
1218 mode |= ATMEL_US_USMODE_RS485;
1219 } else {
1220 dev_dbg(port->dev, "Setting UART to RS232\n");
1223 /* set the parity, stop bits and data size */
1224 UART_PUT_MR(port, mode);
1226 /* set the baud rate */
1227 UART_PUT_BRGR(port, quot);
1228 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
1229 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
1231 /* restore interrupts */
1232 UART_PUT_IER(port, imr);
1234 /* CTS flow-control and modem-status interrupts */
1235 if (UART_ENABLE_MS(port, termios->c_cflag))
1236 port->ops->enable_ms(port);
1238 spin_unlock_irqrestore(&port->lock, flags);
1241 static void atmel_set_ldisc(struct uart_port *port, int new)
1243 int line = port->line;
1245 if (line >= port->state->port.tty->driver->num)
1246 return;
1248 if (port->state->port.tty->ldisc->ops->num == N_PPS) {
1249 port->flags |= UPF_HARDPPS_CD;
1250 atmel_enable_ms(port);
1251 } else {
1252 port->flags &= ~UPF_HARDPPS_CD;
1257 * Return string describing the specified port
1259 static const char *atmel_type(struct uart_port *port)
1261 return (port->type == PORT_ATMEL) ? "ATMEL_SERIAL" : NULL;
1265 * Release the memory region(s) being used by 'port'.
1267 static void atmel_release_port(struct uart_port *port)
1269 struct platform_device *pdev = to_platform_device(port->dev);
1270 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
1272 release_mem_region(port->mapbase, size);
1274 if (port->flags & UPF_IOREMAP) {
1275 iounmap(port->membase);
1276 port->membase = NULL;
1281 * Request the memory region(s) being used by 'port'.
1283 static int atmel_request_port(struct uart_port *port)
1285 struct platform_device *pdev = to_platform_device(port->dev);
1286 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
1288 if (!request_mem_region(port->mapbase, size, "atmel_serial"))
1289 return -EBUSY;
1291 if (port->flags & UPF_IOREMAP) {
1292 port->membase = ioremap(port->mapbase, size);
1293 if (port->membase == NULL) {
1294 release_mem_region(port->mapbase, size);
1295 return -ENOMEM;
1299 return 0;
1303 * Configure/autoconfigure the port.
1305 static void atmel_config_port(struct uart_port *port, int flags)
1307 if (flags & UART_CONFIG_TYPE) {
1308 port->type = PORT_ATMEL;
1309 atmel_request_port(port);
1314 * Verify the new serial_struct (for TIOCSSERIAL).
1316 static int atmel_verify_port(struct uart_port *port, struct serial_struct *ser)
1318 int ret = 0;
1319 if (ser->type != PORT_UNKNOWN && ser->type != PORT_ATMEL)
1320 ret = -EINVAL;
1321 if (port->irq != ser->irq)
1322 ret = -EINVAL;
1323 if (ser->io_type != SERIAL_IO_MEM)
1324 ret = -EINVAL;
1325 if (port->uartclk / 16 != ser->baud_base)
1326 ret = -EINVAL;
1327 if ((void *)port->mapbase != ser->iomem_base)
1328 ret = -EINVAL;
1329 if (port->iobase != ser->port)
1330 ret = -EINVAL;
1331 if (ser->hub6 != 0)
1332 ret = -EINVAL;
1333 return ret;
1336 #ifdef CONFIG_CONSOLE_POLL
1337 static int atmel_poll_get_char(struct uart_port *port)
1339 while (!(UART_GET_CSR(port) & ATMEL_US_RXRDY))
1340 cpu_relax();
1342 return UART_GET_CHAR(port);
1345 static void atmel_poll_put_char(struct uart_port *port, unsigned char ch)
1347 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
1348 cpu_relax();
1350 UART_PUT_CHAR(port, ch);
1352 #endif
1354 static int
1355 atmel_ioctl(struct uart_port *port, unsigned int cmd, unsigned long arg)
1357 struct serial_rs485 rs485conf;
1359 switch (cmd) {
1360 case TIOCSRS485:
1361 if (copy_from_user(&rs485conf, (struct serial_rs485 *) arg,
1362 sizeof(rs485conf)))
1363 return -EFAULT;
1365 atmel_config_rs485(port, &rs485conf);
1366 break;
1368 case TIOCGRS485:
1369 if (copy_to_user((struct serial_rs485 *) arg,
1370 &(to_atmel_uart_port(port)->rs485),
1371 sizeof(rs485conf)))
1372 return -EFAULT;
1373 break;
1375 default:
1376 return -ENOIOCTLCMD;
1378 return 0;
1383 static struct uart_ops atmel_pops = {
1384 .tx_empty = atmel_tx_empty,
1385 .set_mctrl = atmel_set_mctrl,
1386 .get_mctrl = atmel_get_mctrl,
1387 .stop_tx = atmel_stop_tx,
1388 .start_tx = atmel_start_tx,
1389 .stop_rx = atmel_stop_rx,
1390 .enable_ms = atmel_enable_ms,
1391 .break_ctl = atmel_break_ctl,
1392 .startup = atmel_startup,
1393 .shutdown = atmel_shutdown,
1394 .flush_buffer = atmel_flush_buffer,
1395 .set_termios = atmel_set_termios,
1396 .set_ldisc = atmel_set_ldisc,
1397 .type = atmel_type,
1398 .release_port = atmel_release_port,
1399 .request_port = atmel_request_port,
1400 .config_port = atmel_config_port,
1401 .verify_port = atmel_verify_port,
1402 .pm = atmel_serial_pm,
1403 .ioctl = atmel_ioctl,
1404 #ifdef CONFIG_CONSOLE_POLL
1405 .poll_get_char = atmel_poll_get_char,
1406 .poll_put_char = atmel_poll_put_char,
1407 #endif
1411 * Configure the port from the platform device resource info.
1413 static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port,
1414 struct platform_device *pdev)
1416 struct uart_port *port = &atmel_port->uart;
1417 struct atmel_uart_data *data = pdev->dev.platform_data;
1419 port->iotype = UPIO_MEM;
1420 port->flags = UPF_BOOT_AUTOCONF;
1421 port->ops = &atmel_pops;
1422 port->fifosize = 1;
1423 port->line = data->num;
1424 port->dev = &pdev->dev;
1425 port->mapbase = pdev->resource[0].start;
1426 port->irq = pdev->resource[1].start;
1428 tasklet_init(&atmel_port->tasklet, atmel_tasklet_func,
1429 (unsigned long)port);
1431 memset(&atmel_port->rx_ring, 0, sizeof(atmel_port->rx_ring));
1433 if (data->regs)
1434 /* Already mapped by setup code */
1435 port->membase = data->regs;
1436 else {
1437 port->flags |= UPF_IOREMAP;
1438 port->membase = NULL;
1441 /* for console, the clock could already be configured */
1442 if (!atmel_port->clk) {
1443 atmel_port->clk = clk_get(&pdev->dev, "usart");
1444 clk_enable(atmel_port->clk);
1445 port->uartclk = clk_get_rate(atmel_port->clk);
1446 clk_disable(atmel_port->clk);
1447 /* only enable clock when USART is in use */
1450 atmel_port->use_dma_rx = data->use_dma_rx;
1451 atmel_port->use_dma_tx = data->use_dma_tx;
1452 atmel_port->rs485 = data->rs485;
1453 /* Use TXEMPTY for interrupt when rs485 else TXRDY or ENDTX|TXBUFE */
1454 if (atmel_port->rs485.flags & SER_RS485_ENABLED)
1455 atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
1456 else if (atmel_use_dma_tx(port)) {
1457 port->fifosize = PDC_BUFFER_SIZE;
1458 atmel_port->tx_done_mask = ATMEL_US_ENDTX | ATMEL_US_TXBUFE;
1459 } else {
1460 atmel_port->tx_done_mask = ATMEL_US_TXRDY;
1465 * Register board-specific modem-control line handlers.
1467 void __init atmel_register_uart_fns(struct atmel_port_fns *fns)
1469 if (fns->enable_ms)
1470 atmel_pops.enable_ms = fns->enable_ms;
1471 if (fns->get_mctrl)
1472 atmel_pops.get_mctrl = fns->get_mctrl;
1473 if (fns->set_mctrl)
1474 atmel_pops.set_mctrl = fns->set_mctrl;
1475 atmel_open_hook = fns->open;
1476 atmel_close_hook = fns->close;
1477 atmel_pops.pm = fns->pm;
1478 atmel_pops.set_wake = fns->set_wake;
1481 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
1482 static void atmel_console_putchar(struct uart_port *port, int ch)
1484 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
1485 cpu_relax();
1486 UART_PUT_CHAR(port, ch);
1490 * Interrupts are disabled on entering
1492 static void atmel_console_write(struct console *co, const char *s, u_int count)
1494 struct uart_port *port = &atmel_ports[co->index].uart;
1495 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1496 unsigned int status, imr;
1497 unsigned int pdc_tx;
1500 * First, save IMR and then disable interrupts
1502 imr = UART_GET_IMR(port);
1503 UART_PUT_IDR(port, ATMEL_US_RXRDY | atmel_port->tx_done_mask);
1505 /* Store PDC transmit status and disable it */
1506 pdc_tx = UART_GET_PTSR(port) & ATMEL_PDC_TXTEN;
1507 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
1509 uart_console_write(port, s, count, atmel_console_putchar);
1512 * Finally, wait for transmitter to become empty
1513 * and restore IMR
1515 do {
1516 status = UART_GET_CSR(port);
1517 } while (!(status & ATMEL_US_TXRDY));
1519 /* Restore PDC transmit status */
1520 if (pdc_tx)
1521 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
1523 /* set interrupts back the way they were */
1524 UART_PUT_IER(port, imr);
1528 * If the port was already initialised (eg, by a boot loader),
1529 * try to determine the current setup.
1531 static void __init atmel_console_get_options(struct uart_port *port, int *baud,
1532 int *parity, int *bits)
1534 unsigned int mr, quot;
1537 * If the baud rate generator isn't running, the port wasn't
1538 * initialized by the boot loader.
1540 quot = UART_GET_BRGR(port) & ATMEL_US_CD;
1541 if (!quot)
1542 return;
1544 mr = UART_GET_MR(port) & ATMEL_US_CHRL;
1545 if (mr == ATMEL_US_CHRL_8)
1546 *bits = 8;
1547 else
1548 *bits = 7;
1550 mr = UART_GET_MR(port) & ATMEL_US_PAR;
1551 if (mr == ATMEL_US_PAR_EVEN)
1552 *parity = 'e';
1553 else if (mr == ATMEL_US_PAR_ODD)
1554 *parity = 'o';
1557 * The serial core only rounds down when matching this to a
1558 * supported baud rate. Make sure we don't end up slightly
1559 * lower than one of those, as it would make us fall through
1560 * to a much lower baud rate than we really want.
1562 *baud = port->uartclk / (16 * (quot - 1));
1565 static int __init atmel_console_setup(struct console *co, char *options)
1567 struct uart_port *port = &atmel_ports[co->index].uart;
1568 int baud = 115200;
1569 int bits = 8;
1570 int parity = 'n';
1571 int flow = 'n';
1573 if (port->membase == NULL) {
1574 /* Port not initialized yet - delay setup */
1575 return -ENODEV;
1578 clk_enable(atmel_ports[co->index].clk);
1580 UART_PUT_IDR(port, -1);
1581 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
1582 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
1584 if (options)
1585 uart_parse_options(options, &baud, &parity, &bits, &flow);
1586 else
1587 atmel_console_get_options(port, &baud, &parity, &bits);
1589 return uart_set_options(port, co, baud, parity, bits, flow);
1592 static struct uart_driver atmel_uart;
1594 static struct console atmel_console = {
1595 .name = ATMEL_DEVICENAME,
1596 .write = atmel_console_write,
1597 .device = uart_console_device,
1598 .setup = atmel_console_setup,
1599 .flags = CON_PRINTBUFFER,
1600 .index = -1,
1601 .data = &atmel_uart,
1604 #define ATMEL_CONSOLE_DEVICE (&atmel_console)
1607 * Early console initialization (before VM subsystem initialized).
1609 static int __init atmel_console_init(void)
1611 if (atmel_default_console_device) {
1612 add_preferred_console(ATMEL_DEVICENAME,
1613 atmel_default_console_device->id, NULL);
1614 atmel_init_port(&atmel_ports[atmel_default_console_device->id],
1615 atmel_default_console_device);
1616 register_console(&atmel_console);
1619 return 0;
1622 console_initcall(atmel_console_init);
1625 * Late console initialization.
1627 static int __init atmel_late_console_init(void)
1629 if (atmel_default_console_device
1630 && !(atmel_console.flags & CON_ENABLED))
1631 register_console(&atmel_console);
1633 return 0;
1636 core_initcall(atmel_late_console_init);
1638 static inline bool atmel_is_console_port(struct uart_port *port)
1640 return port->cons && port->cons->index == port->line;
1643 #else
1644 #define ATMEL_CONSOLE_DEVICE NULL
1646 static inline bool atmel_is_console_port(struct uart_port *port)
1648 return false;
1650 #endif
1652 static struct uart_driver atmel_uart = {
1653 .owner = THIS_MODULE,
1654 .driver_name = "atmel_serial",
1655 .dev_name = ATMEL_DEVICENAME,
1656 .major = SERIAL_ATMEL_MAJOR,
1657 .minor = MINOR_START,
1658 .nr = ATMEL_MAX_UART,
1659 .cons = ATMEL_CONSOLE_DEVICE,
1662 #ifdef CONFIG_PM
1663 static bool atmel_serial_clk_will_stop(void)
1665 #ifdef CONFIG_ARCH_AT91
1666 return at91_suspend_entering_slow_clock();
1667 #else
1668 return false;
1669 #endif
1672 static int atmel_serial_suspend(struct platform_device *pdev,
1673 pm_message_t state)
1675 struct uart_port *port = platform_get_drvdata(pdev);
1676 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1678 if (atmel_is_console_port(port) && console_suspend_enabled) {
1679 /* Drain the TX shifter */
1680 while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY))
1681 cpu_relax();
1684 /* we can not wake up if we're running on slow clock */
1685 atmel_port->may_wakeup = device_may_wakeup(&pdev->dev);
1686 if (atmel_serial_clk_will_stop())
1687 device_set_wakeup_enable(&pdev->dev, 0);
1689 uart_suspend_port(&atmel_uart, port);
1691 return 0;
1694 static int atmel_serial_resume(struct platform_device *pdev)
1696 struct uart_port *port = platform_get_drvdata(pdev);
1697 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1699 uart_resume_port(&atmel_uart, port);
1700 device_set_wakeup_enable(&pdev->dev, atmel_port->may_wakeup);
1702 return 0;
1704 #else
1705 #define atmel_serial_suspend NULL
1706 #define atmel_serial_resume NULL
1707 #endif
1709 static int __devinit atmel_serial_probe(struct platform_device *pdev)
1711 struct atmel_uart_port *port;
1712 struct atmel_uart_data *pdata = pdev->dev.platform_data;
1713 void *data;
1714 int ret;
1716 BUILD_BUG_ON(ATMEL_SERIAL_RINGSIZE & (ATMEL_SERIAL_RINGSIZE - 1));
1718 port = &atmel_ports[pdata->num];
1719 port->backup_imr = 0;
1721 atmel_init_port(port, pdev);
1723 if (!atmel_use_dma_rx(&port->uart)) {
1724 ret = -ENOMEM;
1725 data = kmalloc(sizeof(struct atmel_uart_char)
1726 * ATMEL_SERIAL_RINGSIZE, GFP_KERNEL);
1727 if (!data)
1728 goto err_alloc_ring;
1729 port->rx_ring.buf = data;
1732 ret = uart_add_one_port(&atmel_uart, &port->uart);
1733 if (ret)
1734 goto err_add_port;
1736 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
1737 if (atmel_is_console_port(&port->uart)
1738 && ATMEL_CONSOLE_DEVICE->flags & CON_ENABLED) {
1740 * The serial core enabled the clock for us, so undo
1741 * the clk_enable() in atmel_console_setup()
1743 clk_disable(port->clk);
1745 #endif
1747 device_init_wakeup(&pdev->dev, 1);
1748 platform_set_drvdata(pdev, port);
1750 if (port->rs485.flags & SER_RS485_ENABLED) {
1751 UART_PUT_MR(&port->uart, ATMEL_US_USMODE_NORMAL);
1752 UART_PUT_CR(&port->uart, ATMEL_US_RTSEN);
1755 return 0;
1757 err_add_port:
1758 kfree(port->rx_ring.buf);
1759 port->rx_ring.buf = NULL;
1760 err_alloc_ring:
1761 if (!atmel_is_console_port(&port->uart)) {
1762 clk_put(port->clk);
1763 port->clk = NULL;
1766 return ret;
1769 static int __devexit atmel_serial_remove(struct platform_device *pdev)
1771 struct uart_port *port = platform_get_drvdata(pdev);
1772 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1773 int ret = 0;
1775 device_init_wakeup(&pdev->dev, 0);
1776 platform_set_drvdata(pdev, NULL);
1778 ret = uart_remove_one_port(&atmel_uart, port);
1780 tasklet_kill(&atmel_port->tasklet);
1781 kfree(atmel_port->rx_ring.buf);
1783 /* "port" is allocated statically, so we shouldn't free it */
1785 clk_put(atmel_port->clk);
1787 return ret;
1790 static struct platform_driver atmel_serial_driver = {
1791 .probe = atmel_serial_probe,
1792 .remove = __devexit_p(atmel_serial_remove),
1793 .suspend = atmel_serial_suspend,
1794 .resume = atmel_serial_resume,
1795 .driver = {
1796 .name = "atmel_usart",
1797 .owner = THIS_MODULE,
1801 static int __init atmel_serial_init(void)
1803 int ret;
1805 ret = uart_register_driver(&atmel_uart);
1806 if (ret)
1807 return ret;
1809 ret = platform_driver_register(&atmel_serial_driver);
1810 if (ret)
1811 uart_unregister_driver(&atmel_uart);
1813 return ret;
1816 static void __exit atmel_serial_exit(void)
1818 platform_driver_unregister(&atmel_serial_driver);
1819 uart_unregister_driver(&atmel_uart);
1822 module_init(atmel_serial_init);
1823 module_exit(atmel_serial_exit);
1825 MODULE_AUTHOR("Rick Bronson");
1826 MODULE_DESCRIPTION("Atmel AT91 / AT32 serial port driver");
1827 MODULE_LICENSE("GPL");
1828 MODULE_ALIAS("platform:atmel_usart");