x86: cache_info: Kill the atomic allocation in amd_init_l3_cache()
[linux-2.6/linux-mips.git] / drivers / w1 / slaves / w1_ds2760.h
blob58e774141568eb11846fab47ae6e9c822993d673
1 /*
2 * 1-Wire implementation for the ds2760 chip
4 * Copyright © 2004-2005, Szabolcs Gyurko <szabolcs.gyurko@tlt.hu>
6 * Use consistent with the GNU GPL is permitted,
7 * provided that this copyright notice is
8 * preserved in its entirety in all copies and derived works.
12 #ifndef __w1_ds2760_h__
13 #define __w1_ds2760_h__
15 /* Known commands to the DS2760 chip */
16 #define W1_DS2760_SWAP 0xAA
17 #define W1_DS2760_READ_DATA 0x69
18 #define W1_DS2760_WRITE_DATA 0x6C
19 #define W1_DS2760_COPY_DATA 0x48
20 #define W1_DS2760_RECALL_DATA 0xB8
21 #define W1_DS2760_LOCK 0x6A
23 /* Number of valid register addresses */
24 #define DS2760_DATA_SIZE 0x40
26 #define DS2760_PROTECTION_REG 0x00
27 #define DS2760_STATUS_REG 0x01
28 #define DS2760_STATUS_IE (1 << 2)
29 #define DS2760_STATUS_SWEN (1 << 3)
30 #define DS2760_STATUS_RNAOP (1 << 4)
31 #define DS2760_STATUS_PMOD (1 << 5)
32 #define DS2760_EEPROM_REG 0x07
33 #define DS2760_SPECIAL_FEATURE_REG 0x08
34 #define DS2760_VOLTAGE_MSB 0x0c
35 #define DS2760_VOLTAGE_LSB 0x0d
36 #define DS2760_CURRENT_MSB 0x0e
37 #define DS2760_CURRENT_LSB 0x0f
38 #define DS2760_CURRENT_ACCUM_MSB 0x10
39 #define DS2760_CURRENT_ACCUM_LSB 0x11
40 #define DS2760_TEMP_MSB 0x18
41 #define DS2760_TEMP_LSB 0x19
42 #define DS2760_EEPROM_BLOCK0 0x20
43 #define DS2760_ACTIVE_FULL 0x20
44 #define DS2760_EEPROM_BLOCK1 0x30
45 #define DS2760_STATUS_WRITE_REG 0x31
46 #define DS2760_RATED_CAPACITY 0x32
47 #define DS2760_CURRENT_OFFSET_BIAS 0x33
48 #define DS2760_ACTIVE_EMPTY 0x3b
50 extern int w1_ds2760_read(struct device *dev, char *buf, int addr,
51 size_t count);
52 extern int w1_ds2760_write(struct device *dev, char *buf, int addr,
53 size_t count);
54 extern int w1_ds2760_store_eeprom(struct device *dev, int addr);
55 extern int w1_ds2760_recall_eeprom(struct device *dev, int addr);
57 #endif /* !__w1_ds2760_h__ */