vmxnet3: Fix inconsistent LRO state after initialization
[linux-2.6/linux-mips.git] / sound / soc / codecs / wm9713.h
blob793da863a03d94096aa130f5f88757ef5f23eb9c
1 /*
2 * wm9713.h -- WM9713 Soc Audio driver
3 */
5 #ifndef _WM9713_H
6 #define _WM9713_H
8 /* clock inputs */
9 #define WM9713_CLKA_PIN 0
10 #define WM9713_CLKB_PIN 1
12 /* clock divider ID's */
13 #define WM9713_PCMCLK_DIV 0
14 #define WM9713_CLKA_MULT 1
15 #define WM9713_CLKB_MULT 2
16 #define WM9713_HIFI_DIV 3
17 #define WM9713_PCMBCLK_DIV 4
18 #define WM9713_PCMCLK_PLL_DIV 5
19 #define WM9713_HIFI_PLL_DIV 6
21 /* Calculate the appropriate bit mask for the external PCM clock divider */
22 #define WM9713_PCMDIV(x) ((x - 1) << 8)
24 /* Calculate the appropriate bit mask for the external HiFi clock divider */
25 #define WM9713_HIFIDIV(x) ((x - 1) << 12)
27 /* MCLK clock mulitipliers */
28 #define WM9713_CLKA_X1 (0 << 1)
29 #define WM9713_CLKA_X2 (1 << 1)
30 #define WM9713_CLKB_X1 (0 << 2)
31 #define WM9713_CLKB_X2 (1 << 2)
33 /* MCLK clock MUX */
34 #define WM9713_CLK_MUX_A (0 << 0)
35 #define WM9713_CLK_MUX_B (1 << 0)
37 /* Voice DAI BCLK divider */
38 #define WM9713_PCMBCLK_DIV_1 (0 << 9)
39 #define WM9713_PCMBCLK_DIV_2 (1 << 9)
40 #define WM9713_PCMBCLK_DIV_4 (2 << 9)
41 #define WM9713_PCMBCLK_DIV_8 (3 << 9)
42 #define WM9713_PCMBCLK_DIV_16 (4 << 9)
44 #define WM9713_DAI_AC97_HIFI 0
45 #define WM9713_DAI_AC97_AUX 1
46 #define WM9713_DAI_PCM_VOICE 2
48 int wm9713_reset(struct snd_soc_codec *codec, int try_warm);
50 #endif