arch/arm/mach-davinci/devices-tnetv107x.c

   1 /*
   2  * Texas Instruments TNETV107X SoC devices
   3  *
   4  * Copyright (C) 2010 Texas Instruments
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation version 2.
   9  *
  10  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  11  * kind, whether express or implied; without even the implied warranty
  12  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15 #include <linux/kernel.h>
  16 #include <linux/init.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/dma-mapping.h>
  19 #include <linux/clk.h>
  20 #include <linux/slab.h>
  21
  22 #include <mach/common.h>
  23 #include <mach/irqs.h>
  24 #include <mach/edma.h>
  25 #include <mach/tnetv107x.h>
  26
  27 #include "clock.h"
  28
  29 /* Base addresses for on-chip devices */
  30 #define TNETV107X_TPCC_BASE                     0x01c00000
  31 #define TNETV107X_TPTC0_BASE                    0x01c10000
  32 #define TNETV107X_TPTC1_BASE                    0x01c10400
  33 #define TNETV107X_WDOG_BASE                     0x08086700
  34 #define TNETV107X_TSC_BASE                      0x08088500
  35 #define TNETV107X_SDIO0_BASE                    0x08088700
  36 #define TNETV107X_SDIO1_BASE                    0x08088800
  37 #define TNETV107X_KEYPAD_BASE                   0x08088a00
  38 #define TNETV107X_SSP_BASE                      0x08088c00
  39 #define TNETV107X_ASYNC_EMIF_CNTRL_BASE         0x08200000
  40 #define TNETV107X_ASYNC_EMIF_DATA_CE0_BASE      0x30000000
  41 #define TNETV107X_ASYNC_EMIF_DATA_CE1_BASE      0x40000000
  42 #define TNETV107X_ASYNC_EMIF_DATA_CE2_BASE      0x44000000
  43 #define TNETV107X_ASYNC_EMIF_DATA_CE3_BASE      0x48000000
  44
  45 /* TNETV107X specific EDMA3 information */
  46 #define EDMA_TNETV107X_NUM_DMACH        64
  47 #define EDMA_TNETV107X_NUM_TCC          64
  48 #define EDMA_TNETV107X_NUM_PARAMENTRY   128
  49 #define EDMA_TNETV107X_NUM_EVQUE        2
  50 #define EDMA_TNETV107X_NUM_TC           2
  51 #define EDMA_TNETV107X_CHMAP_EXIST      0
  52 #define EDMA_TNETV107X_NUM_REGIONS      4
  53 #define TNETV107X_DMACH2EVENT_MAP0      0x3C0CE000u
  54 #define TNETV107X_DMACH2EVENT_MAP1      0x000FFFFFu
  55
  56 #define TNETV107X_DMACH_SDIO0_RX                26
  57 #define TNETV107X_DMACH_SDIO0_TX                27
  58 #define TNETV107X_DMACH_SDIO1_RX                28
  59 #define TNETV107X_DMACH_SDIO1_TX                29
  60
  61 static const s8 edma_tc_mapping[][2] = {
  62         /* event queue no       TC no   */
  63         {        0,              0      },
  64         {        1,              1      },
  65         {       -1,             -1      }
  66 };
  67
  68 static const s8 edma_priority_mapping[][2] = {
  69         /* event queue no       Prio    */
  70         {        0,              3      },
  71         {        1,              7      },
  72         {       -1,             -1      }
  73 };
  74
  75 static struct edma_soc_info edma_cc0_info = {
  76         .n_channel              = EDMA_TNETV107X_NUM_DMACH,
  77         .n_region               = EDMA_TNETV107X_NUM_REGIONS,
  78         .n_slot                 = EDMA_TNETV107X_NUM_PARAMENTRY,
  79         .n_tc                   = EDMA_TNETV107X_NUM_TC,
  80         .n_cc                   = 1,
  81         .queue_tc_mapping       = edma_tc_mapping,
  82         .queue_priority_mapping = edma_priority_mapping,
  83 };
  84
  85 static struct edma_soc_info *tnetv107x_edma_info[EDMA_MAX_CC] = {
  86         &edma_cc0_info,
  87 };
  88
  89 static struct resource edma_resources[] = {
  90         {
  91                 .name   = "edma_cc0",
  92                 .start  = TNETV107X_TPCC_BASE,
  93                 .end    = TNETV107X_TPCC_BASE + SZ_32K - 1,
  94                 .flags  = IORESOURCE_MEM,
  95         },
  96         {
  97                 .name   = "edma_tc0",
  98                 .start  = TNETV107X_TPTC0_BASE,
  99                 .end    = TNETV107X_TPTC0_BASE + SZ_1K - 1,
 100                 .flags  = IORESOURCE_MEM,
 101         },
 102         {
 103                 .name   = "edma_tc1",
 104                 .start  = TNETV107X_TPTC1_BASE,
 105                 .end    = TNETV107X_TPTC1_BASE + SZ_1K - 1,
 106                 .flags  = IORESOURCE_MEM,
 107         },
 108         {
 109                 .name   = "edma0",
 110                 .start  = IRQ_TNETV107X_TPCC,
 111                 .flags  = IORESOURCE_IRQ,
 112         },
 113         {
 114                 .name   = "edma0_err",
 115                 .start  = IRQ_TNETV107X_TPCC_ERR,
 116                 .flags  = IORESOURCE_IRQ,
 117         },
 118 };
 119
 120 static struct platform_device edma_device = {
 121         .name           = "edma",
 122         .id             = -1,
 123         .num_resources  = ARRAY_SIZE(edma_resources),
 124         .resource       = edma_resources,
 125         .dev.platform_data = tnetv107x_edma_info,
 126 };
 127
 128 static struct plat_serial8250_port serial_data[] = {
 129         {
 130                 .mapbase        = TNETV107X_UART0_BASE,
 131                 .irq            = IRQ_TNETV107X_UART0,
 132                 .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
 133                                         UPF_FIXED_TYPE | UPF_IOREMAP,
 134                 .type           = PORT_AR7,
 135                 .iotype         = UPIO_MEM32,
 136                 .regshift       = 2,
 137         },
 138         {
 139                 .mapbase        = TNETV107X_UART1_BASE,
 140                 .irq            = IRQ_TNETV107X_UART1,
 141                 .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
 142                                         UPF_FIXED_TYPE | UPF_IOREMAP,
 143                 .type           = PORT_AR7,
 144                 .iotype         = UPIO_MEM32,
 145                 .regshift       = 2,
 146         },
 147         {
 148                 .mapbase        = TNETV107X_UART2_BASE,
 149                 .irq            = IRQ_TNETV107X_UART2,
 150                 .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
 151                                         UPF_FIXED_TYPE | UPF_IOREMAP,
 152                 .type           = PORT_AR7,
 153                 .iotype         = UPIO_MEM32,
 154                 .regshift       = 2,
 155         },
 156         {
 157                 .flags  = 0,
 158         },
 159 };
 160
 161 struct platform_device tnetv107x_serial_device = {
 162         .name                   = "serial8250",
 163         .id                     = PLAT8250_DEV_PLATFORM,
 164         .dev.platform_data      = serial_data,
 165 };
 166
 167 static struct resource mmc0_resources[] = {
 168         { /* Memory mapped registers */
 169                 .start  = TNETV107X_SDIO0_BASE,
 170                 .end    = TNETV107X_SDIO0_BASE + 0x0ff,
 171                 .flags  = IORESOURCE_MEM
 172         },
 173         { /* MMC interrupt */
 174                 .start  = IRQ_TNETV107X_MMC0,
 175                 .flags  = IORESOURCE_IRQ
 176         },
 177         { /* SDIO interrupt */
 178                 .start  = IRQ_TNETV107X_SDIO0,
 179                 .flags  = IORESOURCE_IRQ
 180         },
 181         { /* DMA RX */
 182                 .start  = EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO0_RX),
 183                 .flags  = IORESOURCE_DMA
 184         },
 185         { /* DMA TX */
 186                 .start  = EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO0_TX),
 187                 .flags  = IORESOURCE_DMA
 188         },
 189 };
 190
 191 static struct resource mmc1_resources[] = {
 192         { /* Memory mapped registers */
 193                 .start  = TNETV107X_SDIO1_BASE,
 194                 .end    = TNETV107X_SDIO1_BASE + 0x0ff,
 195                 .flags  = IORESOURCE_MEM
 196         },
 197         { /* MMC interrupt */
 198                 .start  = IRQ_TNETV107X_MMC1,
 199                 .flags  = IORESOURCE_IRQ
 200         },
 201         { /* SDIO interrupt */
 202                 .start  = IRQ_TNETV107X_SDIO1,
 203                 .flags  = IORESOURCE_IRQ
 204         },
 205         { /* DMA RX */
 206                 .start  = EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO1_RX),
 207                 .flags  = IORESOURCE_DMA
 208         },
 209         { /* DMA TX */
 210                 .start  = EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO1_TX),
 211                 .flags  = IORESOURCE_DMA
 212         },
 213 };
 214
 215 static u64 mmc0_dma_mask = DMA_BIT_MASK(32);
 216 static u64 mmc1_dma_mask = DMA_BIT_MASK(32);
 217
 218 static struct platform_device mmc_devices[2] = {
 219         {
 220                 .name           = "davinci_mmc",
 221                 .id             = 0,
 222                 .dev            = {
 223                         .dma_mask               = &mmc0_dma_mask,
 224                         .coherent_dma_mask      = DMA_BIT_MASK(32),
 225                 },
 226                 .num_resources  = ARRAY_SIZE(mmc0_resources),
 227                 .resource       = mmc0_resources
 228         },
 229         {
 230                 .name           = "davinci_mmc",
 231                 .id             = 1,
 232                 .dev            = {
 233                         .dma_mask               = &mmc1_dma_mask,
 234                         .coherent_dma_mask      = DMA_BIT_MASK(32),
 235                 },
 236                 .num_resources  = ARRAY_SIZE(mmc1_resources),
 237                 .resource       = mmc1_resources
 238         },
 239 };
 240
 241 static const u32 emif_windows[] = {
 242         TNETV107X_ASYNC_EMIF_DATA_CE0_BASE, TNETV107X_ASYNC_EMIF_DATA_CE1_BASE,
 243         TNETV107X_ASYNC_EMIF_DATA_CE2_BASE, TNETV107X_ASYNC_EMIF_DATA_CE3_BASE,
 244 };
 245
 246 static const u32 emif_window_sizes[] = { SZ_256M, SZ_64M, SZ_64M, SZ_64M };
 247
 248 static struct resource wdt_resources[] = {
 249         {
 250                 .start  = TNETV107X_WDOG_BASE,
 251                 .end    = TNETV107X_WDOG_BASE + SZ_4K - 1,
 252                 .flags  = IORESOURCE_MEM,
 253         },
 254 };
 255
 256 struct platform_device tnetv107x_wdt_device = {
 257         .name           = "tnetv107x_wdt",
 258         .id             = 0,
 259         .num_resources  = ARRAY_SIZE(wdt_resources),
 260         .resource       = wdt_resources,
 261 };
 262
 263 static int __init nand_init(int chipsel, struct davinci_nand_pdata *data)
 264 {
 265         struct resource res[2];
 266         struct platform_device *pdev;
 267         u32     range;
 268         int     ret;
 269
 270         /* Figure out the resource range from the ale/cle masks */
 271         range = max(data->mask_cle, data->mask_ale);
 272         range = PAGE_ALIGN(range + 4) - 1;
 273
 274         if (range >= emif_window_sizes[chipsel])
 275                 return -EINVAL;
 276
 277         pdev = kzalloc(sizeof(*pdev), GFP_KERNEL);
 278         if (!pdev)
 279                 return -ENOMEM;
 280
 281         pdev->name              = "davinci_nand";
 282         pdev->id                = chipsel;
 283         pdev->dev.platform_data = data;
 284
 285         memset(res, 0, sizeof(res));
 286
 287         res[0].start    = emif_windows[chipsel];
 288         res[0].end      = res[0].start + range;
 289         res[0].flags    = IORESOURCE_MEM;
 290
 291         res[1].start    = TNETV107X_ASYNC_EMIF_CNTRL_BASE;
 292         res[1].end      = res[1].start + SZ_4K - 1;
 293         res[1].flags    = IORESOURCE_MEM;
 294
 295         ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));
 296         if (ret < 0) {
 297                 kfree(pdev);
 298                 return ret;
 299         }
 300
 301         return platform_device_register(pdev);
 302 }
 303
 304 static struct resource keypad_resources[] = {
 305         {
 306                 .start  = TNETV107X_KEYPAD_BASE,
 307                 .end    = TNETV107X_KEYPAD_BASE + 0xff,
 308                 .flags  = IORESOURCE_MEM,
 309         },
 310         {
 311                 .start  = IRQ_TNETV107X_KEYPAD,
 312                 .flags  = IORESOURCE_IRQ,
 313                 .name   = "press",
 314         },
 315         {
 316                 .start  = IRQ_TNETV107X_KEYPAD_FREE,
 317                 .flags  = IORESOURCE_IRQ,
 318                 .name   = "release",
 319         },
 320 };
 321
 322 static struct platform_device keypad_device = {
 323         .name           = "tnetv107x-keypad",
 324         .num_resources  = ARRAY_SIZE(keypad_resources),
 325         .resource       = keypad_resources,
 326 };
 327
 328 static struct resource tsc_resources[] = {
 329         {
 330                 .start  = TNETV107X_TSC_BASE,
 331                 .end    = TNETV107X_TSC_BASE + 0xff,
 332                 .flags  = IORESOURCE_MEM,
 333         },
 334         {
 335                 .start  = IRQ_TNETV107X_TSC,
 336                 .flags  = IORESOURCE_IRQ,
 337         },
 338 };
 339
 340 static struct platform_device tsc_device = {
 341         .name           = "tnetv107x-ts",
 342         .num_resources  = ARRAY_SIZE(tsc_resources),
 343         .resource       = tsc_resources,
 344 };
 345
 346 static struct resource ssp_resources[] = {
 347         {
 348                 .start  = TNETV107X_SSP_BASE,
 349                 .end    = TNETV107X_SSP_BASE + 0x1ff,
 350                 .flags  = IORESOURCE_MEM,
 351         },
 352         {
 353                 .start  = IRQ_TNETV107X_SSP,
 354                 .flags  = IORESOURCE_IRQ,
 355         },
 356 };
 357
 358 static struct platform_device ssp_device = {
 359         .name           = "ti-ssp",
 360         .id             = -1,
 361         .num_resources  = ARRAY_SIZE(ssp_resources),
 362         .resource       = ssp_resources,
 363 };
 364
 365 void __init tnetv107x_devices_init(struct tnetv107x_device_info *info)
 366 {
 367         int i, error;
 368         struct clk *tsc_clk;
 369
 370         /*
 371          * The reset defaults for tnetv107x tsc clock divider is set too high.
 372          * This forces the clock down to a range that allows the ADC to
 373          * complete sample conversion in time.
 374          */
 375         tsc_clk = clk_get(NULL, "sys_tsc_clk");
 376         if (tsc_clk) {
 377                 error = clk_set_rate(tsc_clk, 5000000);
 378                 WARN_ON(error < 0);
 379                 clk_put(tsc_clk);
 380         }
 381
 382         platform_device_register(&edma_device);
 383         platform_device_register(&tnetv107x_wdt_device);
 384         platform_device_register(&tsc_device);
 385
 386         if (info->serial_config)
 387                 davinci_serial_init(info->serial_config);
 388
 389         for (i = 0; i < 2; i++)
 390                 if (info->mmc_config[i]) {
 391                         mmc_devices[i].dev.platform_data = info->mmc_config[i];
 392                         platform_device_register(&mmc_devices[i]);
 393                 }
 394
 395         for (i = 0; i < 4; i++)
 396                 if (info->nand_config[i])
 397                         nand_init(i, info->nand_config[i]);
 398
 399         if (info->keypad_config) {
 400                 keypad_device.dev.platform_data = info->keypad_config;
 401                 platform_device_register(&keypad_device);
 402         }
 403
 404         if (info->ssp_config) {
 405                 ssp_device.dev.platform_data = info->ssp_config;
 406                 platform_device_register(&ssp_device);
 407         }
 408 }