tools, slub: Fix off-by-one buffer corruption after readlink() call
[linux-2.6/linux-mips.git] / arch / arm / mach-s3c64xx / s3c6410.c
blob312aa6b115e8ee84a170f965d6a4b1f27e557407
1 /* linux/arch/arm/mach-s3c64xx/s3c6410.c
3 * Copyright 2008 Simtec Electronics
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/interrupt.h>
16 #include <linux/list.h>
17 #include <linux/timer.h>
18 #include <linux/init.h>
19 #include <linux/clk.h>
20 #include <linux/io.h>
21 #include <linux/sysdev.h>
22 #include <linux/serial_core.h>
23 #include <linux/platform_device.h>
25 #include <asm/mach/arch.h>
26 #include <asm/mach/map.h>
27 #include <asm/mach/irq.h>
29 #include <mach/hardware.h>
30 #include <asm/irq.h>
32 #include <plat/cpu-freq.h>
33 #include <plat/regs-serial.h>
34 #include <mach/regs-clock.h>
36 #include <plat/cpu.h>
37 #include <plat/devs.h>
38 #include <plat/clock.h>
39 #include <plat/sdhci.h>
40 #include <plat/ata-core.h>
41 #include <plat/adc-core.h>
42 #include <plat/iic-core.h>
43 #include <plat/onenand-core.h>
44 #include <mach/s3c6400.h>
45 #include <mach/s3c6410.h>
47 void __init s3c6410_map_io(void)
49 /* initialise device information early */
50 s3c6410_default_sdhci0();
51 s3c6410_default_sdhci1();
52 s3c6410_default_sdhci2();
54 /* the i2c devices are directly compatible with s3c2440 */
55 s3c_i2c0_setname("s3c2440-i2c");
56 s3c_i2c1_setname("s3c2440-i2c");
58 s3c_adc_setname("s3c64xx-adc");
59 s3c_device_nand.name = "s3c6400-nand";
60 s3c_onenand_setname("s3c6410-onenand");
61 s3c64xx_onenand1_setname("s3c6410-onenand");
62 s3c_cfcon_setname("s3c64xx-pata");
65 void __init s3c6410_init_clocks(int xtal)
67 printk(KERN_DEBUG "%s: initialising clocks\n", __func__);
68 s3c64xx_register_clocks(xtal, S3C6410_CLKDIV0_ARM_MASK);
69 s3c6400_setup_clocks();
72 void __init s3c6410_init_irq(void)
74 /* VIC0 is missing IRQ7, VIC1 is fully populated. */
75 s3c64xx_init_irq(~0 & ~(1 << 7), ~0);
78 struct sysdev_class s3c6410_sysclass = {
79 .name = "s3c6410-core",
82 static struct sys_device s3c6410_sysdev = {
83 .cls = &s3c6410_sysclass,
86 static int __init s3c6410_core_init(void)
88 return sysdev_class_register(&s3c6410_sysclass);
91 core_initcall(s3c6410_core_init);
93 int __init s3c6410_init(void)
95 printk("S3C6410: Initialising architecture\n");
97 return sysdev_register(&s3c6410_sysdev);