[MIPS] Fix another trap decoding issue
[linux-2.6/linux-mips/linux-dm7025.git] / include / asm-sparc64 / tlbflush.h
blobfbb675dbe0c92abe8bead2c0a46c58451fa4d0e1
1 #ifndef _SPARC64_TLBFLUSH_H
2 #define _SPARC64_TLBFLUSH_H
4 #include <linux/mm.h>
5 #include <asm/mmu_context.h>
7 /* TSB flush operations. */
8 struct mmu_gather;
9 extern void flush_tsb_kernel_range(unsigned long start, unsigned long end);
10 extern void flush_tsb_user(struct mmu_gather *mp);
12 /* TLB flush operations. */
14 extern void flush_tlb_pending(void);
16 #define flush_tlb_range(vma,start,end) \
17 do { (void)(start); flush_tlb_pending(); } while (0)
18 #define flush_tlb_page(vma,addr) flush_tlb_pending()
19 #define flush_tlb_mm(mm) flush_tlb_pending()
21 /* Local cpu only. */
22 extern void __flush_tlb_all(void);
24 extern void __flush_tlb_kernel_range(unsigned long start, unsigned long end);
26 #ifndef CONFIG_SMP
28 #define flush_tlb_kernel_range(start,end) \
29 do { flush_tsb_kernel_range(start,end); \
30 __flush_tlb_kernel_range(start,end); \
31 } while (0)
33 #else /* CONFIG_SMP */
35 extern void smp_flush_tlb_kernel_range(unsigned long start, unsigned long end);
37 #define flush_tlb_kernel_range(start, end) \
38 do { flush_tsb_kernel_range(start,end); \
39 smp_flush_tlb_kernel_range(start, end); \
40 } while (0)
42 #endif /* ! CONFIG_SMP */
44 #endif /* _SPARC64_TLBFLUSH_H */