[MIPS] Fix another trap decoding issue
[linux-2.6/linux-mips/linux-dm7025.git] / include / asm-x86 / pci_64.h
blobdf867e5d80b197a220c8cd84967a8adf9b6c88db
1 #ifndef __x8664_PCI_H
2 #define __x8664_PCI_H
4 #ifdef __KERNEL__
6 #ifdef CONFIG_CALGARY_IOMMU
7 static inline void *pci_iommu(struct pci_bus *bus)
9 struct pci_sysdata *sd = bus->sysdata;
10 return sd->iommu;
13 static inline void set_pci_iommu(struct pci_bus *bus, void *val)
15 struct pci_sysdata *sd = bus->sysdata;
16 sd->iommu = val;
18 #endif /* CONFIG_CALGARY_IOMMU */
20 extern int (*pci_config_read)(int seg, int bus, int dev, int fn,
21 int reg, int len, u32 *value);
22 extern int (*pci_config_write)(int seg, int bus, int dev, int fn,
23 int reg, int len, u32 value);
25 extern void pci_iommu_alloc(void);
27 /* The PCI address space does equal the physical memory
28 * address space. The networking and block device layers use
29 * this boolean for bounce buffer decisions
31 * On AMD64 it mostly equals, but we set it to zero if a hardware
32 * IOMMU (gart) of sotware IOMMU (swiotlb) is available.
34 #define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys)
36 #if defined(CONFIG_GART_IOMMU) || defined(CONFIG_CALGARY_IOMMU)
38 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
39 dma_addr_t ADDR_NAME;
40 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
41 __u32 LEN_NAME;
42 #define pci_unmap_addr(PTR, ADDR_NAME) \
43 ((PTR)->ADDR_NAME)
44 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
45 (((PTR)->ADDR_NAME) = (VAL))
46 #define pci_unmap_len(PTR, LEN_NAME) \
47 ((PTR)->LEN_NAME)
48 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
49 (((PTR)->LEN_NAME) = (VAL))
51 #else
52 /* No IOMMU */
54 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
55 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
56 #define pci_unmap_addr(PTR, ADDR_NAME) (0)
57 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
58 #define pci_unmap_len(PTR, LEN_NAME) (0)
59 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
61 #endif
63 #endif /* __KERNEL__ */
65 #endif /* __x8664_PCI_H */