include/asm-x86/pgtable_32.h

   1 #ifndef _I386_PGTABLE_H
   2 #define _I386_PGTABLE_H
   3
   4
   5 /*
   6  * The Linux memory management assumes a three-level page table setup. On
   7  * the i386, we use that, but "fold" the mid level into the top-level page
   8  * table, so that we physically have the same two-level page table as the
   9  * i386 mmu expects.
  10  *
  11  * This file contains the functions and defines necessary to modify and use
  12  * the i386 page table tree.
  13  */
  14 #ifndef __ASSEMBLY__
  15 #include <asm/processor.h>
  16 #include <asm/fixmap.h>
  17 #include <linux/threads.h>
  18 #include <asm/paravirt.h>
  19
  20 #include <linux/bitops.h>
  21 #include <linux/slab.h>
  22 #include <linux/list.h>
  23 #include <linux/spinlock.h>
  24
  25 struct mm_struct;
  26 struct vm_area_struct;
  27
  28 extern pgd_t swapper_pg_dir[1024];
  29
  30 static inline void pgtable_cache_init(void) { }
  31 static inline void check_pgt_cache(void) { }
  32 void paging_init(void);
  33
  34
  35 /*
  36  * The Linux x86 paging architecture is 'compile-time dual-mode', it
  37  * implements both the traditional 2-level x86 page tables and the
  38  * newer 3-level PAE-mode page tables.
  39  */
  40 #ifdef CONFIG_X86_PAE
  41 # include <asm/pgtable-3level-defs.h>
  42 # define PMD_SIZE       (1UL << PMD_SHIFT)
  43 # define PMD_MASK       (~(PMD_SIZE - 1))
  44 #else
  45 # include <asm/pgtable-2level-defs.h>
  46 #endif
  47
  48 #define PGDIR_SIZE      (1UL << PGDIR_SHIFT)
  49 #define PGDIR_MASK      (~(PGDIR_SIZE - 1))
  50
  51 #define USER_PGD_PTRS (PAGE_OFFSET >> PGDIR_SHIFT)
  52 #define KERNEL_PGD_PTRS (PTRS_PER_PGD-USER_PGD_PTRS)
  53
  54 /* Just any arbitrary offset to the start of the vmalloc VM area: the
  55  * current 8MB value just means that there will be a 8MB "hole" after the
  56  * physical memory until the kernel virtual memory starts.  That means that
  57  * any out-of-bounds memory accesses will hopefully be caught.
  58  * The vmalloc() routines leaves a hole of 4kB between each vmalloced
  59  * area for the same reason. ;)
  60  */
  61 #define VMALLOC_OFFSET  (8 * 1024 * 1024)
  62 #define VMALLOC_START   (((unsigned long)high_memory + 2 * VMALLOC_OFFSET - 1) \
  63                          & ~(VMALLOC_OFFSET - 1))
  64 #ifdef CONFIG_X86_PAE
  65 #define LAST_PKMAP 512
  66 #else
  67 #define LAST_PKMAP 1024
  68 #endif
  69
  70 #define PKMAP_BASE ((FIXADDR_BOOT_START - PAGE_SIZE * (LAST_PKMAP + 1)) \
  71                     & PMD_MASK)
  72
  73 #ifdef CONFIG_HIGHMEM
  74 # define VMALLOC_END    (PKMAP_BASE - 2 * PAGE_SIZE)
  75 #else
  76 # define VMALLOC_END    (FIXADDR_START - 2 * PAGE_SIZE)
  77 #endif
  78
  79 /*
  80  * Define this if things work differently on an i386 and an i486:
  81  * it will (on an i486) warn about kernel memory accesses that are
  82  * done without a 'access_ok(VERIFY_WRITE,..)'
  83  */
  84 #undef TEST_ACCESS_OK
  85
  86 /* The boot page tables (all created as a single array) */
  87 extern unsigned long pg0[];
  88
  89 #define pte_present(x)  ((x).pte_low & (_PAGE_PRESENT | _PAGE_PROTNONE))
  90
  91 /* To avoid harmful races, pmd_none(x) should check only the lower when PAE */
  92 #define pmd_none(x)     (!(unsigned long)pmd_val((x)))
  93 #define pmd_present(x)  (pmd_val((x)) & _PAGE_PRESENT)
  94
  95 extern int pmd_bad(pmd_t pmd);
  96
  97 #define pmd_bad_v1(x)                                                   \
  98         (_KERNPG_TABLE != (pmd_val((x)) & ~(PAGE_MASK | _PAGE_USER)))
  99 #define pmd_bad_v2(x)                                                   \
 100         (_KERNPG_TABLE != (pmd_val((x)) & ~(PAGE_MASK | _PAGE_USER |    \
 101                                             _PAGE_PSE | _PAGE_NX)))
 102
 103 #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
 104
 105 #ifdef CONFIG_X86_PAE
 106 # include <asm/pgtable-3level.h>
 107 #else
 108 # include <asm/pgtable-2level.h>
 109 #endif
 110
 111 /*
 112  * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
 113  *
 114  *  dst - pointer to pgd range anwhere on a pgd page
 115  *  src - ""
 116  *  count - the number of pgds to copy.
 117  *
 118  * dst and src can be on the same page, but the range must not overlap,
 119  * and must not cross a page boundary.
 120  */
 121 static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
 122 {
 123        memcpy(dst, src, count * sizeof(pgd_t));
 124 }
 125
 126 /*
 127  * Macro to mark a page protection value as "uncacheable".
 128  * On processors which do not support it, this is a no-op.
 129  */
 130 #define pgprot_noncached(prot)                                  \
 131         ((boot_cpu_data.x86 > 3)                                \
 132          ? (__pgprot(pgprot_val(prot) | _PAGE_PCD | _PAGE_PWT)) \
 133          : (prot))
 134
 135 /*
 136  * Conversion functions: convert a page and protection to a page entry,
 137  * and a page entry and page directory to the page they refer to.
 138  */
 139 #define mk_pte(page, pgprot)    pfn_pte(page_to_pfn(page), (pgprot))
 140
 141 /*
 142  * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
 143  *
 144  * this macro returns the index of the entry in the pgd page which would
 145  * control the given virtual address
 146  */
 147 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
 148 #define pgd_index_k(addr) pgd_index((addr))
 149
 150 /*
 151  * pgd_offset() returns a (pgd_t *)
 152  * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
 153  */
 154 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address)))
 155
 156 /*
 157  * a shortcut which implies the use of the kernel's pgd, instead
 158  * of a process's
 159  */
 160 #define pgd_offset_k(address) pgd_offset(&init_mm, (address))
 161
 162 static inline int pud_large(pud_t pud) { return 0; }
 163
 164 /*
 165  * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
 166  *
 167  * this macro returns the index of the entry in the pmd page which would
 168  * control the given virtual address
 169  */
 170 #define pmd_index(address)                              \
 171         (((address) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
 172
 173 /*
 174  * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
 175  *
 176  * this macro returns the index of the entry in the pte page which would
 177  * control the given virtual address
 178  */
 179 #define pte_index(address)                                      \
 180         (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
 181 #define pte_offset_kernel(dir, address)                         \
 182         ((pte_t *)pmd_page_vaddr(*(dir)) +  pte_index((address)))
 183
 184 #define pmd_page(pmd) (pfn_to_page(pmd_val((pmd)) >> PAGE_SHIFT))
 185
 186 #define pmd_page_vaddr(pmd)                                     \
 187         ((unsigned long)__va(pmd_val((pmd)) & PAGE_MASK))
 188
 189 #if defined(CONFIG_HIGHPTE)
 190 #define pte_offset_map(dir, address)                                    \
 191         ((pte_t *)kmap_atomic_pte(pmd_page(*(dir)), KM_PTE0) +          \
 192          pte_index((address)))
 193 #define pte_offset_map_nested(dir, address)                             \
 194         ((pte_t *)kmap_atomic_pte(pmd_page(*(dir)), KM_PTE1) +          \
 195          pte_index((address)))
 196 #define pte_unmap(pte) kunmap_atomic((pte), KM_PTE0)
 197 #define pte_unmap_nested(pte) kunmap_atomic((pte), KM_PTE1)
 198 #else
 199 #define pte_offset_map(dir, address)                                    \
 200         ((pte_t *)page_address(pmd_page(*(dir))) + pte_index((address)))
 201 #define pte_offset_map_nested(dir, address) pte_offset_map((dir), (address))
 202 #define pte_unmap(pte) do { } while (0)
 203 #define pte_unmap_nested(pte) do { } while (0)
 204 #endif
 205
 206 /* Clear a kernel PTE and flush it from the TLB */
 207 #define kpte_clear_flush(ptep, vaddr)           \
 208 do {                                            \
 209         pte_clear(&init_mm, (vaddr), (ptep));   \
 210         __flush_tlb_one((vaddr));               \
 211 } while (0)
 212
 213 /*
 214  * The i386 doesn't have any external MMU info: the kernel page
 215  * tables contain all the necessary information.
 216  */
 217 #define update_mmu_cache(vma, address, pte) do { } while (0)
 218
 219 void native_pagetable_setup_start(pgd_t *base);
 220 void native_pagetable_setup_done(pgd_t *base);
 221
 222 #ifndef CONFIG_PARAVIRT
 223 static inline void paravirt_pagetable_setup_start(pgd_t *base)
 224 {
 225         native_pagetable_setup_start(base);
 226 }
 227
 228 static inline void paravirt_pagetable_setup_done(pgd_t *base)
 229 {
 230         native_pagetable_setup_done(base);
 231 }
 232 #endif  /* !CONFIG_PARAVIRT */
 233
 234 #endif /* !__ASSEMBLY__ */
 235
 236 /*
 237  * kern_addr_valid() is (1) for FLATMEM and (0) for
 238  * SPARSEMEM and DISCONTIGMEM
 239  */
 240 #ifdef CONFIG_FLATMEM
 241 #define kern_addr_valid(addr)   (1)
 242 #else
 243 #define kern_addr_valid(kaddr)  (0)
 244 #endif
 245
 246 #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
 247         remap_pfn_range(vma, vaddr, pfn, size, prot)
 248
 249 #endif /* _I386_PGTABLE_H */