[MIPS] Fix handling of trap and breakpoint instructions
[linux-2.6/linux-mips/linux-dm7025.git] / include / asm-arm / arch-omap / sram.h
blobbb9bb3fd532f7c88e715db8fe4ddf48f4507844e
1 /*
2 * linux/include/asm-arm/arch-omap/sram.h
4 * Interface for functions that need to be run in internal SRAM
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
11 #ifndef __ARCH_ARM_OMAP_SRAM_H
12 #define __ARCH_ARM_OMAP_SRAM_H
14 extern void * omap_sram_push(void * start, unsigned long size);
15 extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl);
17 extern void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
18 u32 base_cs, u32 force_unlock);
19 extern void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
20 u32 mem_type);
21 extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
23 /* Do not use these */
24 extern void sram_reprogram_clock(u32 ckctl, u32 dpllctl);
25 extern unsigned long sram_reprogram_clock_sz;
27 extern void sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
28 u32 base_cs, u32 force_unlock);
29 extern unsigned long sram_ddr_init_sz;
31 extern u32 sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
32 extern unsigned long sram_set_prcm_sz;
34 extern void sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type);
35 extern unsigned long sram_reprogram_sdrc_sz;
37 #endif