[MIPS] Fix handling of trap and breakpoint instructions
[linux-2.6/linux-mips/linux-dm7025.git] / include / asm-arm / irqflags.h
blob6d09974e66462c6801d869dafbf7d3e54b9c45d7
1 #ifndef __ASM_ARM_IRQFLAGS_H
2 #define __ASM_ARM_IRQFLAGS_H
4 #ifdef __KERNEL__
6 #include <asm/ptrace.h>
8 /*
9 * CPU interrupt mask handling.
11 #if __LINUX_ARM_ARCH__ >= 6
13 #define raw_local_irq_save(x) \
14 ({ \
15 __asm__ __volatile__( \
16 "mrs %0, cpsr @ local_irq_save\n" \
17 "cpsid i" \
18 : "=r" (x) : : "memory", "cc"); \
21 #define raw_local_irq_enable() __asm__("cpsie i @ __sti" : : : "memory", "cc")
22 #define raw_local_irq_disable() __asm__("cpsid i @ __cli" : : : "memory", "cc")
23 #define local_fiq_enable() __asm__("cpsie f @ __stf" : : : "memory", "cc")
24 #define local_fiq_disable() __asm__("cpsid f @ __clf" : : : "memory", "cc")
26 #else
29 * Save the current interrupt enable state & disable IRQs
31 #define raw_local_irq_save(x) \
32 ({ \
33 unsigned long temp; \
34 (void) (&temp == &x); \
35 __asm__ __volatile__( \
36 "mrs %0, cpsr @ local_irq_save\n" \
37 " orr %1, %0, #128\n" \
38 " msr cpsr_c, %1" \
39 : "=r" (x), "=r" (temp) \
40 : \
41 : "memory", "cc"); \
45 * Enable IRQs
47 #define raw_local_irq_enable() \
48 ({ \
49 unsigned long temp; \
50 __asm__ __volatile__( \
51 "mrs %0, cpsr @ local_irq_enable\n" \
52 " bic %0, %0, #128\n" \
53 " msr cpsr_c, %0" \
54 : "=r" (temp) \
55 : \
56 : "memory", "cc"); \
60 * Disable IRQs
62 #define raw_local_irq_disable() \
63 ({ \
64 unsigned long temp; \
65 __asm__ __volatile__( \
66 "mrs %0, cpsr @ local_irq_disable\n" \
67 " orr %0, %0, #128\n" \
68 " msr cpsr_c, %0" \
69 : "=r" (temp) \
70 : \
71 : "memory", "cc"); \
75 * Enable FIQs
77 #define local_fiq_enable() \
78 ({ \
79 unsigned long temp; \
80 __asm__ __volatile__( \
81 "mrs %0, cpsr @ stf\n" \
82 " bic %0, %0, #64\n" \
83 " msr cpsr_c, %0" \
84 : "=r" (temp) \
85 : \
86 : "memory", "cc"); \
90 * Disable FIQs
92 #define local_fiq_disable() \
93 ({ \
94 unsigned long temp; \
95 __asm__ __volatile__( \
96 "mrs %0, cpsr @ clf\n" \
97 " orr %0, %0, #64\n" \
98 " msr cpsr_c, %0" \
99 : "=r" (temp) \
101 : "memory", "cc"); \
104 #endif
107 * Save the current interrupt enable state.
109 #define raw_local_save_flags(x) \
110 ({ \
111 __asm__ __volatile__( \
112 "mrs %0, cpsr @ local_save_flags" \
113 : "=r" (x) : : "memory", "cc"); \
117 * restore saved IRQ & FIQ state
119 #define raw_local_irq_restore(x) \
120 __asm__ __volatile__( \
121 "msr cpsr_c, %0 @ local_irq_restore\n" \
123 : "r" (x) \
124 : "memory", "cc")
126 #define raw_irqs_disabled_flags(flags) \
127 ({ \
128 (int)((flags) & PSR_I_BIT); \
131 #endif
132 #endif