[MIPS] Fix handling of trap and breakpoint instructions
[linux-2.6/linux-mips/linux-dm7025.git] / include / linux / serial_core.h
blob289942fc66553e0188c0ad70e4f6dc23be2922e1
1 /*
2 * linux/drivers/char/serial_core.h
4 * Copyright (C) 2000 Deep Blue Solutions Ltd.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #ifndef LINUX_SERIAL_CORE_H
21 #define LINUX_SERIAL_CORE_H
24 * The type definitions. These are from Ted Ts'o's serial.h
26 #define PORT_UNKNOWN 0
27 #define PORT_8250 1
28 #define PORT_16450 2
29 #define PORT_16550 3
30 #define PORT_16550A 4
31 #define PORT_CIRRUS 5
32 #define PORT_16650 6
33 #define PORT_16650V2 7
34 #define PORT_16750 8
35 #define PORT_STARTECH 9
36 #define PORT_16C950 10
37 #define PORT_16654 11
38 #define PORT_16850 12
39 #define PORT_RSA 13
40 #define PORT_NS16550A 14
41 #define PORT_XSCALE 15
42 #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */
43 #define PORT_MAX_8250 16 /* max port ID */
46 * ARM specific type numbers. These are not currently guaranteed
47 * to be implemented, and will change in the future. These are
48 * separate so any additions to the old serial.c that occur before
49 * we are merged can be easily merged here.
51 #define PORT_PXA 31
52 #define PORT_AMBA 32
53 #define PORT_CLPS711X 33
54 #define PORT_SA1100 34
55 #define PORT_UART00 35
56 #define PORT_21285 37
58 /* Sparc type numbers. */
59 #define PORT_SUNZILOG 38
60 #define PORT_SUNSAB 39
62 /* NEC v850. */
63 #define PORT_V850E_UART 40
65 /* DEC */
66 #define PORT_DZ 46
67 #define PORT_ZS 47
69 /* Parisc type numbers. */
70 #define PORT_MUX 48
72 /* Atmel AT91 / AT32 SoC */
73 #define PORT_ATMEL 49
75 /* Macintosh Zilog type numbers */
76 #define PORT_MAC_ZILOG 50 /* m68k : not yet implemented */
77 #define PORT_PMAC_ZILOG 51
79 /* SH-SCI */
80 #define PORT_SCI 52
81 #define PORT_SCIF 53
82 #define PORT_IRDA 54
84 /* Samsung S3C2410 SoC and derivatives thereof */
85 #define PORT_S3C2410 55
87 /* SGI IP22 aka Indy / Challenge S / Indigo 2 */
88 #define PORT_IP22ZILOG 56
90 /* Sharp LH7a40x -- an ARM9 SoC series */
91 #define PORT_LH7A40X 57
93 /* PPC CPM type number */
94 #define PORT_CPM 58
96 /* MPC52xx type numbers */
97 #define PORT_MPC52xx 59
99 /* IBM icom */
100 #define PORT_ICOM 60
102 /* Samsung S3C2440 SoC */
103 #define PORT_S3C2440 61
105 /* Motorola i.MX SoC */
106 #define PORT_IMX 62
108 /* Marvell MPSC */
109 #define PORT_MPSC 63
111 /* TXX9 type number */
112 #define PORT_TXX9 64
114 /* NEC VR4100 series SIU/DSIU */
115 #define PORT_VR41XX_SIU 65
116 #define PORT_VR41XX_DSIU 66
118 /* Samsung S3C2400 SoC */
119 #define PORT_S3C2400 67
121 /* M32R SIO */
122 #define PORT_M32R_SIO 68
124 /*Digi jsm */
125 #define PORT_JSM 69
127 #define PORT_PNX8XXX 70
129 /* Hilscher netx */
130 #define PORT_NETX 71
132 /* SUN4V Hypervisor Console */
133 #define PORT_SUNHV 72
135 #define PORT_S3C2412 73
137 /* Xilinx uartlite */
138 #define PORT_UARTLITE 74
140 /* Blackfin bf5xx */
141 #define PORT_BFIN 75
143 /* Micrel KS8695 */
144 #define PORT_KS8695 76
146 /* Broadcom SB1250, etc. SOC */
147 #define PORT_SB1250_DUART 77
149 /* Freescale ColdFire */
150 #define PORT_MCF 78
152 #define PORT_SC26XX 79
155 /* MN10300 on-chip UART numbers */
156 #define PORT_MN10300 80
157 #define PORT_MN10300_CTS 81
159 #ifdef __KERNEL__
161 #include <linux/compiler.h>
162 #include <linux/interrupt.h>
163 #include <linux/circ_buf.h>
164 #include <linux/spinlock.h>
165 #include <linux/sched.h>
166 #include <linux/tty.h>
167 #include <linux/mutex.h>
168 #include <linux/sysrq.h>
170 struct uart_port;
171 struct uart_info;
172 struct serial_struct;
173 struct device;
176 * This structure describes all the operations that can be
177 * done on the physical hardware.
179 struct uart_ops {
180 unsigned int (*tx_empty)(struct uart_port *);
181 void (*set_mctrl)(struct uart_port *, unsigned int mctrl);
182 unsigned int (*get_mctrl)(struct uart_port *);
183 void (*stop_tx)(struct uart_port *);
184 void (*start_tx)(struct uart_port *);
185 void (*send_xchar)(struct uart_port *, char ch);
186 void (*stop_rx)(struct uart_port *);
187 void (*enable_ms)(struct uart_port *);
188 void (*break_ctl)(struct uart_port *, int ctl);
189 int (*startup)(struct uart_port *);
190 void (*shutdown)(struct uart_port *);
191 void (*set_termios)(struct uart_port *, struct ktermios *new,
192 struct ktermios *old);
193 void (*pm)(struct uart_port *, unsigned int state,
194 unsigned int oldstate);
195 int (*set_wake)(struct uart_port *, unsigned int state);
198 * Return a string describing the type of the port
200 const char *(*type)(struct uart_port *);
203 * Release IO and memory resources used by the port.
204 * This includes iounmap if necessary.
206 void (*release_port)(struct uart_port *);
209 * Request IO and memory resources used by the port.
210 * This includes iomapping the port if necessary.
212 int (*request_port)(struct uart_port *);
213 void (*config_port)(struct uart_port *, int);
214 int (*verify_port)(struct uart_port *, struct serial_struct *);
215 int (*ioctl)(struct uart_port *, unsigned int, unsigned long);
218 #define UART_CONFIG_TYPE (1 << 0)
219 #define UART_CONFIG_IRQ (1 << 1)
221 struct uart_icount {
222 __u32 cts;
223 __u32 dsr;
224 __u32 rng;
225 __u32 dcd;
226 __u32 rx;
227 __u32 tx;
228 __u32 frame;
229 __u32 overrun;
230 __u32 parity;
231 __u32 brk;
232 __u32 buf_overrun;
235 typedef unsigned int __bitwise__ upf_t;
237 struct uart_port {
238 spinlock_t lock; /* port lock */
239 unsigned int iobase; /* in/out[bwl] */
240 unsigned char __iomem *membase; /* read/write[bwl] */
241 unsigned int irq; /* irq number */
242 unsigned int uartclk; /* base uart clock */
243 unsigned int fifosize; /* tx fifo size */
244 unsigned char x_char; /* xon/xoff char */
245 unsigned char regshift; /* reg offset shift */
246 unsigned char iotype; /* io access style */
247 unsigned char unused1;
249 #define UPIO_PORT (0)
250 #define UPIO_HUB6 (1)
251 #define UPIO_MEM (2)
252 #define UPIO_MEM32 (3)
253 #define UPIO_AU (4) /* Au1x00 type IO */
254 #define UPIO_TSI (5) /* Tsi108/109 type IO */
255 #define UPIO_DWAPB (6) /* DesignWare APB UART */
256 #define UPIO_RM9000 (7) /* RM9000 type IO */
258 unsigned int read_status_mask; /* driver specific */
259 unsigned int ignore_status_mask; /* driver specific */
260 struct uart_info *info; /* pointer to parent info */
261 struct uart_icount icount; /* statistics */
263 struct console *cons; /* struct console, if any */
264 #ifdef CONFIG_SERIAL_CORE_CONSOLE
265 unsigned long sysrq; /* sysrq timeout */
266 #endif
268 upf_t flags;
270 #define UPF_FOURPORT ((__force upf_t) (1 << 1))
271 #define UPF_SAK ((__force upf_t) (1 << 2))
272 #define UPF_SPD_MASK ((__force upf_t) (0x1030))
273 #define UPF_SPD_HI ((__force upf_t) (0x0010))
274 #define UPF_SPD_VHI ((__force upf_t) (0x0020))
275 #define UPF_SPD_CUST ((__force upf_t) (0x0030))
276 #define UPF_SPD_SHI ((__force upf_t) (0x1000))
277 #define UPF_SPD_WARP ((__force upf_t) (0x1010))
278 #define UPF_SKIP_TEST ((__force upf_t) (1 << 6))
279 #define UPF_AUTO_IRQ ((__force upf_t) (1 << 7))
280 #define UPF_HARDPPS_CD ((__force upf_t) (1 << 11))
281 #define UPF_LOW_LATENCY ((__force upf_t) (1 << 13))
282 #define UPF_BUGGY_UART ((__force upf_t) (1 << 14))
283 #define UPF_MAGIC_MULTIPLIER ((__force upf_t) (1 << 16))
284 #define UPF_CONS_FLOW ((__force upf_t) (1 << 23))
285 #define UPF_SHARE_IRQ ((__force upf_t) (1 << 24))
286 #define UPF_BOOT_AUTOCONF ((__force upf_t) (1 << 28))
287 #define UPF_FIXED_PORT ((__force upf_t) (1 << 29))
288 #define UPF_DEAD ((__force upf_t) (1 << 30))
289 #define UPF_IOREMAP ((__force upf_t) (1 << 31))
291 #define UPF_CHANGE_MASK ((__force upf_t) (0x17fff))
292 #define UPF_USR_MASK ((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY))
294 unsigned int mctrl; /* current modem ctrl settings */
295 unsigned int timeout; /* character-based timeout */
296 unsigned int type; /* port type */
297 const struct uart_ops *ops;
298 unsigned int custom_divisor;
299 unsigned int line; /* port index */
300 resource_size_t mapbase; /* for ioremap */
301 struct device *dev; /* parent device */
302 unsigned char hub6; /* this should be in the 8250 driver */
303 unsigned char suspended;
304 unsigned char unused[2];
305 void *private_data; /* generic platform data pointer */
309 * This is the state information which is persistent across opens.
310 * The low level driver must not to touch any elements contained
311 * within.
313 struct uart_state {
314 unsigned int close_delay; /* msec */
315 unsigned int closing_wait; /* msec */
317 #define USF_CLOSING_WAIT_INF (0)
318 #define USF_CLOSING_WAIT_NONE (~0U)
320 int count;
321 int pm_state;
322 struct uart_info *info;
323 struct uart_port *port;
325 struct mutex mutex;
328 #define UART_XMIT_SIZE PAGE_SIZE
330 typedef unsigned int __bitwise__ uif_t;
333 * This is the state information which is only valid when the port
334 * is open; it may be freed by the core driver once the device has
335 * been closed. Either the low level driver or the core can modify
336 * stuff here.
338 struct uart_info {
339 struct tty_struct *tty;
340 struct circ_buf xmit;
341 uif_t flags;
344 * Definitions for info->flags. These are _private_ to serial_core, and
345 * are specific to this structure. They may be queried by low level drivers.
347 #define UIF_CHECK_CD ((__force uif_t) (1 << 25))
348 #define UIF_CTS_FLOW ((__force uif_t) (1 << 26))
349 #define UIF_NORMAL_ACTIVE ((__force uif_t) (1 << 29))
350 #define UIF_INITIALIZED ((__force uif_t) (1 << 31))
351 #define UIF_SUSPENDED ((__force uif_t) (1 << 30))
353 int blocked_open;
355 struct tasklet_struct tlet;
357 wait_queue_head_t open_wait;
358 wait_queue_head_t delta_msr_wait;
361 /* number of characters left in xmit buffer before we ask for more */
362 #define WAKEUP_CHARS 256
364 struct module;
365 struct tty_driver;
367 struct uart_driver {
368 struct module *owner;
369 const char *driver_name;
370 const char *dev_name;
371 int major;
372 int minor;
373 int nr;
374 struct console *cons;
377 * these are private; the low level driver should not
378 * touch these; they should be initialised to NULL
380 struct uart_state *state;
381 struct tty_driver *tty_driver;
384 void uart_write_wakeup(struct uart_port *port);
387 * Baud rate helpers.
389 void uart_update_timeout(struct uart_port *port, unsigned int cflag,
390 unsigned int baud);
391 unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios,
392 struct ktermios *old, unsigned int min,
393 unsigned int max);
394 unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud);
397 * Console helpers.
399 struct uart_port *uart_get_console(struct uart_port *ports, int nr,
400 struct console *c);
401 void uart_parse_options(char *options, int *baud, int *parity, int *bits,
402 int *flow);
403 int uart_set_options(struct uart_port *port, struct console *co, int baud,
404 int parity, int bits, int flow);
405 struct tty_driver *uart_console_device(struct console *co, int *index);
406 void uart_console_write(struct uart_port *port, const char *s,
407 unsigned int count,
408 void (*putchar)(struct uart_port *, int));
411 * Port/driver registration/removal
413 int uart_register_driver(struct uart_driver *uart);
414 void uart_unregister_driver(struct uart_driver *uart);
415 int uart_add_one_port(struct uart_driver *reg, struct uart_port *port);
416 int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port);
417 int uart_match_port(struct uart_port *port1, struct uart_port *port2);
420 * Power Management
422 int uart_suspend_port(struct uart_driver *reg, struct uart_port *port);
423 int uart_resume_port(struct uart_driver *reg, struct uart_port *port);
425 #define uart_circ_empty(circ) ((circ)->head == (circ)->tail)
426 #define uart_circ_clear(circ) ((circ)->head = (circ)->tail = 0)
428 #define uart_circ_chars_pending(circ) \
429 (CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE))
431 #define uart_circ_chars_free(circ) \
432 (CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE))
434 #define uart_tx_stopped(port) \
435 ((port)->info->tty->stopped || (port)->info->tty->hw_stopped)
438 * The following are helper functions for the low level drivers.
440 static inline int
441 uart_handle_sysrq_char(struct uart_port *port, unsigned int ch)
443 #ifdef SUPPORT_SYSRQ
444 if (port->sysrq) {
445 if (ch && time_before(jiffies, port->sysrq)) {
446 handle_sysrq(ch, port->info ? port->info->tty : NULL);
447 port->sysrq = 0;
448 return 1;
450 port->sysrq = 0;
452 #endif
453 return 0;
455 #ifndef SUPPORT_SYSRQ
456 #define uart_handle_sysrq_char(port,ch) uart_handle_sysrq_char(port, 0)
457 #endif
460 * We do the SysRQ and SAK checking like this...
462 static inline int uart_handle_break(struct uart_port *port)
464 struct uart_info *info = port->info;
465 #ifdef SUPPORT_SYSRQ
466 if (port->cons && port->cons->index == port->line) {
467 if (!port->sysrq) {
468 port->sysrq = jiffies + HZ*5;
469 return 1;
471 port->sysrq = 0;
473 #endif
474 if (port->flags & UPF_SAK)
475 do_SAK(info->tty);
476 return 0;
480 * uart_handle_dcd_change - handle a change of carrier detect state
481 * @port: uart_port structure for the open port
482 * @status: new carrier detect status, nonzero if active
484 static inline void
485 uart_handle_dcd_change(struct uart_port *port, unsigned int status)
487 struct uart_info *info = port->info;
489 port->icount.dcd++;
491 #ifdef CONFIG_HARD_PPS
492 if ((port->flags & UPF_HARDPPS_CD) && status)
493 hardpps();
494 #endif
496 if (info->flags & UIF_CHECK_CD) {
497 if (status)
498 wake_up_interruptible(&info->open_wait);
499 else if (info->tty)
500 tty_hangup(info->tty);
505 * uart_handle_cts_change - handle a change of clear-to-send state
506 * @port: uart_port structure for the open port
507 * @status: new clear to send status, nonzero if active
509 static inline void
510 uart_handle_cts_change(struct uart_port *port, unsigned int status)
512 struct uart_info *info = port->info;
513 struct tty_struct *tty = info->tty;
515 port->icount.cts++;
517 if (info->flags & UIF_CTS_FLOW) {
518 if (tty->hw_stopped) {
519 if (status) {
520 tty->hw_stopped = 0;
521 port->ops->start_tx(port);
522 uart_write_wakeup(port);
524 } else {
525 if (!status) {
526 tty->hw_stopped = 1;
527 port->ops->stop_tx(port);
533 #include <linux/tty_flip.h>
535 static inline void
536 uart_insert_char(struct uart_port *port, unsigned int status,
537 unsigned int overrun, unsigned int ch, unsigned int flag)
539 struct tty_struct *tty = port->info->tty;
541 if ((status & port->ignore_status_mask & ~overrun) == 0)
542 tty_insert_flip_char(tty, ch, flag);
545 * Overrun is special. Since it's reported immediately,
546 * it doesn't affect the current character.
548 if (status & ~port->ignore_status_mask & overrun)
549 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
553 * UART_ENABLE_MS - determine if port should enable modem status irqs
555 #define UART_ENABLE_MS(port,cflag) ((port)->flags & UPF_HARDPPS_CD || \
556 (cflag) & CRTSCTS || \
557 !((cflag) & CLOCAL))
559 #endif
561 #endif /* LINUX_SERIAL_CORE_H */