[MIPS] Use common definitions from asm-generic/signal.h
[linux-2.6/linux-mips/linux-dm7025.git] / arch / i386 / pci / common.c
blob68bce194e688a1903480425b3db8dc37802127f0
1 /*
2 * Low-Level PCI Support for PC
4 * (c) 1999--2000 Martin Mares <mj@ucw.cz>
5 */
7 #include <linux/sched.h>
8 #include <linux/pci.h>
9 #include <linux/ioport.h>
10 #include <linux/init.h>
11 #include <linux/dmi.h>
13 #include <asm/acpi.h>
14 #include <asm/segment.h>
15 #include <asm/io.h>
16 #include <asm/smp.h>
18 #include "pci.h"
20 unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |
21 PCI_PROBE_MMCONF;
23 int pci_routeirq;
24 int pcibios_last_bus = -1;
25 unsigned long pirq_table_addr;
26 struct pci_bus *pci_root_bus;
27 struct pci_raw_ops *raw_pci_ops;
29 static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
31 return raw_pci_ops->read(0, bus->number, devfn, where, size, value);
34 static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
36 return raw_pci_ops->write(0, bus->number, devfn, where, size, value);
39 struct pci_ops pci_root_ops = {
40 .read = pci_read,
41 .write = pci_write,
45 * legacy, numa, and acpi all want to call pcibios_scan_root
46 * from their initcalls. This flag prevents that.
48 int pcibios_scanned;
51 * This interrupt-safe spinlock protects all accesses to PCI
52 * configuration space.
54 DEFINE_SPINLOCK(pci_config_lock);
57 * Several buggy motherboards address only 16 devices and mirror
58 * them to next 16 IDs. We try to detect this `feature' on all
59 * primary buses (those containing host bridges as they are
60 * expected to be unique) and remove the ghost devices.
63 static void __devinit pcibios_fixup_ghosts(struct pci_bus *b)
65 struct list_head *ln, *mn;
66 struct pci_dev *d, *e;
67 int mirror = PCI_DEVFN(16,0);
68 int seen_host_bridge = 0;
69 int i;
71 DBG("PCI: Scanning for ghost devices on bus %d\n", b->number);
72 list_for_each(ln, &b->devices) {
73 d = pci_dev_b(ln);
74 if ((d->class >> 8) == PCI_CLASS_BRIDGE_HOST)
75 seen_host_bridge++;
76 for (mn=ln->next; mn != &b->devices; mn=mn->next) {
77 e = pci_dev_b(mn);
78 if (e->devfn != d->devfn + mirror ||
79 e->vendor != d->vendor ||
80 e->device != d->device ||
81 e->class != d->class)
82 continue;
83 for(i=0; i<PCI_NUM_RESOURCES; i++)
84 if (e->resource[i].start != d->resource[i].start ||
85 e->resource[i].end != d->resource[i].end ||
86 e->resource[i].flags != d->resource[i].flags)
87 continue;
88 break;
90 if (mn == &b->devices)
91 return;
93 if (!seen_host_bridge)
94 return;
95 printk(KERN_WARNING "PCI: Ignoring ghost devices on bus %02x\n", b->number);
97 ln = &b->devices;
98 while (ln->next != &b->devices) {
99 d = pci_dev_b(ln->next);
100 if (d->devfn >= mirror) {
101 list_del(&d->global_list);
102 list_del(&d->bus_list);
103 kfree(d);
104 } else
105 ln = ln->next;
110 * Called after each bus is probed, but before its children
111 * are examined.
114 void __devinit pcibios_fixup_bus(struct pci_bus *b)
116 pcibios_fixup_ghosts(b);
117 pci_read_bridge_bases(b);
121 * Enable renumbering of PCI bus# ranges to reach all PCI busses (Cardbus)
123 #ifdef __i386__
124 static int __devinit assign_all_busses(struct dmi_system_id *d)
126 pci_probe |= PCI_ASSIGN_ALL_BUSSES;
127 printk(KERN_INFO "%s detected: enabling PCI bus# renumbering"
128 " (pci=assign-busses)\n", d->ident);
129 return 0;
131 #endif
134 * Laptops which need pci=assign-busses to see Cardbus cards
136 static struct dmi_system_id __devinitdata pciprobe_dmi_table[] = {
137 #ifdef __i386__
139 .callback = assign_all_busses,
140 .ident = "Samsung X20 Laptop",
141 .matches = {
142 DMI_MATCH(DMI_SYS_VENDOR, "Samsung Electronics"),
143 DMI_MATCH(DMI_PRODUCT_NAME, "SX20S"),
146 #endif /* __i386__ */
150 struct pci_bus * __devinit pcibios_scan_root(int busnum)
152 struct pci_bus *bus = NULL;
154 dmi_check_system(pciprobe_dmi_table);
156 while ((bus = pci_find_next_bus(bus)) != NULL) {
157 if (bus->number == busnum) {
158 /* Already scanned */
159 return bus;
163 printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busnum);
165 return pci_scan_bus_parented(NULL, busnum, &pci_root_ops, NULL);
168 extern u8 pci_cache_line_size;
170 static int __init pcibios_init(void)
172 struct cpuinfo_x86 *c = &boot_cpu_data;
174 if (!raw_pci_ops) {
175 printk(KERN_WARNING "PCI: System does not support PCI\n");
176 return 0;
180 * Assume PCI cacheline size of 32 bytes for all x86s except K7/K8
181 * and P4. It's also good for 386/486s (which actually have 16)
182 * as quite a few PCI devices do not support smaller values.
184 pci_cache_line_size = 32 >> 2;
185 if (c->x86 >= 6 && c->x86_vendor == X86_VENDOR_AMD)
186 pci_cache_line_size = 64 >> 2; /* K7 & K8 */
187 else if (c->x86 > 6 && c->x86_vendor == X86_VENDOR_INTEL)
188 pci_cache_line_size = 128 >> 2; /* P4 */
190 pcibios_resource_survey();
192 #ifdef CONFIG_PCI_BIOS
193 if ((pci_probe & PCI_BIOS_SORT) && !(pci_probe & PCI_NO_SORT))
194 pcibios_sort();
195 #endif
196 return 0;
199 subsys_initcall(pcibios_init);
201 char * __devinit pcibios_setup(char *str)
203 if (!strcmp(str, "off")) {
204 pci_probe = 0;
205 return NULL;
207 #ifdef CONFIG_PCI_BIOS
208 else if (!strcmp(str, "bios")) {
209 pci_probe = PCI_PROBE_BIOS;
210 return NULL;
211 } else if (!strcmp(str, "nobios")) {
212 pci_probe &= ~PCI_PROBE_BIOS;
213 return NULL;
214 } else if (!strcmp(str, "nosort")) {
215 pci_probe |= PCI_NO_SORT;
216 return NULL;
217 } else if (!strcmp(str, "biosirq")) {
218 pci_probe |= PCI_BIOS_IRQ_SCAN;
219 return NULL;
220 } else if (!strncmp(str, "pirqaddr=", 9)) {
221 pirq_table_addr = simple_strtoul(str+9, NULL, 0);
222 return NULL;
224 #endif
225 #ifdef CONFIG_PCI_DIRECT
226 else if (!strcmp(str, "conf1")) {
227 pci_probe = PCI_PROBE_CONF1 | PCI_NO_CHECKS;
228 return NULL;
230 else if (!strcmp(str, "conf2")) {
231 pci_probe = PCI_PROBE_CONF2 | PCI_NO_CHECKS;
232 return NULL;
234 #endif
235 #ifdef CONFIG_PCI_MMCONFIG
236 else if (!strcmp(str, "nommconf")) {
237 pci_probe &= ~PCI_PROBE_MMCONF;
238 return NULL;
240 #endif
241 else if (!strcmp(str, "noacpi")) {
242 acpi_noirq_set();
243 return NULL;
245 else if (!strcmp(str, "noearly")) {
246 pci_probe |= PCI_PROBE_NOEARLY;
247 return NULL;
249 #ifndef CONFIG_X86_VISWS
250 else if (!strcmp(str, "usepirqmask")) {
251 pci_probe |= PCI_USE_PIRQ_MASK;
252 return NULL;
253 } else if (!strncmp(str, "irqmask=", 8)) {
254 pcibios_irq_mask = simple_strtol(str+8, NULL, 0);
255 return NULL;
256 } else if (!strncmp(str, "lastbus=", 8)) {
257 pcibios_last_bus = simple_strtol(str+8, NULL, 0);
258 return NULL;
260 #endif
261 else if (!strcmp(str, "rom")) {
262 pci_probe |= PCI_ASSIGN_ROMS;
263 return NULL;
264 } else if (!strcmp(str, "assign-busses")) {
265 pci_probe |= PCI_ASSIGN_ALL_BUSSES;
266 return NULL;
267 } else if (!strcmp(str, "routeirq")) {
268 pci_routeirq = 1;
269 return NULL;
271 return str;
274 unsigned int pcibios_assign_all_busses(void)
276 return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0;
279 int pcibios_enable_device(struct pci_dev *dev, int mask)
281 int err;
283 if ((err = pcibios_enable_resources(dev, mask)) < 0)
284 return err;
286 return pcibios_enable_irq(dev);
289 void pcibios_disable_device (struct pci_dev *dev)
291 pcibios_disable_resources(dev);
292 if (pcibios_disable_irq)
293 pcibios_disable_irq(dev);