2 * Modifications by Matt Porter (mporter@mvista.com) to support
3 * PPC44x Book E processors.
5 * This file contains the routines for initializing the MMU
6 * on the 4xx series of chips.
9 * Derived from arch/ppc/mm/init.c:
10 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
12 * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
13 * and Cort Dougan (PReP) (cort@cs.nmt.edu)
14 * Copyright (C) 1996 Paul Mackerras
16 * Derived from "arch/i386/mm/init.c"
17 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License
21 * as published by the Free Software Foundation; either version
22 * 2 of the License, or (at your option) any later version.
26 #include <linux/init.h>
28 #include <asm/system.h>
33 /* Used by the 44x TLB replacement exception handler.
34 * Just needed it declared someplace.
36 unsigned int tlb_44x_index
; /* = 0 */
37 unsigned int tlb_44x_hwater
= PPC44x_TLB_SIZE
- 1 - PPC44x_EARLY_TLBS
;
38 int icache_44x_need_flush
;
41 * "Pins" a 256MB TLB entry in AS0 for kernel lowmem
43 static void __init
ppc44x_pin_tlb(unsigned int virt
, unsigned int phys
)
50 : "r" (PPC44x_TLB_SW
| PPC44x_TLB_SR
| PPC44x_TLB_SX
| PPC44x_TLB_G
),
52 "r" (virt
| PPC44x_TLB_VALID
| PPC44x_TLB_256M
),
53 "r" (tlb_44x_hwater
--), /* slot for this TLB entry */
54 "i" (PPC44x_TLB_PAGEID
),
55 "i" (PPC44x_TLB_XLAT
),
56 "i" (PPC44x_TLB_ATTRIB
));
59 void __init
MMU_init_hw(void)
61 flush_instruction_cache();
64 unsigned long __init
mmu_mapin_ram(void)
68 /* Pin in enough TLBs to cover any lowmem not covered by the
69 * initial 256M mapping established in head_44x.S */
70 for (addr
= PPC_PIN_SIZE
; addr
< lowmem_end_addr
;
72 ppc44x_pin_tlb(addr
+ PAGE_OFFSET
, addr
);