2 * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
3 * Copyright(c) 2006 - 2007 Chris Snook <csnook@redhat.com>
4 * Copyright(c) 2006 Jay Cliburn <jcliburn@gmail.com>
6 * Derived from Intel e1000 driver
7 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the Free
11 * Software Foundation; either version 2 of the License, or (at your option)
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * You should have received a copy of the GNU General Public License along with
20 * this program; if not, write to the Free Software Foundation, Inc., 59
21 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23 * The full GNU General Public License is included in this distribution in the
24 * file called COPYING.
26 * Contact Information:
27 * Xiong Huang <xiong_huang@attansic.com>
28 * Attansic Technology Corp. 3F 147, Xianzheng 9th Road, Zhubei,
29 * Xinzhu 302, TAIWAN, REPUBLIC OF CHINA
31 * Chris Snook <csnook@redhat.com>
32 * Jay Cliburn <jcliburn@gmail.com>
34 * This version is adapted from the Attansic reference driver for
35 * inclusion in the Linux kernel. It is currently under heavy development.
36 * A very incomplete list of things that need to be dealt with:
40 * Add more ethtool functions.
41 * Fix abstruse irq enable/disable condition described here:
42 * http://marc.theaimsgroup.com/?l=linux-netdev&m=116398508500553&w=2
48 * interrupt coalescing
52 #include <asm/atomic.h>
53 #include <asm/byteorder.h>
55 #include <linux/compiler.h>
56 #include <linux/crc32.h>
57 #include <linux/delay.h>
58 #include <linux/dma-mapping.h>
59 #include <linux/etherdevice.h>
60 #include <linux/hardirq.h>
61 #include <linux/if_ether.h>
62 #include <linux/if_vlan.h>
64 #include <linux/interrupt.h>
66 #include <linux/irqflags.h>
67 #include <linux/irqreturn.h>
68 #include <linux/jiffies.h>
69 #include <linux/mii.h>
70 #include <linux/module.h>
71 #include <linux/moduleparam.h>
72 #include <linux/net.h>
73 #include <linux/netdevice.h>
74 #include <linux/pci.h>
75 #include <linux/pci_ids.h>
77 #include <linux/skbuff.h>
78 #include <linux/slab.h>
79 #include <linux/spinlock.h>
80 #include <linux/string.h>
81 #include <linux/tcp.h>
82 #include <linux/timer.h>
83 #include <linux/types.h>
84 #include <linux/workqueue.h>
86 #include <net/checksum.h>
90 /* Temporary hack for merging atl1 and atl2 */
94 * This is the only thing that needs to be changed to adjust the
95 * maximum number of ports that the driver can manage.
97 #define ATL1_MAX_NIC 4
99 #define OPTION_UNSET -1
100 #define OPTION_DISABLED 0
101 #define OPTION_ENABLED 1
103 #define ATL1_PARAM_INIT { [0 ... ATL1_MAX_NIC] = OPTION_UNSET }
106 * Interrupt Moderate Timer in units of 2 us
108 * Valid Range: 10-65535
110 * Default Value: 100 (200us)
112 static int __devinitdata int_mod_timer
[ATL1_MAX_NIC
+1] = ATL1_PARAM_INIT
;
113 static int num_int_mod_timer
;
114 module_param_array_named(int_mod_timer
, int_mod_timer
, int,
115 &num_int_mod_timer
, 0);
116 MODULE_PARM_DESC(int_mod_timer
, "Interrupt moderator timer");
118 #define DEFAULT_INT_MOD_CNT 100 /* 200us */
119 #define MAX_INT_MOD_CNT 65000
120 #define MIN_INT_MOD_CNT 50
123 enum { enable_option
, range_option
, list_option
} type
;
128 struct { /* range_option info */
132 struct { /* list_option info */
134 struct atl1_opt_list
{
142 static int __devinit
atl1_validate_option(int *value
, struct atl1_option
*opt
,
143 struct pci_dev
*pdev
)
145 if (*value
== OPTION_UNSET
) {
154 dev_info(&pdev
->dev
, "%s enabled\n", opt
->name
);
156 case OPTION_DISABLED
:
157 dev_info(&pdev
->dev
, "%s disabled\n", opt
->name
);
162 if (*value
>= opt
->arg
.r
.min
&& *value
<= opt
->arg
.r
.max
) {
163 dev_info(&pdev
->dev
, "%s set to %i\n", opt
->name
,
170 struct atl1_opt_list
*ent
;
172 for (i
= 0; i
< opt
->arg
.l
.nr
; i
++) {
173 ent
= &opt
->arg
.l
.p
[i
];
174 if (*value
== ent
->i
) {
175 if (ent
->str
[0] != '\0')
176 dev_info(&pdev
->dev
, "%s\n",
188 dev_info(&pdev
->dev
, "invalid %s specified (%i) %s\n",
189 opt
->name
, *value
, opt
->err
);
195 * atl1_check_options - Range Checking for Command Line Parameters
196 * @adapter: board private structure
198 * This routine checks all command line parameters for valid user
199 * input. If an invalid value is given, or if no user specified
200 * value exists, a default value is used. The final value is stored
201 * in a variable in the adapter structure.
203 void __devinit
atl1_check_options(struct atl1_adapter
*adapter
)
205 struct pci_dev
*pdev
= adapter
->pdev
;
206 int bd
= adapter
->bd_number
;
207 if (bd
>= ATL1_MAX_NIC
) {
208 dev_notice(&pdev
->dev
, "no configuration for board#%i\n", bd
);
209 dev_notice(&pdev
->dev
, "using defaults for all values\n");
211 { /* Interrupt Moderate Timer */
212 struct atl1_option opt
= {
213 .type
= range_option
,
214 .name
= "Interrupt Moderator Timer",
215 .err
= "using default of "
216 __MODULE_STRING(DEFAULT_INT_MOD_CNT
),
217 .def
= DEFAULT_INT_MOD_CNT
,
218 .arg
= {.r
= {.min
= MIN_INT_MOD_CNT
,
219 .max
= MAX_INT_MOD_CNT
} }
222 if (num_int_mod_timer
> bd
) {
223 val
= int_mod_timer
[bd
];
224 atl1_validate_option(&val
, &opt
, pdev
);
225 adapter
->imt
= (u16
) val
;
227 adapter
->imt
= (u16
) (opt
.def
);
232 * atl1_pci_tbl - PCI Device ID Table
234 static const struct pci_device_id atl1_pci_tbl
[] = {
235 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC
, PCI_DEVICE_ID_ATTANSIC_L1
)},
236 /* required last entry */
239 MODULE_DEVICE_TABLE(pci
, atl1_pci_tbl
);
241 static const u32 atl1_default_msg
= NETIF_MSG_DRV
| NETIF_MSG_PROBE
|
242 NETIF_MSG_LINK
| NETIF_MSG_TIMER
| NETIF_MSG_IFDOWN
| NETIF_MSG_IFUP
;
244 static int debug
= -1;
245 module_param(debug
, int, 0);
246 MODULE_PARM_DESC(debug
, "Message level (0=none,...,16=all)");
249 * Reset the transmit and receive units; mask and clear all interrupts.
250 * hw - Struct containing variables accessed by shared code
251 * return : 0 or idle status (if error)
253 static s32
atl1_reset_hw(struct atl1_hw
*hw
)
255 struct pci_dev
*pdev
= hw
->back
->pdev
;
256 struct atl1_adapter
*adapter
= hw
->back
;
261 * Clear Interrupt mask to stop board from generating
262 * interrupts & Clear any pending interrupt events
265 * iowrite32(0, hw->hw_addr + REG_IMR);
266 * iowrite32(0xffffffff, hw->hw_addr + REG_ISR);
270 * Issue Soft Reset to the MAC. This will reset the chip's
271 * transmit, receive, DMA. It will not effect
272 * the current PCI configuration. The global reset bit is self-
273 * clearing, and should clear within a microsecond.
275 iowrite32(MASTER_CTRL_SOFT_RST
, hw
->hw_addr
+ REG_MASTER_CTRL
);
276 ioread32(hw
->hw_addr
+ REG_MASTER_CTRL
);
278 iowrite16(1, hw
->hw_addr
+ REG_PHY_ENABLE
);
279 ioread16(hw
->hw_addr
+ REG_PHY_ENABLE
);
281 /* delay about 1ms */
284 /* Wait at least 10ms for All module to be Idle */
285 for (i
= 0; i
< 10; i
++) {
286 icr
= ioread32(hw
->hw_addr
+ REG_IDLE_STATUS
);
291 /* FIXME: still the right way to do this? */
296 if (netif_msg_hw(adapter
))
297 dev_dbg(&pdev
->dev
, "ICR = 0x%x\n", icr
);
304 /* function about EEPROM
307 * return 0 if eeprom exist
309 static int atl1_check_eeprom_exist(struct atl1_hw
*hw
)
312 value
= ioread32(hw
->hw_addr
+ REG_SPI_FLASH_CTRL
);
313 if (value
& SPI_FLASH_CTRL_EN_VPD
) {
314 value
&= ~SPI_FLASH_CTRL_EN_VPD
;
315 iowrite32(value
, hw
->hw_addr
+ REG_SPI_FLASH_CTRL
);
318 value
= ioread16(hw
->hw_addr
+ REG_PCIE_CAP_LIST
);
319 return ((value
& 0xFF00) == 0x6C00) ? 0 : 1;
322 static bool atl1_read_eeprom(struct atl1_hw
*hw
, u32 offset
, u32
*p_value
)
328 /* address do not align */
331 iowrite32(0, hw
->hw_addr
+ REG_VPD_DATA
);
332 control
= (offset
& VPD_CAP_VPD_ADDR_MASK
) << VPD_CAP_VPD_ADDR_SHIFT
;
333 iowrite32(control
, hw
->hw_addr
+ REG_VPD_CAP
);
334 ioread32(hw
->hw_addr
+ REG_VPD_CAP
);
336 for (i
= 0; i
< 10; i
++) {
338 control
= ioread32(hw
->hw_addr
+ REG_VPD_CAP
);
339 if (control
& VPD_CAP_VPD_FLAG
)
342 if (control
& VPD_CAP_VPD_FLAG
) {
343 *p_value
= ioread32(hw
->hw_addr
+ REG_VPD_DATA
);
351 * Reads the value from a PHY register
352 * hw - Struct containing variables accessed by shared code
353 * reg_addr - address of the PHY register to read
355 s32
atl1_read_phy_reg(struct atl1_hw
*hw
, u16 reg_addr
, u16
*phy_data
)
360 val
= ((u32
) (reg_addr
& MDIO_REG_ADDR_MASK
)) << MDIO_REG_ADDR_SHIFT
|
361 MDIO_START
| MDIO_SUP_PREAMBLE
| MDIO_RW
| MDIO_CLK_25_4
<<
363 iowrite32(val
, hw
->hw_addr
+ REG_MDIO_CTRL
);
364 ioread32(hw
->hw_addr
+ REG_MDIO_CTRL
);
366 for (i
= 0; i
< MDIO_WAIT_TIMES
; i
++) {
368 val
= ioread32(hw
->hw_addr
+ REG_MDIO_CTRL
);
369 if (!(val
& (MDIO_START
| MDIO_BUSY
)))
372 if (!(val
& (MDIO_START
| MDIO_BUSY
))) {
373 *phy_data
= (u16
) val
;
379 #define CUSTOM_SPI_CS_SETUP 2
380 #define CUSTOM_SPI_CLK_HI 2
381 #define CUSTOM_SPI_CLK_LO 2
382 #define CUSTOM_SPI_CS_HOLD 2
383 #define CUSTOM_SPI_CS_HI 3
385 static bool atl1_spi_read(struct atl1_hw
*hw
, u32 addr
, u32
*buf
)
390 iowrite32(0, hw
->hw_addr
+ REG_SPI_DATA
);
391 iowrite32(addr
, hw
->hw_addr
+ REG_SPI_ADDR
);
393 value
= SPI_FLASH_CTRL_WAIT_READY
|
394 (CUSTOM_SPI_CS_SETUP
& SPI_FLASH_CTRL_CS_SETUP_MASK
) <<
395 SPI_FLASH_CTRL_CS_SETUP_SHIFT
| (CUSTOM_SPI_CLK_HI
&
396 SPI_FLASH_CTRL_CLK_HI_MASK
) <<
397 SPI_FLASH_CTRL_CLK_HI_SHIFT
| (CUSTOM_SPI_CLK_LO
&
398 SPI_FLASH_CTRL_CLK_LO_MASK
) <<
399 SPI_FLASH_CTRL_CLK_LO_SHIFT
| (CUSTOM_SPI_CS_HOLD
&
400 SPI_FLASH_CTRL_CS_HOLD_MASK
) <<
401 SPI_FLASH_CTRL_CS_HOLD_SHIFT
| (CUSTOM_SPI_CS_HI
&
402 SPI_FLASH_CTRL_CS_HI_MASK
) <<
403 SPI_FLASH_CTRL_CS_HI_SHIFT
| (1 & SPI_FLASH_CTRL_INS_MASK
) <<
404 SPI_FLASH_CTRL_INS_SHIFT
;
406 iowrite32(value
, hw
->hw_addr
+ REG_SPI_FLASH_CTRL
);
408 value
|= SPI_FLASH_CTRL_START
;
409 iowrite32(value
, hw
->hw_addr
+ REG_SPI_FLASH_CTRL
);
410 ioread32(hw
->hw_addr
+ REG_SPI_FLASH_CTRL
);
412 for (i
= 0; i
< 10; i
++) {
414 value
= ioread32(hw
->hw_addr
+ REG_SPI_FLASH_CTRL
);
415 if (!(value
& SPI_FLASH_CTRL_START
))
419 if (value
& SPI_FLASH_CTRL_START
)
422 *buf
= ioread32(hw
->hw_addr
+ REG_SPI_DATA
);
428 * get_permanent_address
429 * return 0 if get valid mac address,
431 static int atl1_get_permanent_address(struct atl1_hw
*hw
)
436 u8 eth_addr
[ETH_ALEN
];
439 if (is_valid_ether_addr(hw
->perm_mac_addr
))
443 addr
[0] = addr
[1] = 0;
445 if (!atl1_check_eeprom_exist(hw
)) {
448 /* Read out all EEPROM content */
451 if (atl1_read_eeprom(hw
, i
+ 0x100, &control
)) {
453 if (reg
== REG_MAC_STA_ADDR
)
455 else if (reg
== (REG_MAC_STA_ADDR
+ 4))
458 } else if ((control
& 0xff) == 0x5A) {
460 reg
= (u16
) (control
>> 16);
469 *(u32
*) ð_addr
[2] = swab32(addr
[0]);
470 *(u16
*) ð_addr
[0] = swab16(*(u16
*) &addr
[1]);
471 if (is_valid_ether_addr(eth_addr
)) {
472 memcpy(hw
->perm_mac_addr
, eth_addr
, ETH_ALEN
);
478 /* see if SPI FLAGS exist ? */
479 addr
[0] = addr
[1] = 0;
484 if (atl1_spi_read(hw
, i
+ 0x1f000, &control
)) {
486 if (reg
== REG_MAC_STA_ADDR
)
488 else if (reg
== (REG_MAC_STA_ADDR
+ 4))
491 } else if ((control
& 0xff) == 0x5A) {
493 reg
= (u16
) (control
>> 16);
503 *(u32
*) ð_addr
[2] = swab32(addr
[0]);
504 *(u16
*) ð_addr
[0] = swab16(*(u16
*) &addr
[1]);
505 if (is_valid_ether_addr(eth_addr
)) {
506 memcpy(hw
->perm_mac_addr
, eth_addr
, ETH_ALEN
);
511 * On some motherboards, the MAC address is written by the
512 * BIOS directly to the MAC register during POST, and is
513 * not stored in eeprom. If all else thus far has failed
514 * to fetch the permanent MAC address, try reading it directly.
516 addr
[0] = ioread32(hw
->hw_addr
+ REG_MAC_STA_ADDR
);
517 addr
[1] = ioread16(hw
->hw_addr
+ (REG_MAC_STA_ADDR
+ 4));
518 *(u32
*) ð_addr
[2] = swab32(addr
[0]);
519 *(u16
*) ð_addr
[0] = swab16(*(u16
*) &addr
[1]);
520 if (is_valid_ether_addr(eth_addr
)) {
521 memcpy(hw
->perm_mac_addr
, eth_addr
, ETH_ALEN
);
529 * Reads the adapter's MAC address from the EEPROM
530 * hw - Struct containing variables accessed by shared code
532 s32
atl1_read_mac_addr(struct atl1_hw
*hw
)
536 if (atl1_get_permanent_address(hw
))
537 random_ether_addr(hw
->perm_mac_addr
);
539 for (i
= 0; i
< ETH_ALEN
; i
++)
540 hw
->mac_addr
[i
] = hw
->perm_mac_addr
[i
];
545 * Hashes an address to determine its location in the multicast table
546 * hw - Struct containing variables accessed by shared code
547 * mc_addr - the multicast address to hash
551 * set hash value for a multicast address
552 * hash calcu processing :
553 * 1. calcu 32bit CRC for multicast address
554 * 2. reverse crc with MSB to LSB
556 u32
atl1_hash_mc_addr(struct atl1_hw
*hw
, u8
*mc_addr
)
558 u32 crc32
, value
= 0;
561 crc32
= ether_crc_le(6, mc_addr
);
562 for (i
= 0; i
< 32; i
++)
563 value
|= (((crc32
>> i
) & 1) << (31 - i
));
569 * Sets the bit in the multicast table corresponding to the hash value.
570 * hw - Struct containing variables accessed by shared code
571 * hash_value - Multicast address hash value
573 void atl1_hash_set(struct atl1_hw
*hw
, u32 hash_value
)
575 u32 hash_bit
, hash_reg
;
579 * The HASH Table is a register array of 2 32-bit registers.
580 * It is treated like an array of 64 bits. We want to set
581 * bit BitArray[hash_value]. So we figure out what register
582 * the bit is in, read it, OR in the new bit, then write
583 * back the new value. The register is determined by the
584 * upper 7 bits of the hash value and the bit within that
585 * register are determined by the lower 5 bits of the value.
587 hash_reg
= (hash_value
>> 31) & 0x1;
588 hash_bit
= (hash_value
>> 26) & 0x1F;
589 mta
= ioread32((hw
->hw_addr
+ REG_RX_HASH_TABLE
) + (hash_reg
<< 2));
590 mta
|= (1 << hash_bit
);
591 iowrite32(mta
, (hw
->hw_addr
+ REG_RX_HASH_TABLE
) + (hash_reg
<< 2));
595 * Writes a value to a PHY register
596 * hw - Struct containing variables accessed by shared code
597 * reg_addr - address of the PHY register to write
598 * data - data to write to the PHY
600 static s32
atl1_write_phy_reg(struct atl1_hw
*hw
, u32 reg_addr
, u16 phy_data
)
605 val
= ((u32
) (phy_data
& MDIO_DATA_MASK
)) << MDIO_DATA_SHIFT
|
606 (reg_addr
& MDIO_REG_ADDR_MASK
) << MDIO_REG_ADDR_SHIFT
|
608 MDIO_START
| MDIO_CLK_25_4
<< MDIO_CLK_SEL_SHIFT
;
609 iowrite32(val
, hw
->hw_addr
+ REG_MDIO_CTRL
);
610 ioread32(hw
->hw_addr
+ REG_MDIO_CTRL
);
612 for (i
= 0; i
< MDIO_WAIT_TIMES
; i
++) {
614 val
= ioread32(hw
->hw_addr
+ REG_MDIO_CTRL
);
615 if (!(val
& (MDIO_START
| MDIO_BUSY
)))
619 if (!(val
& (MDIO_START
| MDIO_BUSY
)))
626 * Make L001's PHY out of Power Saving State (bug)
627 * hw - Struct containing variables accessed by shared code
628 * when power on, L001's PHY always on Power saving State
629 * (Gigabit Link forbidden)
631 static s32
atl1_phy_leave_power_saving(struct atl1_hw
*hw
)
634 ret
= atl1_write_phy_reg(hw
, 29, 0x0029);
637 return atl1_write_phy_reg(hw
, 30, 0);
641 *TODO: do something or get rid of this
644 static s32
atl1_phy_enter_power_saving(struct atl1_hw
*hw
)
651 ret_val = atl1_write_phy_reg(hw, ...);
652 ret_val = atl1_write_phy_reg(hw, ...);
660 * Resets the PHY and make all config validate
661 * hw - Struct containing variables accessed by shared code
663 * Sets bit 15 and 12 of the MII Control regiser (for F001 bug)
665 static s32
atl1_phy_reset(struct atl1_hw
*hw
)
667 struct pci_dev
*pdev
= hw
->back
->pdev
;
668 struct atl1_adapter
*adapter
= hw
->back
;
672 if (hw
->media_type
== MEDIA_TYPE_AUTO_SENSOR
||
673 hw
->media_type
== MEDIA_TYPE_1000M_FULL
)
674 phy_data
= MII_CR_RESET
| MII_CR_AUTO_NEG_EN
;
676 switch (hw
->media_type
) {
677 case MEDIA_TYPE_100M_FULL
:
679 MII_CR_FULL_DUPLEX
| MII_CR_SPEED_100
|
682 case MEDIA_TYPE_100M_HALF
:
683 phy_data
= MII_CR_SPEED_100
| MII_CR_RESET
;
685 case MEDIA_TYPE_10M_FULL
:
687 MII_CR_FULL_DUPLEX
| MII_CR_SPEED_10
| MII_CR_RESET
;
690 /* MEDIA_TYPE_10M_HALF: */
691 phy_data
= MII_CR_SPEED_10
| MII_CR_RESET
;
696 ret_val
= atl1_write_phy_reg(hw
, MII_BMCR
, phy_data
);
700 /* pcie serdes link may be down! */
701 if (netif_msg_hw(adapter
))
702 dev_dbg(&pdev
->dev
, "pcie phy link down\n");
704 for (i
= 0; i
< 25; i
++) {
706 val
= ioread32(hw
->hw_addr
+ REG_MDIO_CTRL
);
707 if (!(val
& (MDIO_START
| MDIO_BUSY
)))
711 if ((val
& (MDIO_START
| MDIO_BUSY
)) != 0) {
712 if (netif_msg_hw(adapter
))
714 "pcie link down at least 25ms\n");
722 * Configures PHY autoneg and flow control advertisement settings
723 * hw - Struct containing variables accessed by shared code
725 static s32
atl1_phy_setup_autoneg_adv(struct atl1_hw
*hw
)
728 s16 mii_autoneg_adv_reg
;
729 s16 mii_1000t_ctrl_reg
;
731 /* Read the MII Auto-Neg Advertisement Register (Address 4). */
732 mii_autoneg_adv_reg
= MII_AR_DEFAULT_CAP_MASK
;
734 /* Read the MII 1000Base-T Control Register (Address 9). */
735 mii_1000t_ctrl_reg
= MII_ATLX_CR_1000T_DEFAULT_CAP_MASK
;
738 * First we clear all the 10/100 mb speed bits in the Auto-Neg
739 * Advertisement Register (Address 4) and the 1000 mb speed bits in
740 * the 1000Base-T Control Register (Address 9).
742 mii_autoneg_adv_reg
&= ~MII_AR_SPEED_MASK
;
743 mii_1000t_ctrl_reg
&= ~MII_ATLX_CR_1000T_SPEED_MASK
;
746 * Need to parse media_type and set up
747 * the appropriate PHY registers.
749 switch (hw
->media_type
) {
750 case MEDIA_TYPE_AUTO_SENSOR
:
751 mii_autoneg_adv_reg
|= (MII_AR_10T_HD_CAPS
|
753 MII_AR_100TX_HD_CAPS
|
754 MII_AR_100TX_FD_CAPS
);
755 mii_1000t_ctrl_reg
|= MII_ATLX_CR_1000T_FD_CAPS
;
758 case MEDIA_TYPE_1000M_FULL
:
759 mii_1000t_ctrl_reg
|= MII_ATLX_CR_1000T_FD_CAPS
;
762 case MEDIA_TYPE_100M_FULL
:
763 mii_autoneg_adv_reg
|= MII_AR_100TX_FD_CAPS
;
766 case MEDIA_TYPE_100M_HALF
:
767 mii_autoneg_adv_reg
|= MII_AR_100TX_HD_CAPS
;
770 case MEDIA_TYPE_10M_FULL
:
771 mii_autoneg_adv_reg
|= MII_AR_10T_FD_CAPS
;
775 mii_autoneg_adv_reg
|= MII_AR_10T_HD_CAPS
;
779 /* flow control fixed to enable all */
780 mii_autoneg_adv_reg
|= (MII_AR_ASM_DIR
| MII_AR_PAUSE
);
782 hw
->mii_autoneg_adv_reg
= mii_autoneg_adv_reg
;
783 hw
->mii_1000t_ctrl_reg
= mii_1000t_ctrl_reg
;
785 ret_val
= atl1_write_phy_reg(hw
, MII_ADVERTISE
, mii_autoneg_adv_reg
);
789 ret_val
= atl1_write_phy_reg(hw
, MII_ATLX_CR
, mii_1000t_ctrl_reg
);
797 * Configures link settings.
798 * hw - Struct containing variables accessed by shared code
799 * Assumes the hardware has previously been reset and the
800 * transmitter and receiver are not enabled.
802 static s32
atl1_setup_link(struct atl1_hw
*hw
)
804 struct pci_dev
*pdev
= hw
->back
->pdev
;
805 struct atl1_adapter
*adapter
= hw
->back
;
810 * PHY will advertise value(s) parsed from
811 * autoneg_advertised and fc
812 * no matter what autoneg is , We will not wait link result.
814 ret_val
= atl1_phy_setup_autoneg_adv(hw
);
816 if (netif_msg_link(adapter
))
818 "error setting up autonegotiation\n");
821 /* SW.Reset , En-Auto-Neg if needed */
822 ret_val
= atl1_phy_reset(hw
);
824 if (netif_msg_link(adapter
))
825 dev_dbg(&pdev
->dev
, "error resetting phy\n");
828 hw
->phy_configured
= true;
832 static void atl1_init_flash_opcode(struct atl1_hw
*hw
)
834 if (hw
->flash_vendor
>= ARRAY_SIZE(flash_table
))
836 hw
->flash_vendor
= 0;
839 iowrite8(flash_table
[hw
->flash_vendor
].cmd_program
,
840 hw
->hw_addr
+ REG_SPI_FLASH_OP_PROGRAM
);
841 iowrite8(flash_table
[hw
->flash_vendor
].cmd_sector_erase
,
842 hw
->hw_addr
+ REG_SPI_FLASH_OP_SC_ERASE
);
843 iowrite8(flash_table
[hw
->flash_vendor
].cmd_chip_erase
,
844 hw
->hw_addr
+ REG_SPI_FLASH_OP_CHIP_ERASE
);
845 iowrite8(flash_table
[hw
->flash_vendor
].cmd_rdid
,
846 hw
->hw_addr
+ REG_SPI_FLASH_OP_RDID
);
847 iowrite8(flash_table
[hw
->flash_vendor
].cmd_wren
,
848 hw
->hw_addr
+ REG_SPI_FLASH_OP_WREN
);
849 iowrite8(flash_table
[hw
->flash_vendor
].cmd_rdsr
,
850 hw
->hw_addr
+ REG_SPI_FLASH_OP_RDSR
);
851 iowrite8(flash_table
[hw
->flash_vendor
].cmd_wrsr
,
852 hw
->hw_addr
+ REG_SPI_FLASH_OP_WRSR
);
853 iowrite8(flash_table
[hw
->flash_vendor
].cmd_read
,
854 hw
->hw_addr
+ REG_SPI_FLASH_OP_READ
);
858 * Performs basic configuration of the adapter.
859 * hw - Struct containing variables accessed by shared code
860 * Assumes that the controller has previously been reset and is in a
861 * post-reset uninitialized state. Initializes multicast table,
862 * and Calls routines to setup link
863 * Leaves the transmit and receive units disabled and uninitialized.
865 static s32
atl1_init_hw(struct atl1_hw
*hw
)
869 /* Zero out the Multicast HASH table */
870 iowrite32(0, hw
->hw_addr
+ REG_RX_HASH_TABLE
);
871 /* clear the old settings from the multicast hash table */
872 iowrite32(0, (hw
->hw_addr
+ REG_RX_HASH_TABLE
) + (1 << 2));
874 atl1_init_flash_opcode(hw
);
876 if (!hw
->phy_configured
) {
877 /* enable GPHY LinkChange Interrrupt */
878 ret_val
= atl1_write_phy_reg(hw
, 18, 0xC00);
881 /* make PHY out of power-saving state */
882 ret_val
= atl1_phy_leave_power_saving(hw
);
885 /* Call a subroutine to configure the link */
886 ret_val
= atl1_setup_link(hw
);
892 * Detects the current speed and duplex settings of the hardware.
893 * hw - Struct containing variables accessed by shared code
894 * speed - Speed of the connection
895 * duplex - Duplex setting of the connection
897 static s32
atl1_get_speed_and_duplex(struct atl1_hw
*hw
, u16
*speed
, u16
*duplex
)
899 struct pci_dev
*pdev
= hw
->back
->pdev
;
900 struct atl1_adapter
*adapter
= hw
->back
;
904 /* ; --- Read PHY Specific Status Register (17) */
905 ret_val
= atl1_read_phy_reg(hw
, MII_ATLX_PSSR
, &phy_data
);
909 if (!(phy_data
& MII_ATLX_PSSR_SPD_DPLX_RESOLVED
))
910 return ATLX_ERR_PHY_RES
;
912 switch (phy_data
& MII_ATLX_PSSR_SPEED
) {
913 case MII_ATLX_PSSR_1000MBS
:
916 case MII_ATLX_PSSR_100MBS
:
919 case MII_ATLX_PSSR_10MBS
:
923 if (netif_msg_hw(adapter
))
924 dev_dbg(&pdev
->dev
, "error getting speed\n");
925 return ATLX_ERR_PHY_SPEED
;
928 if (phy_data
& MII_ATLX_PSSR_DPLX
)
929 *duplex
= FULL_DUPLEX
;
931 *duplex
= HALF_DUPLEX
;
936 void atl1_set_mac_addr(struct atl1_hw
*hw
)
941 * 0: 6AF600DC 1: 000B
944 value
= (((u32
) hw
->mac_addr
[2]) << 24) |
945 (((u32
) hw
->mac_addr
[3]) << 16) |
946 (((u32
) hw
->mac_addr
[4]) << 8) | (((u32
) hw
->mac_addr
[5]));
947 iowrite32(value
, hw
->hw_addr
+ REG_MAC_STA_ADDR
);
949 value
= (((u32
) hw
->mac_addr
[0]) << 8) | (((u32
) hw
->mac_addr
[1]));
950 iowrite32(value
, (hw
->hw_addr
+ REG_MAC_STA_ADDR
) + (1 << 2));
954 * atl1_sw_init - Initialize general software structures (struct atl1_adapter)
955 * @adapter: board private structure to initialize
957 * atl1_sw_init initializes the Adapter private data structure.
958 * Fields are initialized based on PCI device information and
959 * OS network device settings (MTU size).
961 static int __devinit
atl1_sw_init(struct atl1_adapter
*adapter
)
963 struct atl1_hw
*hw
= &adapter
->hw
;
964 struct net_device
*netdev
= adapter
->netdev
;
966 hw
->max_frame_size
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+ VLAN_HLEN
;
967 hw
->min_frame_size
= ETH_ZLEN
+ ETH_FCS_LEN
;
970 adapter
->rx_buffer_len
= (hw
->max_frame_size
+ 7) & ~7;
971 adapter
->ict
= 50000; /* 100ms */
972 adapter
->link_speed
= SPEED_0
; /* hardware init */
973 adapter
->link_duplex
= FULL_DUPLEX
;
975 hw
->phy_configured
= false;
976 hw
->preamble_len
= 7;
986 hw
->rfd_fetch_gap
= 1;
987 hw
->rx_jumbo_th
= adapter
->rx_buffer_len
/ 8;
988 hw
->rx_jumbo_lkah
= 1;
989 hw
->rrd_ret_timer
= 16;
991 hw
->tpd_fetch_th
= 16;
992 hw
->txf_burst
= 0x100;
993 hw
->tx_jumbo_task_th
= (hw
->max_frame_size
+ 7) >> 3;
994 hw
->tpd_fetch_gap
= 1;
995 hw
->rcb_value
= atl1_rcb_64
;
996 hw
->dma_ord
= atl1_dma_ord_enh
;
997 hw
->dmar_block
= atl1_dma_req_256
;
998 hw
->dmaw_block
= atl1_dma_req_256
;
1001 hw
->cmb_rx_timer
= 1; /* about 2us */
1002 hw
->cmb_tx_timer
= 1; /* about 2us */
1003 hw
->smb_timer
= 100000; /* about 200ms */
1005 spin_lock_init(&adapter
->lock
);
1006 spin_lock_init(&adapter
->mb_lock
);
1011 static int mdio_read(struct net_device
*netdev
, int phy_id
, int reg_num
)
1013 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
1016 atl1_read_phy_reg(&adapter
->hw
, reg_num
& 0x1f, &result
);
1021 static void mdio_write(struct net_device
*netdev
, int phy_id
, int reg_num
,
1024 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
1026 atl1_write_phy_reg(&adapter
->hw
, reg_num
, val
);
1035 static int atl1_mii_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
1037 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
1038 unsigned long flags
;
1041 if (!netif_running(netdev
))
1044 spin_lock_irqsave(&adapter
->lock
, flags
);
1045 retval
= generic_mii_ioctl(&adapter
->mii
, if_mii(ifr
), cmd
, NULL
);
1046 spin_unlock_irqrestore(&adapter
->lock
, flags
);
1052 * atl1_setup_mem_resources - allocate Tx / RX descriptor resources
1053 * @adapter: board private structure
1055 * Return 0 on success, negative on failure
1057 static s32
atl1_setup_ring_resources(struct atl1_adapter
*adapter
)
1059 struct atl1_tpd_ring
*tpd_ring
= &adapter
->tpd_ring
;
1060 struct atl1_rfd_ring
*rfd_ring
= &adapter
->rfd_ring
;
1061 struct atl1_rrd_ring
*rrd_ring
= &adapter
->rrd_ring
;
1062 struct atl1_ring_header
*ring_header
= &adapter
->ring_header
;
1063 struct pci_dev
*pdev
= adapter
->pdev
;
1067 size
= sizeof(struct atl1_buffer
) * (tpd_ring
->count
+ rfd_ring
->count
);
1068 tpd_ring
->buffer_info
= kzalloc(size
, GFP_KERNEL
);
1069 if (unlikely(!tpd_ring
->buffer_info
)) {
1070 if (netif_msg_drv(adapter
))
1071 dev_err(&pdev
->dev
, "kzalloc failed , size = D%d\n",
1075 rfd_ring
->buffer_info
=
1076 (struct atl1_buffer
*)(tpd_ring
->buffer_info
+ tpd_ring
->count
);
1079 * real ring DMA buffer
1080 * each ring/block may need up to 8 bytes for alignment, hence the
1081 * additional 40 bytes tacked onto the end.
1083 ring_header
->size
= size
=
1084 sizeof(struct tx_packet_desc
) * tpd_ring
->count
1085 + sizeof(struct rx_free_desc
) * rfd_ring
->count
1086 + sizeof(struct rx_return_desc
) * rrd_ring
->count
1087 + sizeof(struct coals_msg_block
)
1088 + sizeof(struct stats_msg_block
)
1091 ring_header
->desc
= pci_alloc_consistent(pdev
, ring_header
->size
,
1093 if (unlikely(!ring_header
->desc
)) {
1094 if (netif_msg_drv(adapter
))
1095 dev_err(&pdev
->dev
, "pci_alloc_consistent failed\n");
1099 memset(ring_header
->desc
, 0, ring_header
->size
);
1102 tpd_ring
->dma
= ring_header
->dma
;
1103 offset
= (tpd_ring
->dma
& 0x7) ? (8 - (ring_header
->dma
& 0x7)) : 0;
1104 tpd_ring
->dma
+= offset
;
1105 tpd_ring
->desc
= (u8
*) ring_header
->desc
+ offset
;
1106 tpd_ring
->size
= sizeof(struct tx_packet_desc
) * tpd_ring
->count
;
1109 rfd_ring
->dma
= tpd_ring
->dma
+ tpd_ring
->size
;
1110 offset
= (rfd_ring
->dma
& 0x7) ? (8 - (rfd_ring
->dma
& 0x7)) : 0;
1111 rfd_ring
->dma
+= offset
;
1112 rfd_ring
->desc
= (u8
*) tpd_ring
->desc
+ (tpd_ring
->size
+ offset
);
1113 rfd_ring
->size
= sizeof(struct rx_free_desc
) * rfd_ring
->count
;
1117 rrd_ring
->dma
= rfd_ring
->dma
+ rfd_ring
->size
;
1118 offset
= (rrd_ring
->dma
& 0x7) ? (8 - (rrd_ring
->dma
& 0x7)) : 0;
1119 rrd_ring
->dma
+= offset
;
1120 rrd_ring
->desc
= (u8
*) rfd_ring
->desc
+ (rfd_ring
->size
+ offset
);
1121 rrd_ring
->size
= sizeof(struct rx_return_desc
) * rrd_ring
->count
;
1125 adapter
->cmb
.dma
= rrd_ring
->dma
+ rrd_ring
->size
;
1126 offset
= (adapter
->cmb
.dma
& 0x7) ? (8 - (adapter
->cmb
.dma
& 0x7)) : 0;
1127 adapter
->cmb
.dma
+= offset
;
1128 adapter
->cmb
.cmb
= (struct coals_msg_block
*)
1129 ((u8
*) rrd_ring
->desc
+ (rrd_ring
->size
+ offset
));
1132 adapter
->smb
.dma
= adapter
->cmb
.dma
+ sizeof(struct coals_msg_block
);
1133 offset
= (adapter
->smb
.dma
& 0x7) ? (8 - (adapter
->smb
.dma
& 0x7)) : 0;
1134 adapter
->smb
.dma
+= offset
;
1135 adapter
->smb
.smb
= (struct stats_msg_block
*)
1136 ((u8
*) adapter
->cmb
.cmb
+
1137 (sizeof(struct coals_msg_block
) + offset
));
1142 kfree(tpd_ring
->buffer_info
);
1146 static void atl1_init_ring_ptrs(struct atl1_adapter
*adapter
)
1148 struct atl1_tpd_ring
*tpd_ring
= &adapter
->tpd_ring
;
1149 struct atl1_rfd_ring
*rfd_ring
= &adapter
->rfd_ring
;
1150 struct atl1_rrd_ring
*rrd_ring
= &adapter
->rrd_ring
;
1152 atomic_set(&tpd_ring
->next_to_use
, 0);
1153 atomic_set(&tpd_ring
->next_to_clean
, 0);
1155 rfd_ring
->next_to_clean
= 0;
1156 atomic_set(&rfd_ring
->next_to_use
, 0);
1158 rrd_ring
->next_to_use
= 0;
1159 atomic_set(&rrd_ring
->next_to_clean
, 0);
1163 * atl1_clean_rx_ring - Free RFD Buffers
1164 * @adapter: board private structure
1166 static void atl1_clean_rx_ring(struct atl1_adapter
*adapter
)
1168 struct atl1_rfd_ring
*rfd_ring
= &adapter
->rfd_ring
;
1169 struct atl1_rrd_ring
*rrd_ring
= &adapter
->rrd_ring
;
1170 struct atl1_buffer
*buffer_info
;
1171 struct pci_dev
*pdev
= adapter
->pdev
;
1175 /* Free all the Rx ring sk_buffs */
1176 for (i
= 0; i
< rfd_ring
->count
; i
++) {
1177 buffer_info
= &rfd_ring
->buffer_info
[i
];
1178 if (buffer_info
->dma
) {
1179 pci_unmap_page(pdev
, buffer_info
->dma
,
1180 buffer_info
->length
, PCI_DMA_FROMDEVICE
);
1181 buffer_info
->dma
= 0;
1183 if (buffer_info
->skb
) {
1184 dev_kfree_skb(buffer_info
->skb
);
1185 buffer_info
->skb
= NULL
;
1189 size
= sizeof(struct atl1_buffer
) * rfd_ring
->count
;
1190 memset(rfd_ring
->buffer_info
, 0, size
);
1192 /* Zero out the descriptor ring */
1193 memset(rfd_ring
->desc
, 0, rfd_ring
->size
);
1195 rfd_ring
->next_to_clean
= 0;
1196 atomic_set(&rfd_ring
->next_to_use
, 0);
1198 rrd_ring
->next_to_use
= 0;
1199 atomic_set(&rrd_ring
->next_to_clean
, 0);
1203 * atl1_clean_tx_ring - Free Tx Buffers
1204 * @adapter: board private structure
1206 static void atl1_clean_tx_ring(struct atl1_adapter
*adapter
)
1208 struct atl1_tpd_ring
*tpd_ring
= &adapter
->tpd_ring
;
1209 struct atl1_buffer
*buffer_info
;
1210 struct pci_dev
*pdev
= adapter
->pdev
;
1214 /* Free all the Tx ring sk_buffs */
1215 for (i
= 0; i
< tpd_ring
->count
; i
++) {
1216 buffer_info
= &tpd_ring
->buffer_info
[i
];
1217 if (buffer_info
->dma
) {
1218 pci_unmap_page(pdev
, buffer_info
->dma
,
1219 buffer_info
->length
, PCI_DMA_TODEVICE
);
1220 buffer_info
->dma
= 0;
1224 for (i
= 0; i
< tpd_ring
->count
; i
++) {
1225 buffer_info
= &tpd_ring
->buffer_info
[i
];
1226 if (buffer_info
->skb
) {
1227 dev_kfree_skb_any(buffer_info
->skb
);
1228 buffer_info
->skb
= NULL
;
1232 size
= sizeof(struct atl1_buffer
) * tpd_ring
->count
;
1233 memset(tpd_ring
->buffer_info
, 0, size
);
1235 /* Zero out the descriptor ring */
1236 memset(tpd_ring
->desc
, 0, tpd_ring
->size
);
1238 atomic_set(&tpd_ring
->next_to_use
, 0);
1239 atomic_set(&tpd_ring
->next_to_clean
, 0);
1243 * atl1_free_ring_resources - Free Tx / RX descriptor Resources
1244 * @adapter: board private structure
1246 * Free all transmit software resources
1248 static void atl1_free_ring_resources(struct atl1_adapter
*adapter
)
1250 struct pci_dev
*pdev
= adapter
->pdev
;
1251 struct atl1_tpd_ring
*tpd_ring
= &adapter
->tpd_ring
;
1252 struct atl1_rfd_ring
*rfd_ring
= &adapter
->rfd_ring
;
1253 struct atl1_rrd_ring
*rrd_ring
= &adapter
->rrd_ring
;
1254 struct atl1_ring_header
*ring_header
= &adapter
->ring_header
;
1256 atl1_clean_tx_ring(adapter
);
1257 atl1_clean_rx_ring(adapter
);
1259 kfree(tpd_ring
->buffer_info
);
1260 pci_free_consistent(pdev
, ring_header
->size
, ring_header
->desc
,
1263 tpd_ring
->buffer_info
= NULL
;
1264 tpd_ring
->desc
= NULL
;
1267 rfd_ring
->buffer_info
= NULL
;
1268 rfd_ring
->desc
= NULL
;
1271 rrd_ring
->desc
= NULL
;
1275 static void atl1_setup_mac_ctrl(struct atl1_adapter
*adapter
)
1278 struct atl1_hw
*hw
= &adapter
->hw
;
1279 struct net_device
*netdev
= adapter
->netdev
;
1280 /* Config MAC CTRL Register */
1281 value
= MAC_CTRL_TX_EN
| MAC_CTRL_RX_EN
;
1283 if (FULL_DUPLEX
== adapter
->link_duplex
)
1284 value
|= MAC_CTRL_DUPLX
;
1286 value
|= ((u32
) ((SPEED_1000
== adapter
->link_speed
) ?
1287 MAC_CTRL_SPEED_1000
: MAC_CTRL_SPEED_10_100
) <<
1288 MAC_CTRL_SPEED_SHIFT
);
1290 value
|= (MAC_CTRL_TX_FLOW
| MAC_CTRL_RX_FLOW
);
1292 value
|= (MAC_CTRL_ADD_CRC
| MAC_CTRL_PAD
);
1293 /* preamble length */
1294 value
|= (((u32
) adapter
->hw
.preamble_len
1295 & MAC_CTRL_PRMLEN_MASK
) << MAC_CTRL_PRMLEN_SHIFT
);
1298 value
|= MAC_CTRL_RMV_VLAN
;
1300 if (adapter->rx_csum)
1301 value |= MAC_CTRL_RX_CHKSUM_EN;
1304 value
|= MAC_CTRL_BC_EN
;
1305 if (netdev
->flags
& IFF_PROMISC
)
1306 value
|= MAC_CTRL_PROMIS_EN
;
1307 else if (netdev
->flags
& IFF_ALLMULTI
)
1308 value
|= MAC_CTRL_MC_ALL_EN
;
1309 /* value |= MAC_CTRL_LOOPBACK; */
1310 iowrite32(value
, hw
->hw_addr
+ REG_MAC_CTRL
);
1313 static u32
atl1_check_link(struct atl1_adapter
*adapter
)
1315 struct atl1_hw
*hw
= &adapter
->hw
;
1316 struct net_device
*netdev
= adapter
->netdev
;
1318 u16 speed
, duplex
, phy_data
;
1321 /* MII_BMSR must read twice */
1322 atl1_read_phy_reg(hw
, MII_BMSR
, &phy_data
);
1323 atl1_read_phy_reg(hw
, MII_BMSR
, &phy_data
);
1324 if (!(phy_data
& BMSR_LSTATUS
)) {
1326 if (netif_carrier_ok(netdev
)) {
1327 /* old link state: Up */
1328 if (netif_msg_link(adapter
))
1329 dev_info(&adapter
->pdev
->dev
, "link is down\n");
1330 adapter
->link_speed
= SPEED_0
;
1331 netif_carrier_off(netdev
);
1332 netif_stop_queue(netdev
);
1338 ret_val
= atl1_get_speed_and_duplex(hw
, &speed
, &duplex
);
1342 switch (hw
->media_type
) {
1343 case MEDIA_TYPE_1000M_FULL
:
1344 if (speed
!= SPEED_1000
|| duplex
!= FULL_DUPLEX
)
1347 case MEDIA_TYPE_100M_FULL
:
1348 if (speed
!= SPEED_100
|| duplex
!= FULL_DUPLEX
)
1351 case MEDIA_TYPE_100M_HALF
:
1352 if (speed
!= SPEED_100
|| duplex
!= HALF_DUPLEX
)
1355 case MEDIA_TYPE_10M_FULL
:
1356 if (speed
!= SPEED_10
|| duplex
!= FULL_DUPLEX
)
1359 case MEDIA_TYPE_10M_HALF
:
1360 if (speed
!= SPEED_10
|| duplex
!= HALF_DUPLEX
)
1365 /* link result is our setting */
1367 if (adapter
->link_speed
!= speed
1368 || adapter
->link_duplex
!= duplex
) {
1369 adapter
->link_speed
= speed
;
1370 adapter
->link_duplex
= duplex
;
1371 atl1_setup_mac_ctrl(adapter
);
1372 if (netif_msg_link(adapter
))
1373 dev_info(&adapter
->pdev
->dev
,
1374 "%s link is up %d Mbps %s\n",
1375 netdev
->name
, adapter
->link_speed
,
1376 adapter
->link_duplex
== FULL_DUPLEX
?
1377 "full duplex" : "half duplex");
1379 if (!netif_carrier_ok(netdev
)) {
1380 /* Link down -> Up */
1381 netif_carrier_on(netdev
);
1382 netif_wake_queue(netdev
);
1387 /* change original link status */
1388 if (netif_carrier_ok(netdev
)) {
1389 adapter
->link_speed
= SPEED_0
;
1390 netif_carrier_off(netdev
);
1391 netif_stop_queue(netdev
);
1394 if (hw
->media_type
!= MEDIA_TYPE_AUTO_SENSOR
&&
1395 hw
->media_type
!= MEDIA_TYPE_1000M_FULL
) {
1396 switch (hw
->media_type
) {
1397 case MEDIA_TYPE_100M_FULL
:
1398 phy_data
= MII_CR_FULL_DUPLEX
| MII_CR_SPEED_100
|
1401 case MEDIA_TYPE_100M_HALF
:
1402 phy_data
= MII_CR_SPEED_100
| MII_CR_RESET
;
1404 case MEDIA_TYPE_10M_FULL
:
1406 MII_CR_FULL_DUPLEX
| MII_CR_SPEED_10
| MII_CR_RESET
;
1409 /* MEDIA_TYPE_10M_HALF: */
1410 phy_data
= MII_CR_SPEED_10
| MII_CR_RESET
;
1413 atl1_write_phy_reg(hw
, MII_BMCR
, phy_data
);
1417 /* auto-neg, insert timer to re-config phy */
1418 if (!adapter
->phy_timer_pending
) {
1419 adapter
->phy_timer_pending
= true;
1420 mod_timer(&adapter
->phy_config_timer
, jiffies
+ 3 * HZ
);
1426 static void set_flow_ctrl_old(struct atl1_adapter
*adapter
)
1430 /* RFD Flow Control */
1431 value
= adapter
->rfd_ring
.count
;
1437 value
= ((hi
& RXQ_RXF_PAUSE_TH_HI_MASK
) << RXQ_RXF_PAUSE_TH_HI_SHIFT
) |
1438 ((lo
& RXQ_RXF_PAUSE_TH_LO_MASK
) << RXQ_RXF_PAUSE_TH_LO_SHIFT
);
1439 iowrite32(value
, adapter
->hw
.hw_addr
+ REG_RXQ_RXF_PAUSE_THRESH
);
1441 /* RRD Flow Control */
1442 value
= adapter
->rrd_ring
.count
;
1447 value
= ((hi
& RXQ_RRD_PAUSE_TH_HI_MASK
) << RXQ_RRD_PAUSE_TH_HI_SHIFT
) |
1448 ((lo
& RXQ_RRD_PAUSE_TH_LO_MASK
) << RXQ_RRD_PAUSE_TH_LO_SHIFT
);
1449 iowrite32(value
, adapter
->hw
.hw_addr
+ REG_RXQ_RRD_PAUSE_THRESH
);
1452 static void set_flow_ctrl_new(struct atl1_hw
*hw
)
1456 /* RXF Flow Control */
1457 value
= ioread32(hw
->hw_addr
+ REG_SRAM_RXF_LEN
);
1464 value
= ((hi
& RXQ_RXF_PAUSE_TH_HI_MASK
) << RXQ_RXF_PAUSE_TH_HI_SHIFT
) |
1465 ((lo
& RXQ_RXF_PAUSE_TH_LO_MASK
) << RXQ_RXF_PAUSE_TH_LO_SHIFT
);
1466 iowrite32(value
, hw
->hw_addr
+ REG_RXQ_RXF_PAUSE_THRESH
);
1468 /* RRD Flow Control */
1469 value
= ioread32(hw
->hw_addr
+ REG_SRAM_RRD_LEN
);
1476 value
= ((hi
& RXQ_RRD_PAUSE_TH_HI_MASK
) << RXQ_RRD_PAUSE_TH_HI_SHIFT
) |
1477 ((lo
& RXQ_RRD_PAUSE_TH_LO_MASK
) << RXQ_RRD_PAUSE_TH_LO_SHIFT
);
1478 iowrite32(value
, hw
->hw_addr
+ REG_RXQ_RRD_PAUSE_THRESH
);
1482 * atl1_configure - Configure Transmit&Receive Unit after Reset
1483 * @adapter: board private structure
1485 * Configure the Tx /Rx unit of the MAC after a reset.
1487 static u32
atl1_configure(struct atl1_adapter
*adapter
)
1489 struct atl1_hw
*hw
= &adapter
->hw
;
1492 /* clear interrupt status */
1493 iowrite32(0xffffffff, adapter
->hw
.hw_addr
+ REG_ISR
);
1495 /* set MAC Address */
1496 value
= (((u32
) hw
->mac_addr
[2]) << 24) |
1497 (((u32
) hw
->mac_addr
[3]) << 16) |
1498 (((u32
) hw
->mac_addr
[4]) << 8) |
1499 (((u32
) hw
->mac_addr
[5]));
1500 iowrite32(value
, hw
->hw_addr
+ REG_MAC_STA_ADDR
);
1501 value
= (((u32
) hw
->mac_addr
[0]) << 8) | (((u32
) hw
->mac_addr
[1]));
1502 iowrite32(value
, hw
->hw_addr
+ (REG_MAC_STA_ADDR
+ 4));
1506 /* HI base address */
1507 iowrite32((u32
) ((adapter
->tpd_ring
.dma
& 0xffffffff00000000ULL
) >> 32),
1508 hw
->hw_addr
+ REG_DESC_BASE_ADDR_HI
);
1509 /* LO base address */
1510 iowrite32((u32
) (adapter
->rfd_ring
.dma
& 0x00000000ffffffffULL
),
1511 hw
->hw_addr
+ REG_DESC_RFD_ADDR_LO
);
1512 iowrite32((u32
) (adapter
->rrd_ring
.dma
& 0x00000000ffffffffULL
),
1513 hw
->hw_addr
+ REG_DESC_RRD_ADDR_LO
);
1514 iowrite32((u32
) (adapter
->tpd_ring
.dma
& 0x00000000ffffffffULL
),
1515 hw
->hw_addr
+ REG_DESC_TPD_ADDR_LO
);
1516 iowrite32((u32
) (adapter
->cmb
.dma
& 0x00000000ffffffffULL
),
1517 hw
->hw_addr
+ REG_DESC_CMB_ADDR_LO
);
1518 iowrite32((u32
) (adapter
->smb
.dma
& 0x00000000ffffffffULL
),
1519 hw
->hw_addr
+ REG_DESC_SMB_ADDR_LO
);
1522 value
= adapter
->rrd_ring
.count
;
1524 value
+= adapter
->rfd_ring
.count
;
1525 iowrite32(value
, hw
->hw_addr
+ REG_DESC_RFD_RRD_RING_SIZE
);
1526 iowrite32(adapter
->tpd_ring
.count
, hw
->hw_addr
+
1527 REG_DESC_TPD_RING_SIZE
);
1530 iowrite32(1, hw
->hw_addr
+ REG_LOAD_PTR
);
1532 /* config Mailbox */
1533 value
= ((atomic_read(&adapter
->tpd_ring
.next_to_use
)
1534 & MB_TPD_PROD_INDX_MASK
) << MB_TPD_PROD_INDX_SHIFT
) |
1535 ((atomic_read(&adapter
->rrd_ring
.next_to_clean
)
1536 & MB_RRD_CONS_INDX_MASK
) << MB_RRD_CONS_INDX_SHIFT
) |
1537 ((atomic_read(&adapter
->rfd_ring
.next_to_use
)
1538 & MB_RFD_PROD_INDX_MASK
) << MB_RFD_PROD_INDX_SHIFT
);
1539 iowrite32(value
, hw
->hw_addr
+ REG_MAILBOX
);
1541 /* config IPG/IFG */
1542 value
= (((u32
) hw
->ipgt
& MAC_IPG_IFG_IPGT_MASK
)
1543 << MAC_IPG_IFG_IPGT_SHIFT
) |
1544 (((u32
) hw
->min_ifg
& MAC_IPG_IFG_MIFG_MASK
)
1545 << MAC_IPG_IFG_MIFG_SHIFT
) |
1546 (((u32
) hw
->ipgr1
& MAC_IPG_IFG_IPGR1_MASK
)
1547 << MAC_IPG_IFG_IPGR1_SHIFT
) |
1548 (((u32
) hw
->ipgr2
& MAC_IPG_IFG_IPGR2_MASK
)
1549 << MAC_IPG_IFG_IPGR2_SHIFT
);
1550 iowrite32(value
, hw
->hw_addr
+ REG_MAC_IPG_IFG
);
1552 /* config Half-Duplex Control */
1553 value
= ((u32
) hw
->lcol
& MAC_HALF_DUPLX_CTRL_LCOL_MASK
) |
1554 (((u32
) hw
->max_retry
& MAC_HALF_DUPLX_CTRL_RETRY_MASK
)
1555 << MAC_HALF_DUPLX_CTRL_RETRY_SHIFT
) |
1556 MAC_HALF_DUPLX_CTRL_EXC_DEF_EN
|
1557 (0xa << MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT
) |
1558 (((u32
) hw
->jam_ipg
& MAC_HALF_DUPLX_CTRL_JAMIPG_MASK
)
1559 << MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT
);
1560 iowrite32(value
, hw
->hw_addr
+ REG_MAC_HALF_DUPLX_CTRL
);
1562 /* set Interrupt Moderator Timer */
1563 iowrite16(adapter
->imt
, hw
->hw_addr
+ REG_IRQ_MODU_TIMER_INIT
);
1564 iowrite32(MASTER_CTRL_ITIMER_EN
, hw
->hw_addr
+ REG_MASTER_CTRL
);
1566 /* set Interrupt Clear Timer */
1567 iowrite16(adapter
->ict
, hw
->hw_addr
+ REG_CMBDISDMA_TIMER
);
1569 /* set max frame size hw will accept */
1570 iowrite32(hw
->max_frame_size
, hw
->hw_addr
+ REG_MTU
);
1572 /* jumbo size & rrd retirement timer */
1573 value
= (((u32
) hw
->rx_jumbo_th
& RXQ_JMBOSZ_TH_MASK
)
1574 << RXQ_JMBOSZ_TH_SHIFT
) |
1575 (((u32
) hw
->rx_jumbo_lkah
& RXQ_JMBO_LKAH_MASK
)
1576 << RXQ_JMBO_LKAH_SHIFT
) |
1577 (((u32
) hw
->rrd_ret_timer
& RXQ_RRD_TIMER_MASK
)
1578 << RXQ_RRD_TIMER_SHIFT
);
1579 iowrite32(value
, hw
->hw_addr
+ REG_RXQ_JMBOSZ_RRDTIM
);
1582 switch (hw
->dev_rev
) {
1587 set_flow_ctrl_old(adapter
);
1590 set_flow_ctrl_new(hw
);
1595 value
= (((u32
) hw
->tpd_burst
& TXQ_CTRL_TPD_BURST_NUM_MASK
)
1596 << TXQ_CTRL_TPD_BURST_NUM_SHIFT
) |
1597 (((u32
) hw
->txf_burst
& TXQ_CTRL_TXF_BURST_NUM_MASK
)
1598 << TXQ_CTRL_TXF_BURST_NUM_SHIFT
) |
1599 (((u32
) hw
->tpd_fetch_th
& TXQ_CTRL_TPD_FETCH_TH_MASK
)
1600 << TXQ_CTRL_TPD_FETCH_TH_SHIFT
) | TXQ_CTRL_ENH_MODE
|
1602 iowrite32(value
, hw
->hw_addr
+ REG_TXQ_CTRL
);
1604 /* min tpd fetch gap & tx jumbo packet size threshold for taskoffload */
1605 value
= (((u32
) hw
->tx_jumbo_task_th
& TX_JUMBO_TASK_TH_MASK
)
1606 << TX_JUMBO_TASK_TH_SHIFT
) |
1607 (((u32
) hw
->tpd_fetch_gap
& TX_TPD_MIN_IPG_MASK
)
1608 << TX_TPD_MIN_IPG_SHIFT
);
1609 iowrite32(value
, hw
->hw_addr
+ REG_TX_JUMBO_TASK_TH_TPD_IPG
);
1612 value
= (((u32
) hw
->rfd_burst
& RXQ_CTRL_RFD_BURST_NUM_MASK
)
1613 << RXQ_CTRL_RFD_BURST_NUM_SHIFT
) |
1614 (((u32
) hw
->rrd_burst
& RXQ_CTRL_RRD_BURST_THRESH_MASK
)
1615 << RXQ_CTRL_RRD_BURST_THRESH_SHIFT
) |
1616 (((u32
) hw
->rfd_fetch_gap
& RXQ_CTRL_RFD_PREF_MIN_IPG_MASK
)
1617 << RXQ_CTRL_RFD_PREF_MIN_IPG_SHIFT
) | RXQ_CTRL_CUT_THRU_EN
|
1619 iowrite32(value
, hw
->hw_addr
+ REG_RXQ_CTRL
);
1621 /* config DMA Engine */
1622 value
= ((((u32
) hw
->dmar_block
) & DMA_CTRL_DMAR_BURST_LEN_MASK
)
1623 << DMA_CTRL_DMAR_BURST_LEN_SHIFT
) |
1624 ((((u32
) hw
->dmaw_block
) & DMA_CTRL_DMAW_BURST_LEN_MASK
)
1625 << DMA_CTRL_DMAW_BURST_LEN_SHIFT
) | DMA_CTRL_DMAR_EN
|
1627 value
|= (u32
) hw
->dma_ord
;
1628 if (atl1_rcb_128
== hw
->rcb_value
)
1629 value
|= DMA_CTRL_RCB_VALUE
;
1630 iowrite32(value
, hw
->hw_addr
+ REG_DMA_CTRL
);
1632 /* config CMB / SMB */
1633 value
= (hw
->cmb_tpd
> adapter
->tpd_ring
.count
) ?
1634 hw
->cmb_tpd
: adapter
->tpd_ring
.count
;
1636 value
|= hw
->cmb_rrd
;
1637 iowrite32(value
, hw
->hw_addr
+ REG_CMB_WRITE_TH
);
1638 value
= hw
->cmb_rx_timer
| ((u32
) hw
->cmb_tx_timer
<< 16);
1639 iowrite32(value
, hw
->hw_addr
+ REG_CMB_WRITE_TIMER
);
1640 iowrite32(hw
->smb_timer
, hw
->hw_addr
+ REG_SMB_TIMER
);
1642 /* --- enable CMB / SMB */
1643 value
= CSMB_CTRL_CMB_EN
| CSMB_CTRL_SMB_EN
;
1644 iowrite32(value
, hw
->hw_addr
+ REG_CSMB_CTRL
);
1646 value
= ioread32(adapter
->hw
.hw_addr
+ REG_ISR
);
1647 if (unlikely((value
& ISR_PHY_LINKDOWN
) != 0))
1648 value
= 1; /* config failed */
1652 /* clear all interrupt status */
1653 iowrite32(0x3fffffff, adapter
->hw
.hw_addr
+ REG_ISR
);
1654 iowrite32(0, adapter
->hw
.hw_addr
+ REG_ISR
);
1659 * atl1_pcie_patch - Patch for PCIE module
1661 static void atl1_pcie_patch(struct atl1_adapter
*adapter
)
1665 /* much vendor magic here */
1667 iowrite32(value
, adapter
->hw
.hw_addr
+ 0x12FC);
1668 /* pcie flow control mode change */
1669 value
= ioread32(adapter
->hw
.hw_addr
+ 0x1008);
1671 iowrite32(value
, adapter
->hw
.hw_addr
+ 0x1008);
1675 * When ACPI resume on some VIA MotherBoard, the Interrupt Disable bit/0x400
1676 * on PCI Command register is disable.
1677 * The function enable this bit.
1678 * Brackett, 2006/03/15
1680 static void atl1_via_workaround(struct atl1_adapter
*adapter
)
1682 unsigned long value
;
1684 value
= ioread16(adapter
->hw
.hw_addr
+ PCI_COMMAND
);
1685 if (value
& PCI_COMMAND_INTX_DISABLE
)
1686 value
&= ~PCI_COMMAND_INTX_DISABLE
;
1687 iowrite32(value
, adapter
->hw
.hw_addr
+ PCI_COMMAND
);
1690 static void atl1_inc_smb(struct atl1_adapter
*adapter
)
1692 struct stats_msg_block
*smb
= adapter
->smb
.smb
;
1694 /* Fill out the OS statistics structure */
1695 adapter
->soft_stats
.rx_packets
+= smb
->rx_ok
;
1696 adapter
->soft_stats
.tx_packets
+= smb
->tx_ok
;
1697 adapter
->soft_stats
.rx_bytes
+= smb
->rx_byte_cnt
;
1698 adapter
->soft_stats
.tx_bytes
+= smb
->tx_byte_cnt
;
1699 adapter
->soft_stats
.multicast
+= smb
->rx_mcast
;
1700 adapter
->soft_stats
.collisions
+= (smb
->tx_1_col
+ smb
->tx_2_col
* 2 +
1701 smb
->tx_late_col
+ smb
->tx_abort_col
* adapter
->hw
.max_retry
);
1704 adapter
->soft_stats
.rx_errors
+= (smb
->rx_frag
+ smb
->rx_fcs_err
+
1705 smb
->rx_len_err
+ smb
->rx_sz_ov
+ smb
->rx_rxf_ov
+
1706 smb
->rx_rrd_ov
+ smb
->rx_align_err
);
1707 adapter
->soft_stats
.rx_fifo_errors
+= smb
->rx_rxf_ov
;
1708 adapter
->soft_stats
.rx_length_errors
+= smb
->rx_len_err
;
1709 adapter
->soft_stats
.rx_crc_errors
+= smb
->rx_fcs_err
;
1710 adapter
->soft_stats
.rx_frame_errors
+= smb
->rx_align_err
;
1711 adapter
->soft_stats
.rx_missed_errors
+= (smb
->rx_rrd_ov
+
1714 adapter
->soft_stats
.rx_pause
+= smb
->rx_pause
;
1715 adapter
->soft_stats
.rx_rrd_ov
+= smb
->rx_rrd_ov
;
1716 adapter
->soft_stats
.rx_trunc
+= smb
->rx_sz_ov
;
1719 adapter
->soft_stats
.tx_errors
+= (smb
->tx_late_col
+
1720 smb
->tx_abort_col
+ smb
->tx_underrun
+ smb
->tx_trunc
);
1721 adapter
->soft_stats
.tx_fifo_errors
+= smb
->tx_underrun
;
1722 adapter
->soft_stats
.tx_aborted_errors
+= smb
->tx_abort_col
;
1723 adapter
->soft_stats
.tx_window_errors
+= smb
->tx_late_col
;
1725 adapter
->soft_stats
.excecol
+= smb
->tx_abort_col
;
1726 adapter
->soft_stats
.deffer
+= smb
->tx_defer
;
1727 adapter
->soft_stats
.scc
+= smb
->tx_1_col
;
1728 adapter
->soft_stats
.mcc
+= smb
->tx_2_col
;
1729 adapter
->soft_stats
.latecol
+= smb
->tx_late_col
;
1730 adapter
->soft_stats
.tx_underun
+= smb
->tx_underrun
;
1731 adapter
->soft_stats
.tx_trunc
+= smb
->tx_trunc
;
1732 adapter
->soft_stats
.tx_pause
+= smb
->tx_pause
;
1734 adapter
->net_stats
.rx_packets
= adapter
->soft_stats
.rx_packets
;
1735 adapter
->net_stats
.tx_packets
= adapter
->soft_stats
.tx_packets
;
1736 adapter
->net_stats
.rx_bytes
= adapter
->soft_stats
.rx_bytes
;
1737 adapter
->net_stats
.tx_bytes
= adapter
->soft_stats
.tx_bytes
;
1738 adapter
->net_stats
.multicast
= adapter
->soft_stats
.multicast
;
1739 adapter
->net_stats
.collisions
= adapter
->soft_stats
.collisions
;
1740 adapter
->net_stats
.rx_errors
= adapter
->soft_stats
.rx_errors
;
1741 adapter
->net_stats
.rx_over_errors
=
1742 adapter
->soft_stats
.rx_missed_errors
;
1743 adapter
->net_stats
.rx_length_errors
=
1744 adapter
->soft_stats
.rx_length_errors
;
1745 adapter
->net_stats
.rx_crc_errors
= adapter
->soft_stats
.rx_crc_errors
;
1746 adapter
->net_stats
.rx_frame_errors
=
1747 adapter
->soft_stats
.rx_frame_errors
;
1748 adapter
->net_stats
.rx_fifo_errors
= adapter
->soft_stats
.rx_fifo_errors
;
1749 adapter
->net_stats
.rx_missed_errors
=
1750 adapter
->soft_stats
.rx_missed_errors
;
1751 adapter
->net_stats
.tx_errors
= adapter
->soft_stats
.tx_errors
;
1752 adapter
->net_stats
.tx_fifo_errors
= adapter
->soft_stats
.tx_fifo_errors
;
1753 adapter
->net_stats
.tx_aborted_errors
=
1754 adapter
->soft_stats
.tx_aborted_errors
;
1755 adapter
->net_stats
.tx_window_errors
=
1756 adapter
->soft_stats
.tx_window_errors
;
1757 adapter
->net_stats
.tx_carrier_errors
=
1758 adapter
->soft_stats
.tx_carrier_errors
;
1761 static void atl1_update_mailbox(struct atl1_adapter
*adapter
)
1763 unsigned long flags
;
1764 u32 tpd_next_to_use
;
1765 u32 rfd_next_to_use
;
1766 u32 rrd_next_to_clean
;
1769 spin_lock_irqsave(&adapter
->mb_lock
, flags
);
1771 tpd_next_to_use
= atomic_read(&adapter
->tpd_ring
.next_to_use
);
1772 rfd_next_to_use
= atomic_read(&adapter
->rfd_ring
.next_to_use
);
1773 rrd_next_to_clean
= atomic_read(&adapter
->rrd_ring
.next_to_clean
);
1775 value
= ((rfd_next_to_use
& MB_RFD_PROD_INDX_MASK
) <<
1776 MB_RFD_PROD_INDX_SHIFT
) |
1777 ((rrd_next_to_clean
& MB_RRD_CONS_INDX_MASK
) <<
1778 MB_RRD_CONS_INDX_SHIFT
) |
1779 ((tpd_next_to_use
& MB_TPD_PROD_INDX_MASK
) <<
1780 MB_TPD_PROD_INDX_SHIFT
);
1781 iowrite32(value
, adapter
->hw
.hw_addr
+ REG_MAILBOX
);
1783 spin_unlock_irqrestore(&adapter
->mb_lock
, flags
);
1786 static void atl1_clean_alloc_flag(struct atl1_adapter
*adapter
,
1787 struct rx_return_desc
*rrd
, u16 offset
)
1789 struct atl1_rfd_ring
*rfd_ring
= &adapter
->rfd_ring
;
1791 while (rfd_ring
->next_to_clean
!= (rrd
->buf_indx
+ offset
)) {
1792 rfd_ring
->buffer_info
[rfd_ring
->next_to_clean
].alloced
= 0;
1793 if (++rfd_ring
->next_to_clean
== rfd_ring
->count
) {
1794 rfd_ring
->next_to_clean
= 0;
1799 static void atl1_update_rfd_index(struct atl1_adapter
*adapter
,
1800 struct rx_return_desc
*rrd
)
1804 num_buf
= (rrd
->xsz
.xsum_sz
.pkt_size
+ adapter
->rx_buffer_len
- 1) /
1805 adapter
->rx_buffer_len
;
1806 if (rrd
->num_buf
== num_buf
)
1807 /* clean alloc flag for bad rrd */
1808 atl1_clean_alloc_flag(adapter
, rrd
, num_buf
);
1811 static void atl1_rx_checksum(struct atl1_adapter
*adapter
,
1812 struct rx_return_desc
*rrd
, struct sk_buff
*skb
)
1814 struct pci_dev
*pdev
= adapter
->pdev
;
1816 skb
->ip_summed
= CHECKSUM_NONE
;
1818 if (unlikely(rrd
->pkt_flg
& PACKET_FLAG_ERR
)) {
1819 if (rrd
->err_flg
& (ERR_FLAG_CRC
| ERR_FLAG_TRUNC
|
1820 ERR_FLAG_CODE
| ERR_FLAG_OV
)) {
1821 adapter
->hw_csum_err
++;
1822 if (netif_msg_rx_err(adapter
))
1823 dev_printk(KERN_DEBUG
, &pdev
->dev
,
1824 "rx checksum error\n");
1830 if (!(rrd
->pkt_flg
& PACKET_FLAG_IPV4
))
1831 /* checksum is invalid, but it's not an IPv4 pkt, so ok */
1835 if (likely(!(rrd
->err_flg
&
1836 (ERR_FLAG_IP_CHKSUM
| ERR_FLAG_L4_CHKSUM
)))) {
1837 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
1838 adapter
->hw_csum_good
++;
1842 /* IPv4, but hardware thinks its checksum is wrong */
1843 if (netif_msg_rx_err(adapter
))
1844 dev_printk(KERN_DEBUG
, &pdev
->dev
,
1845 "hw csum wrong, pkt_flag:%x, err_flag:%x\n",
1846 rrd
->pkt_flg
, rrd
->err_flg
);
1847 skb
->ip_summed
= CHECKSUM_COMPLETE
;
1848 skb
->csum
= htons(rrd
->xsz
.xsum_sz
.rx_chksum
);
1849 adapter
->hw_csum_err
++;
1854 * atl1_alloc_rx_buffers - Replace used receive buffers
1855 * @adapter: address of board private structure
1857 static u16
atl1_alloc_rx_buffers(struct atl1_adapter
*adapter
)
1859 struct atl1_rfd_ring
*rfd_ring
= &adapter
->rfd_ring
;
1860 struct pci_dev
*pdev
= adapter
->pdev
;
1862 unsigned long offset
;
1863 struct atl1_buffer
*buffer_info
, *next_info
;
1864 struct sk_buff
*skb
;
1866 u16 rfd_next_to_use
, next_next
;
1867 struct rx_free_desc
*rfd_desc
;
1869 next_next
= rfd_next_to_use
= atomic_read(&rfd_ring
->next_to_use
);
1870 if (++next_next
== rfd_ring
->count
)
1872 buffer_info
= &rfd_ring
->buffer_info
[rfd_next_to_use
];
1873 next_info
= &rfd_ring
->buffer_info
[next_next
];
1875 while (!buffer_info
->alloced
&& !next_info
->alloced
) {
1876 if (buffer_info
->skb
) {
1877 buffer_info
->alloced
= 1;
1881 rfd_desc
= ATL1_RFD_DESC(rfd_ring
, rfd_next_to_use
);
1883 skb
= dev_alloc_skb(adapter
->rx_buffer_len
+ NET_IP_ALIGN
);
1884 if (unlikely(!skb
)) {
1885 /* Better luck next round */
1886 adapter
->net_stats
.rx_dropped
++;
1891 * Make buffer alignment 2 beyond a 16 byte boundary
1892 * this will result in a 16 byte aligned IP header after
1893 * the 14 byte MAC header is removed
1895 skb_reserve(skb
, NET_IP_ALIGN
);
1897 buffer_info
->alloced
= 1;
1898 buffer_info
->skb
= skb
;
1899 buffer_info
->length
= (u16
) adapter
->rx_buffer_len
;
1900 page
= virt_to_page(skb
->data
);
1901 offset
= (unsigned long)skb
->data
& ~PAGE_MASK
;
1902 buffer_info
->dma
= pci_map_page(pdev
, page
, offset
,
1903 adapter
->rx_buffer_len
,
1904 PCI_DMA_FROMDEVICE
);
1905 rfd_desc
->buffer_addr
= cpu_to_le64(buffer_info
->dma
);
1906 rfd_desc
->buf_len
= cpu_to_le16(adapter
->rx_buffer_len
);
1907 rfd_desc
->coalese
= 0;
1910 rfd_next_to_use
= next_next
;
1911 if (unlikely(++next_next
== rfd_ring
->count
))
1914 buffer_info
= &rfd_ring
->buffer_info
[rfd_next_to_use
];
1915 next_info
= &rfd_ring
->buffer_info
[next_next
];
1921 * Force memory writes to complete before letting h/w
1922 * know there are new descriptors to fetch. (Only
1923 * applicable for weak-ordered memory model archs,
1927 atomic_set(&rfd_ring
->next_to_use
, (int)rfd_next_to_use
);
1932 static void atl1_intr_rx(struct atl1_adapter
*adapter
)
1936 u16 rrd_next_to_clean
;
1938 struct atl1_rfd_ring
*rfd_ring
= &adapter
->rfd_ring
;
1939 struct atl1_rrd_ring
*rrd_ring
= &adapter
->rrd_ring
;
1940 struct atl1_buffer
*buffer_info
;
1941 struct rx_return_desc
*rrd
;
1942 struct sk_buff
*skb
;
1946 rrd_next_to_clean
= atomic_read(&rrd_ring
->next_to_clean
);
1949 rrd
= ATL1_RRD_DESC(rrd_ring
, rrd_next_to_clean
);
1951 if (likely(rrd
->xsz
.valid
)) { /* packet valid */
1953 /* check rrd status */
1954 if (likely(rrd
->num_buf
== 1))
1956 else if (netif_msg_rx_err(adapter
)) {
1957 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
1958 "unexpected RRD buffer count\n");
1959 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
1960 "rx_buf_len = %d\n",
1961 adapter
->rx_buffer_len
);
1962 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
1963 "RRD num_buf = %d\n",
1965 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
1966 "RRD pkt_len = %d\n",
1967 rrd
->xsz
.xsum_sz
.pkt_size
);
1968 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
1969 "RRD pkt_flg = 0x%08X\n",
1971 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
1972 "RRD err_flg = 0x%08X\n",
1974 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
1975 "RRD vlan_tag = 0x%08X\n",
1979 /* rrd seems to be bad */
1980 if (unlikely(i
-- > 0)) {
1981 /* rrd may not be DMAed completely */
1986 if (netif_msg_rx_err(adapter
))
1987 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
1989 /* see if update RFD index */
1990 if (rrd
->num_buf
> 1)
1991 atl1_update_rfd_index(adapter
, rrd
);
1995 if (++rrd_next_to_clean
== rrd_ring
->count
)
1996 rrd_next_to_clean
= 0;
1999 } else { /* current rrd still not be updated */
2004 /* clean alloc flag for bad rrd */
2005 atl1_clean_alloc_flag(adapter
, rrd
, 0);
2007 buffer_info
= &rfd_ring
->buffer_info
[rrd
->buf_indx
];
2008 if (++rfd_ring
->next_to_clean
== rfd_ring
->count
)
2009 rfd_ring
->next_to_clean
= 0;
2011 /* update rrd next to clean */
2012 if (++rrd_next_to_clean
== rrd_ring
->count
)
2013 rrd_next_to_clean
= 0;
2016 if (unlikely(rrd
->pkt_flg
& PACKET_FLAG_ERR
)) {
2017 if (!(rrd
->err_flg
&
2018 (ERR_FLAG_IP_CHKSUM
| ERR_FLAG_L4_CHKSUM
2020 /* packet error, don't need upstream */
2021 buffer_info
->alloced
= 0;
2028 pci_unmap_page(adapter
->pdev
, buffer_info
->dma
,
2029 buffer_info
->length
, PCI_DMA_FROMDEVICE
);
2030 skb
= buffer_info
->skb
;
2031 length
= le16_to_cpu(rrd
->xsz
.xsum_sz
.pkt_size
);
2033 skb_put(skb
, length
- ETH_FCS_LEN
);
2035 /* Receive Checksum Offload */
2036 atl1_rx_checksum(adapter
, rrd
, skb
);
2037 skb
->protocol
= eth_type_trans(skb
, adapter
->netdev
);
2039 if (adapter
->vlgrp
&& (rrd
->pkt_flg
& PACKET_FLAG_VLAN_INS
)) {
2040 u16 vlan_tag
= (rrd
->vlan_tag
>> 4) |
2041 ((rrd
->vlan_tag
& 7) << 13) |
2042 ((rrd
->vlan_tag
& 8) << 9);
2043 vlan_hwaccel_rx(skb
, adapter
->vlgrp
, vlan_tag
);
2047 /* let protocol layer free skb */
2048 buffer_info
->skb
= NULL
;
2049 buffer_info
->alloced
= 0;
2052 adapter
->netdev
->last_rx
= jiffies
;
2055 atomic_set(&rrd_ring
->next_to_clean
, rrd_next_to_clean
);
2057 atl1_alloc_rx_buffers(adapter
);
2059 /* update mailbox ? */
2061 u32 tpd_next_to_use
;
2062 u32 rfd_next_to_use
;
2064 spin_lock(&adapter
->mb_lock
);
2066 tpd_next_to_use
= atomic_read(&adapter
->tpd_ring
.next_to_use
);
2068 atomic_read(&adapter
->rfd_ring
.next_to_use
);
2070 atomic_read(&adapter
->rrd_ring
.next_to_clean
);
2071 value
= ((rfd_next_to_use
& MB_RFD_PROD_INDX_MASK
) <<
2072 MB_RFD_PROD_INDX_SHIFT
) |
2073 ((rrd_next_to_clean
& MB_RRD_CONS_INDX_MASK
) <<
2074 MB_RRD_CONS_INDX_SHIFT
) |
2075 ((tpd_next_to_use
& MB_TPD_PROD_INDX_MASK
) <<
2076 MB_TPD_PROD_INDX_SHIFT
);
2077 iowrite32(value
, adapter
->hw
.hw_addr
+ REG_MAILBOX
);
2078 spin_unlock(&adapter
->mb_lock
);
2082 static void atl1_intr_tx(struct atl1_adapter
*adapter
)
2084 struct atl1_tpd_ring
*tpd_ring
= &adapter
->tpd_ring
;
2085 struct atl1_buffer
*buffer_info
;
2086 u16 sw_tpd_next_to_clean
;
2087 u16 cmb_tpd_next_to_clean
;
2089 sw_tpd_next_to_clean
= atomic_read(&tpd_ring
->next_to_clean
);
2090 cmb_tpd_next_to_clean
= le16_to_cpu(adapter
->cmb
.cmb
->tpd_cons_idx
);
2092 while (cmb_tpd_next_to_clean
!= sw_tpd_next_to_clean
) {
2093 struct tx_packet_desc
*tpd
;
2095 tpd
= ATL1_TPD_DESC(tpd_ring
, sw_tpd_next_to_clean
);
2096 buffer_info
= &tpd_ring
->buffer_info
[sw_tpd_next_to_clean
];
2097 if (buffer_info
->dma
) {
2098 pci_unmap_page(adapter
->pdev
, buffer_info
->dma
,
2099 buffer_info
->length
, PCI_DMA_TODEVICE
);
2100 buffer_info
->dma
= 0;
2103 if (buffer_info
->skb
) {
2104 dev_kfree_skb_irq(buffer_info
->skb
);
2105 buffer_info
->skb
= NULL
;
2108 if (++sw_tpd_next_to_clean
== tpd_ring
->count
)
2109 sw_tpd_next_to_clean
= 0;
2111 atomic_set(&tpd_ring
->next_to_clean
, sw_tpd_next_to_clean
);
2113 if (netif_queue_stopped(adapter
->netdev
)
2114 && netif_carrier_ok(adapter
->netdev
))
2115 netif_wake_queue(adapter
->netdev
);
2118 static u16
atl1_tpd_avail(struct atl1_tpd_ring
*tpd_ring
)
2120 u16 next_to_clean
= atomic_read(&tpd_ring
->next_to_clean
);
2121 u16 next_to_use
= atomic_read(&tpd_ring
->next_to_use
);
2122 return ((next_to_clean
> next_to_use
) ?
2123 next_to_clean
- next_to_use
- 1 :
2124 tpd_ring
->count
+ next_to_clean
- next_to_use
- 1);
2127 static int atl1_tso(struct atl1_adapter
*adapter
, struct sk_buff
*skb
,
2128 struct tx_packet_desc
*ptpd
)
2135 if (skb_shinfo(skb
)->gso_size
) {
2136 if (skb_header_cloned(skb
)) {
2137 err
= pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
);
2142 if (skb
->protocol
== ntohs(ETH_P_IP
)) {
2143 struct iphdr
*iph
= ip_hdr(skb
);
2145 real_len
= (((unsigned char *)iph
- skb
->data
) +
2146 ntohs(iph
->tot_len
));
2147 if (real_len
< skb
->len
)
2148 pskb_trim(skb
, real_len
);
2149 hdr_len
= (skb_transport_offset(skb
) + tcp_hdrlen(skb
));
2150 if (skb
->len
== hdr_len
) {
2152 tcp_hdr(skb
)->check
=
2153 ~csum_tcpudp_magic(iph
->saddr
,
2154 iph
->daddr
, tcp_hdrlen(skb
),
2156 ptpd
->word3
|= (iph
->ihl
& TPD_IPHL_MASK
) <<
2158 ptpd
->word3
|= ((tcp_hdrlen(skb
) >> 2) &
2159 TPD_TCPHDRLEN_MASK
) <<
2160 TPD_TCPHDRLEN_SHIFT
;
2161 ptpd
->word3
|= 1 << TPD_IP_CSUM_SHIFT
;
2162 ptpd
->word3
|= 1 << TPD_TCP_CSUM_SHIFT
;
2167 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
2168 iph
->daddr
, 0, IPPROTO_TCP
, 0);
2169 ip_off
= (unsigned char *)iph
-
2170 (unsigned char *) skb_network_header(skb
);
2171 if (ip_off
== 8) /* 802.3-SNAP frame */
2172 ptpd
->word3
|= 1 << TPD_ETHTYPE_SHIFT
;
2173 else if (ip_off
!= 0)
2176 ptpd
->word3
|= (iph
->ihl
& TPD_IPHL_MASK
) <<
2178 ptpd
->word3
|= ((tcp_hdrlen(skb
) >> 2) &
2179 TPD_TCPHDRLEN_MASK
) << TPD_TCPHDRLEN_SHIFT
;
2180 ptpd
->word3
|= (skb_shinfo(skb
)->gso_size
&
2181 TPD_MSS_MASK
) << TPD_MSS_SHIFT
;
2182 ptpd
->word3
|= 1 << TPD_SEGMENT_EN_SHIFT
;
2189 static int atl1_tx_csum(struct atl1_adapter
*adapter
, struct sk_buff
*skb
,
2190 struct tx_packet_desc
*ptpd
)
2194 if (likely(skb
->ip_summed
== CHECKSUM_PARTIAL
)) {
2195 css
= (u8
) (skb
->csum_start
- skb_headroom(skb
));
2196 cso
= css
+ (u8
) skb
->csum_offset
;
2197 if (unlikely(css
& 0x1)) {
2198 /* L1 hardware requires an even number here */
2199 if (netif_msg_tx_err(adapter
))
2200 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
2201 "payload offset not an even number\n");
2204 ptpd
->word3
|= (css
& TPD_PLOADOFFSET_MASK
) <<
2205 TPD_PLOADOFFSET_SHIFT
;
2206 ptpd
->word3
|= (cso
& TPD_CCSUMOFFSET_MASK
) <<
2207 TPD_CCSUMOFFSET_SHIFT
;
2208 ptpd
->word3
|= 1 << TPD_CUST_CSUM_EN_SHIFT
;
2214 static void atl1_tx_map(struct atl1_adapter
*adapter
, struct sk_buff
*skb
,
2215 struct tx_packet_desc
*ptpd
)
2218 struct atl1_tpd_ring
*tpd_ring
= &adapter
->tpd_ring
;
2219 struct atl1_buffer
*buffer_info
;
2220 u16 buf_len
= skb
->len
;
2222 unsigned long offset
;
2223 unsigned int nr_frags
;
2230 buf_len
-= skb
->data_len
;
2231 nr_frags
= skb_shinfo(skb
)->nr_frags
;
2232 next_to_use
= atomic_read(&tpd_ring
->next_to_use
);
2233 buffer_info
= &tpd_ring
->buffer_info
[next_to_use
];
2234 if (unlikely(buffer_info
->skb
))
2236 /* put skb in last TPD */
2237 buffer_info
->skb
= NULL
;
2239 retval
= (ptpd
->word3
>> TPD_SEGMENT_EN_SHIFT
) & TPD_SEGMENT_EN_MASK
;
2242 hdr_len
= skb_transport_offset(skb
) + tcp_hdrlen(skb
);
2243 buffer_info
->length
= hdr_len
;
2244 page
= virt_to_page(skb
->data
);
2245 offset
= (unsigned long)skb
->data
& ~PAGE_MASK
;
2246 buffer_info
->dma
= pci_map_page(adapter
->pdev
, page
,
2250 if (++next_to_use
== tpd_ring
->count
)
2253 if (buf_len
> hdr_len
) {
2256 data_len
= buf_len
- hdr_len
;
2257 nseg
= (data_len
+ ATL1_MAX_TX_BUF_LEN
- 1) /
2258 ATL1_MAX_TX_BUF_LEN
;
2259 for (i
= 0; i
< nseg
; i
++) {
2261 &tpd_ring
->buffer_info
[next_to_use
];
2262 buffer_info
->skb
= NULL
;
2263 buffer_info
->length
=
2264 (ATL1_MAX_TX_BUF_LEN
>=
2265 data_len
) ? ATL1_MAX_TX_BUF_LEN
: data_len
;
2266 data_len
-= buffer_info
->length
;
2267 page
= virt_to_page(skb
->data
+
2268 (hdr_len
+ i
* ATL1_MAX_TX_BUF_LEN
));
2269 offset
= (unsigned long)(skb
->data
+
2270 (hdr_len
+ i
* ATL1_MAX_TX_BUF_LEN
)) &
2272 buffer_info
->dma
= pci_map_page(adapter
->pdev
,
2273 page
, offset
, buffer_info
->length
,
2275 if (++next_to_use
== tpd_ring
->count
)
2281 buffer_info
->length
= buf_len
;
2282 page
= virt_to_page(skb
->data
);
2283 offset
= (unsigned long)skb
->data
& ~PAGE_MASK
;
2284 buffer_info
->dma
= pci_map_page(adapter
->pdev
, page
,
2285 offset
, buf_len
, PCI_DMA_TODEVICE
);
2286 if (++next_to_use
== tpd_ring
->count
)
2290 for (f
= 0; f
< nr_frags
; f
++) {
2291 struct skb_frag_struct
*frag
;
2294 frag
= &skb_shinfo(skb
)->frags
[f
];
2295 buf_len
= frag
->size
;
2297 nseg
= (buf_len
+ ATL1_MAX_TX_BUF_LEN
- 1) /
2298 ATL1_MAX_TX_BUF_LEN
;
2299 for (i
= 0; i
< nseg
; i
++) {
2300 buffer_info
= &tpd_ring
->buffer_info
[next_to_use
];
2301 if (unlikely(buffer_info
->skb
))
2303 buffer_info
->skb
= NULL
;
2304 buffer_info
->length
= (buf_len
> ATL1_MAX_TX_BUF_LEN
) ?
2305 ATL1_MAX_TX_BUF_LEN
: buf_len
;
2306 buf_len
-= buffer_info
->length
;
2307 buffer_info
->dma
= pci_map_page(adapter
->pdev
,
2309 frag
->page_offset
+ (i
* ATL1_MAX_TX_BUF_LEN
),
2310 buffer_info
->length
, PCI_DMA_TODEVICE
);
2312 if (++next_to_use
== tpd_ring
->count
)
2317 /* last tpd's buffer-info */
2318 buffer_info
->skb
= skb
;
2321 static void atl1_tx_queue(struct atl1_adapter
*adapter
, u16 count
,
2322 struct tx_packet_desc
*ptpd
)
2325 struct atl1_tpd_ring
*tpd_ring
= &adapter
->tpd_ring
;
2326 struct atl1_buffer
*buffer_info
;
2327 struct tx_packet_desc
*tpd
;
2330 u16 next_to_use
= (u16
) atomic_read(&tpd_ring
->next_to_use
);
2332 for (j
= 0; j
< count
; j
++) {
2333 buffer_info
= &tpd_ring
->buffer_info
[next_to_use
];
2334 tpd
= ATL1_TPD_DESC(&adapter
->tpd_ring
, next_to_use
);
2336 memcpy(tpd
, ptpd
, sizeof(struct tx_packet_desc
));
2337 tpd
->buffer_addr
= cpu_to_le64(buffer_info
->dma
);
2338 tpd
->word2
= (cpu_to_le16(buffer_info
->length
) &
2339 TPD_BUFLEN_MASK
) << TPD_BUFLEN_SHIFT
;
2342 * if this is the first packet in a TSO chain, set
2343 * TPD_HDRFLAG, otherwise, clear it.
2345 val
= (tpd
->word3
>> TPD_SEGMENT_EN_SHIFT
) &
2346 TPD_SEGMENT_EN_MASK
;
2349 tpd
->word3
|= 1 << TPD_HDRFLAG_SHIFT
;
2351 tpd
->word3
&= ~(1 << TPD_HDRFLAG_SHIFT
);
2354 if (j
== (count
- 1))
2355 tpd
->word3
|= 1 << TPD_EOP_SHIFT
;
2357 if (++next_to_use
== tpd_ring
->count
)
2361 * Force memory writes to complete before letting h/w
2362 * know there are new descriptors to fetch. (Only
2363 * applicable for weak-ordered memory model archs,
2368 atomic_set(&tpd_ring
->next_to_use
, next_to_use
);
2371 static int atl1_xmit_frame(struct sk_buff
*skb
, struct net_device
*netdev
)
2373 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
2374 struct atl1_tpd_ring
*tpd_ring
= &adapter
->tpd_ring
;
2379 struct tx_packet_desc
*ptpd
;
2382 unsigned long flags
;
2383 unsigned int nr_frags
= 0;
2384 unsigned int mss
= 0;
2386 unsigned int proto_hdr_len
;
2388 len
-= skb
->data_len
;
2390 if (unlikely(skb
->len
<= 0)) {
2391 dev_kfree_skb_any(skb
);
2392 return NETDEV_TX_OK
;
2395 nr_frags
= skb_shinfo(skb
)->nr_frags
;
2396 for (f
= 0; f
< nr_frags
; f
++) {
2397 frag_size
= skb_shinfo(skb
)->frags
[f
].size
;
2399 count
+= (frag_size
+ ATL1_MAX_TX_BUF_LEN
- 1) /
2400 ATL1_MAX_TX_BUF_LEN
;
2403 mss
= skb_shinfo(skb
)->gso_size
;
2405 if (skb
->protocol
== ntohs(ETH_P_IP
)) {
2406 proto_hdr_len
= (skb_transport_offset(skb
) +
2408 if (unlikely(proto_hdr_len
> len
)) {
2409 dev_kfree_skb_any(skb
);
2410 return NETDEV_TX_OK
;
2412 /* need additional TPD ? */
2413 if (proto_hdr_len
!= len
)
2414 count
+= (len
- proto_hdr_len
+
2415 ATL1_MAX_TX_BUF_LEN
- 1) /
2416 ATL1_MAX_TX_BUF_LEN
;
2420 if (!spin_trylock_irqsave(&adapter
->lock
, flags
)) {
2421 /* Can't get lock - tell upper layer to requeue */
2422 if (netif_msg_tx_queued(adapter
))
2423 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
2425 return NETDEV_TX_LOCKED
;
2428 if (atl1_tpd_avail(&adapter
->tpd_ring
) < count
) {
2429 /* not enough descriptors */
2430 netif_stop_queue(netdev
);
2431 spin_unlock_irqrestore(&adapter
->lock
, flags
);
2432 if (netif_msg_tx_queued(adapter
))
2433 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
2435 return NETDEV_TX_BUSY
;
2438 ptpd
= ATL1_TPD_DESC(tpd_ring
,
2439 (u16
) atomic_read(&tpd_ring
->next_to_use
));
2440 memset(ptpd
, 0, sizeof(struct tx_packet_desc
));
2442 if (adapter
->vlgrp
&& vlan_tx_tag_present(skb
)) {
2443 vlan_tag
= vlan_tx_tag_get(skb
);
2444 vlan_tag
= (vlan_tag
<< 4) | (vlan_tag
>> 13) |
2445 ((vlan_tag
>> 9) & 0x8);
2446 ptpd
->word3
|= 1 << TPD_INS_VL_TAG_SHIFT
;
2447 ptpd
->word3
|= (vlan_tag
& TPD_VL_TAGGED_MASK
) <<
2448 TPD_VL_TAGGED_SHIFT
;
2451 tso
= atl1_tso(adapter
, skb
, ptpd
);
2453 spin_unlock_irqrestore(&adapter
->lock
, flags
);
2454 dev_kfree_skb_any(skb
);
2455 return NETDEV_TX_OK
;
2459 ret_val
= atl1_tx_csum(adapter
, skb
, ptpd
);
2461 spin_unlock_irqrestore(&adapter
->lock
, flags
);
2462 dev_kfree_skb_any(skb
);
2463 return NETDEV_TX_OK
;
2467 atl1_tx_map(adapter
, skb
, ptpd
);
2468 atl1_tx_queue(adapter
, count
, ptpd
);
2469 atl1_update_mailbox(adapter
);
2470 spin_unlock_irqrestore(&adapter
->lock
, flags
);
2471 netdev
->trans_start
= jiffies
;
2472 return NETDEV_TX_OK
;
2476 * atl1_intr - Interrupt Handler
2477 * @irq: interrupt number
2478 * @data: pointer to a network interface device structure
2479 * @pt_regs: CPU registers structure
2481 static irqreturn_t
atl1_intr(int irq
, void *data
)
2483 struct atl1_adapter
*adapter
= netdev_priv(data
);
2487 status
= adapter
->cmb
.cmb
->int_stats
;
2492 /* clear CMB interrupt status at once */
2493 adapter
->cmb
.cmb
->int_stats
= 0;
2495 if (status
& ISR_GPHY
) /* clear phy status */
2496 atlx_clear_phy_int(adapter
);
2498 /* clear ISR status, and Enable CMB DMA/Disable Interrupt */
2499 iowrite32(status
| ISR_DIS_INT
, adapter
->hw
.hw_addr
+ REG_ISR
);
2501 /* check if SMB intr */
2502 if (status
& ISR_SMB
)
2503 atl1_inc_smb(adapter
);
2505 /* check if PCIE PHY Link down */
2506 if (status
& ISR_PHY_LINKDOWN
) {
2507 if (netif_msg_intr(adapter
))
2508 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
2509 "pcie phy link down %x\n", status
);
2510 if (netif_running(adapter
->netdev
)) { /* reset MAC */
2511 iowrite32(0, adapter
->hw
.hw_addr
+ REG_IMR
);
2512 schedule_work(&adapter
->pcie_dma_to_rst_task
);
2517 /* check if DMA read/write error ? */
2518 if (status
& (ISR_DMAR_TO_RST
| ISR_DMAW_TO_RST
)) {
2519 if (netif_msg_intr(adapter
))
2520 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
2521 "pcie DMA r/w error (status = 0x%x)\n",
2523 iowrite32(0, adapter
->hw
.hw_addr
+ REG_IMR
);
2524 schedule_work(&adapter
->pcie_dma_to_rst_task
);
2529 if (status
& ISR_GPHY
) {
2530 adapter
->soft_stats
.tx_carrier_errors
++;
2531 atl1_check_for_link(adapter
);
2534 /* transmit event */
2535 if (status
& ISR_CMB_TX
)
2536 atl1_intr_tx(adapter
);
2539 if (unlikely(status
& (ISR_RXF_OV
| ISR_RFD_UNRUN
|
2540 ISR_RRD_OV
| ISR_HOST_RFD_UNRUN
|
2541 ISR_HOST_RRD_OV
| ISR_CMB_RX
))) {
2542 if (status
& (ISR_RXF_OV
| ISR_RFD_UNRUN
|
2543 ISR_RRD_OV
| ISR_HOST_RFD_UNRUN
|
2545 if (netif_msg_intr(adapter
))
2546 dev_printk(KERN_DEBUG
,
2547 &adapter
->pdev
->dev
,
2548 "rx exception, ISR = 0x%x\n",
2550 atl1_intr_rx(adapter
);
2556 } while ((status
= adapter
->cmb
.cmb
->int_stats
));
2558 /* re-enable Interrupt */
2559 iowrite32(ISR_DIS_SMB
| ISR_DIS_DMA
, adapter
->hw
.hw_addr
+ REG_ISR
);
2564 * atl1_watchdog - Timer Call-back
2565 * @data: pointer to netdev cast into an unsigned long
2567 static void atl1_watchdog(unsigned long data
)
2569 struct atl1_adapter
*adapter
= (struct atl1_adapter
*)data
;
2571 /* Reset the timer */
2572 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 2 * HZ
);
2576 * atl1_phy_config - Timer Call-back
2577 * @data: pointer to netdev cast into an unsigned long
2579 static void atl1_phy_config(unsigned long data
)
2581 struct atl1_adapter
*adapter
= (struct atl1_adapter
*)data
;
2582 struct atl1_hw
*hw
= &adapter
->hw
;
2583 unsigned long flags
;
2585 spin_lock_irqsave(&adapter
->lock
, flags
);
2586 adapter
->phy_timer_pending
= false;
2587 atl1_write_phy_reg(hw
, MII_ADVERTISE
, hw
->mii_autoneg_adv_reg
);
2588 atl1_write_phy_reg(hw
, MII_ATLX_CR
, hw
->mii_1000t_ctrl_reg
);
2589 atl1_write_phy_reg(hw
, MII_BMCR
, MII_CR_RESET
| MII_CR_AUTO_NEG_EN
);
2590 spin_unlock_irqrestore(&adapter
->lock
, flags
);
2594 * Orphaned vendor comment left intact here:
2596 * If TPD Buffer size equal to 0, PCIE DMAR_TO_INT
2597 * will assert. We do soft reset <0x1400=1> according
2598 * with the SPEC. BUT, it seemes that PCIE or DMA
2599 * state-machine will not be reset. DMAR_TO_INT will
2600 * assert again and again.
2604 static int atl1_reset(struct atl1_adapter
*adapter
)
2607 ret
= atl1_reset_hw(&adapter
->hw
);
2610 return atl1_init_hw(&adapter
->hw
);
2613 static s32
atl1_up(struct atl1_adapter
*adapter
)
2615 struct net_device
*netdev
= adapter
->netdev
;
2617 int irq_flags
= IRQF_SAMPLE_RANDOM
;
2619 /* hardware has been reset, we need to reload some things */
2620 atlx_set_multi(netdev
);
2621 atl1_init_ring_ptrs(adapter
);
2622 atlx_restore_vlan(adapter
);
2623 err
= atl1_alloc_rx_buffers(adapter
);
2625 /* no RX BUFFER allocated */
2628 if (unlikely(atl1_configure(adapter
))) {
2633 err
= pci_enable_msi(adapter
->pdev
);
2635 if (netif_msg_ifup(adapter
))
2636 dev_info(&adapter
->pdev
->dev
,
2637 "Unable to enable MSI: %d\n", err
);
2638 irq_flags
|= IRQF_SHARED
;
2641 err
= request_irq(adapter
->pdev
->irq
, &atl1_intr
, irq_flags
,
2642 netdev
->name
, netdev
);
2646 mod_timer(&adapter
->watchdog_timer
, jiffies
);
2647 atlx_irq_enable(adapter
);
2648 atl1_check_link(adapter
);
2652 pci_disable_msi(adapter
->pdev
);
2653 /* free rx_buffers */
2654 atl1_clean_rx_ring(adapter
);
2658 static void atl1_down(struct atl1_adapter
*adapter
)
2660 struct net_device
*netdev
= adapter
->netdev
;
2662 del_timer_sync(&adapter
->watchdog_timer
);
2663 del_timer_sync(&adapter
->phy_config_timer
);
2664 adapter
->phy_timer_pending
= false;
2666 atlx_irq_disable(adapter
);
2667 free_irq(adapter
->pdev
->irq
, netdev
);
2668 pci_disable_msi(adapter
->pdev
);
2669 atl1_reset_hw(&adapter
->hw
);
2670 adapter
->cmb
.cmb
->int_stats
= 0;
2672 adapter
->link_speed
= SPEED_0
;
2673 adapter
->link_duplex
= -1;
2674 netif_carrier_off(netdev
);
2675 netif_stop_queue(netdev
);
2677 atl1_clean_tx_ring(adapter
);
2678 atl1_clean_rx_ring(adapter
);
2681 static void atl1_tx_timeout_task(struct work_struct
*work
)
2683 struct atl1_adapter
*adapter
=
2684 container_of(work
, struct atl1_adapter
, tx_timeout_task
);
2685 struct net_device
*netdev
= adapter
->netdev
;
2687 netif_device_detach(netdev
);
2690 netif_device_attach(netdev
);
2694 * atl1_change_mtu - Change the Maximum Transfer Unit
2695 * @netdev: network interface device structure
2696 * @new_mtu: new value for maximum frame size
2698 * Returns 0 on success, negative on failure
2700 static int atl1_change_mtu(struct net_device
*netdev
, int new_mtu
)
2702 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
2703 int old_mtu
= netdev
->mtu
;
2704 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+ VLAN_HLEN
;
2706 if ((max_frame
< ETH_ZLEN
+ ETH_FCS_LEN
) ||
2707 (max_frame
> MAX_JUMBO_FRAME_SIZE
)) {
2708 if (netif_msg_link(adapter
))
2709 dev_warn(&adapter
->pdev
->dev
, "invalid MTU setting\n");
2713 adapter
->hw
.max_frame_size
= max_frame
;
2714 adapter
->hw
.tx_jumbo_task_th
= (max_frame
+ 7) >> 3;
2715 adapter
->rx_buffer_len
= (max_frame
+ 7) & ~7;
2716 adapter
->hw
.rx_jumbo_th
= adapter
->rx_buffer_len
/ 8;
2718 netdev
->mtu
= new_mtu
;
2719 if ((old_mtu
!= new_mtu
) && netif_running(netdev
)) {
2728 * atl1_open - Called when a network interface is made active
2729 * @netdev: network interface device structure
2731 * Returns 0 on success, negative value on failure
2733 * The open entry point is called when a network interface is made
2734 * active by the system (IFF_UP). At this point all resources needed
2735 * for transmit and receive operations are allocated, the interrupt
2736 * handler is registered with the OS, the watchdog timer is started,
2737 * and the stack is notified that the interface is ready.
2739 static int atl1_open(struct net_device
*netdev
)
2741 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
2744 /* allocate transmit descriptors */
2745 err
= atl1_setup_ring_resources(adapter
);
2749 err
= atl1_up(adapter
);
2756 atl1_reset(adapter
);
2761 * atl1_close - Disables a network interface
2762 * @netdev: network interface device structure
2764 * Returns 0, this is not allowed to fail
2766 * The close entry point is called when an interface is de-activated
2767 * by the OS. The hardware is still under the drivers control, but
2768 * needs to be disabled. A global MAC reset is issued to stop the
2769 * hardware, and all transmit and receive resources are freed.
2771 static int atl1_close(struct net_device
*netdev
)
2773 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
2775 atl1_free_ring_resources(adapter
);
2780 static int atl1_suspend(struct pci_dev
*pdev
, pm_message_t state
)
2782 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2783 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
2784 struct atl1_hw
*hw
= &adapter
->hw
;
2786 u32 wufc
= adapter
->wol
;
2788 netif_device_detach(netdev
);
2789 if (netif_running(netdev
))
2792 atl1_read_phy_reg(hw
, MII_BMSR
, (u16
*) & ctrl
);
2793 atl1_read_phy_reg(hw
, MII_BMSR
, (u16
*) & ctrl
);
2794 if (ctrl
& BMSR_LSTATUS
)
2795 wufc
&= ~ATLX_WUFC_LNKC
;
2797 /* reduce speed to 10/100M */
2799 atl1_phy_enter_power_saving(hw
);
2800 /* if resume, let driver to re- setup link */
2801 hw
->phy_configured
= false;
2802 atl1_set_mac_addr(hw
);
2803 atlx_set_multi(netdev
);
2806 /* turn on magic packet wol */
2807 if (wufc
& ATLX_WUFC_MAG
)
2808 ctrl
= WOL_MAGIC_EN
| WOL_MAGIC_PME_EN
;
2810 /* turn on Link change WOL */
2811 if (wufc
& ATLX_WUFC_LNKC
)
2812 ctrl
|= (WOL_LINK_CHG_EN
| WOL_LINK_CHG_PME_EN
);
2813 iowrite32(ctrl
, hw
->hw_addr
+ REG_WOL_CTRL
);
2815 /* turn on all-multi mode if wake on multicast is enabled */
2816 ctrl
= ioread32(hw
->hw_addr
+ REG_MAC_CTRL
);
2817 ctrl
&= ~MAC_CTRL_DBG
;
2818 ctrl
&= ~MAC_CTRL_PROMIS_EN
;
2819 if (wufc
& ATLX_WUFC_MC
)
2820 ctrl
|= MAC_CTRL_MC_ALL_EN
;
2822 ctrl
&= ~MAC_CTRL_MC_ALL_EN
;
2824 /* turn on broadcast mode if wake on-BC is enabled */
2825 if (wufc
& ATLX_WUFC_BC
)
2826 ctrl
|= MAC_CTRL_BC_EN
;
2828 ctrl
&= ~MAC_CTRL_BC_EN
;
2831 ctrl
|= MAC_CTRL_RX_EN
;
2832 iowrite32(ctrl
, hw
->hw_addr
+ REG_MAC_CTRL
);
2833 pci_enable_wake(pdev
, PCI_D3hot
, 1);
2834 pci_enable_wake(pdev
, PCI_D3cold
, 1);
2836 iowrite32(0, hw
->hw_addr
+ REG_WOL_CTRL
);
2837 pci_enable_wake(pdev
, PCI_D3hot
, 0);
2838 pci_enable_wake(pdev
, PCI_D3cold
, 0);
2841 pci_save_state(pdev
);
2842 pci_disable_device(pdev
);
2844 pci_set_power_state(pdev
, PCI_D3hot
);
2849 static int atl1_resume(struct pci_dev
*pdev
)
2851 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2852 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
2855 pci_set_power_state(pdev
, PCI_D0
);
2856 pci_restore_state(pdev
);
2858 /* FIXME: check and handle */
2859 err
= pci_enable_device(pdev
);
2860 pci_enable_wake(pdev
, PCI_D3hot
, 0);
2861 pci_enable_wake(pdev
, PCI_D3cold
, 0);
2863 iowrite32(0, adapter
->hw
.hw_addr
+ REG_WOL_CTRL
);
2864 atl1_reset(adapter
);
2866 if (netif_running(netdev
))
2868 netif_device_attach(netdev
);
2870 atl1_via_workaround(adapter
);
2875 #define atl1_suspend NULL
2876 #define atl1_resume NULL
2879 #ifdef CONFIG_NET_POLL_CONTROLLER
2880 static void atl1_poll_controller(struct net_device
*netdev
)
2882 disable_irq(netdev
->irq
);
2883 atl1_intr(netdev
->irq
, netdev
);
2884 enable_irq(netdev
->irq
);
2889 * atl1_probe - Device Initialization Routine
2890 * @pdev: PCI device information struct
2891 * @ent: entry in atl1_pci_tbl
2893 * Returns 0 on success, negative on failure
2895 * atl1_probe initializes an adapter identified by a pci_dev structure.
2896 * The OS initialization, configuring of the adapter private structure,
2897 * and a hardware reset occur.
2899 static int __devinit
atl1_probe(struct pci_dev
*pdev
,
2900 const struct pci_device_id
*ent
)
2902 struct net_device
*netdev
;
2903 struct atl1_adapter
*adapter
;
2904 static int cards_found
= 0;
2907 err
= pci_enable_device(pdev
);
2912 * The atl1 chip can DMA to 64-bit addresses, but it uses a single
2913 * shared register for the high 32 bits, so only a single, aligned,
2914 * 4 GB physical address range can be used at a time.
2916 * Supporting 64-bit DMA on this hardware is more trouble than it's
2917 * worth. It is far easier to limit to 32-bit DMA than update
2918 * various kernel subsystems to support the mechanics required by a
2919 * fixed-high-32-bit system.
2921 err
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
2923 dev_err(&pdev
->dev
, "no usable DMA configuration\n");
2927 * Mark all PCI regions associated with PCI device
2928 * pdev as being reserved by owner atl1_driver_name
2930 err
= pci_request_regions(pdev
, ATLX_DRIVER_NAME
);
2932 goto err_request_regions
;
2935 * Enables bus-mastering on the device and calls
2936 * pcibios_set_master to do the needed arch specific settings
2938 pci_set_master(pdev
);
2940 netdev
= alloc_etherdev(sizeof(struct atl1_adapter
));
2943 goto err_alloc_etherdev
;
2945 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
2947 pci_set_drvdata(pdev
, netdev
);
2948 adapter
= netdev_priv(netdev
);
2949 adapter
->netdev
= netdev
;
2950 adapter
->pdev
= pdev
;
2951 adapter
->hw
.back
= adapter
;
2952 adapter
->msg_enable
= netif_msg_init(debug
, atl1_default_msg
);
2954 adapter
->hw
.hw_addr
= pci_iomap(pdev
, 0, 0);
2955 if (!adapter
->hw
.hw_addr
) {
2959 /* get device revision number */
2960 adapter
->hw
.dev_rev
= ioread16(adapter
->hw
.hw_addr
+
2961 (REG_MASTER_CTRL
+ 2));
2962 if (netif_msg_probe(adapter
))
2963 dev_info(&pdev
->dev
, "version %s\n", ATLX_DRIVER_VERSION
);
2965 /* set default ring resource counts */
2966 adapter
->rfd_ring
.count
= adapter
->rrd_ring
.count
= ATL1_DEFAULT_RFD
;
2967 adapter
->tpd_ring
.count
= ATL1_DEFAULT_TPD
;
2969 adapter
->mii
.dev
= netdev
;
2970 adapter
->mii
.mdio_read
= mdio_read
;
2971 adapter
->mii
.mdio_write
= mdio_write
;
2972 adapter
->mii
.phy_id_mask
= 0x1f;
2973 adapter
->mii
.reg_num_mask
= 0x1f;
2975 netdev
->open
= &atl1_open
;
2976 netdev
->stop
= &atl1_close
;
2977 netdev
->hard_start_xmit
= &atl1_xmit_frame
;
2978 netdev
->get_stats
= &atlx_get_stats
;
2979 netdev
->set_multicast_list
= &atlx_set_multi
;
2980 netdev
->set_mac_address
= &atl1_set_mac
;
2981 netdev
->change_mtu
= &atl1_change_mtu
;
2982 netdev
->do_ioctl
= &atlx_ioctl
;
2983 netdev
->tx_timeout
= &atlx_tx_timeout
;
2984 netdev
->watchdog_timeo
= 5 * HZ
;
2985 #ifdef CONFIG_NET_POLL_CONTROLLER
2986 netdev
->poll_controller
= atl1_poll_controller
;
2988 netdev
->vlan_rx_register
= atlx_vlan_rx_register
;
2990 netdev
->ethtool_ops
= &atl1_ethtool_ops
;
2991 adapter
->bd_number
= cards_found
;
2993 /* setup the private structure */
2994 err
= atl1_sw_init(adapter
);
2998 netdev
->features
= NETIF_F_HW_CSUM
;
2999 netdev
->features
|= NETIF_F_SG
;
3000 netdev
->features
|= (NETIF_F_HW_VLAN_TX
| NETIF_F_HW_VLAN_RX
);
3001 netdev
->features
|= NETIF_F_TSO
;
3002 netdev
->features
|= NETIF_F_LLTX
;
3005 * patch for some L1 of old version,
3006 * the final version of L1 may not need these
3009 /* atl1_pcie_patch(adapter); */
3011 /* really reset GPHY core */
3012 iowrite16(0, adapter
->hw
.hw_addr
+ REG_PHY_ENABLE
);
3015 * reset the controller to
3016 * put the device in a known good starting state
3018 if (atl1_reset_hw(&adapter
->hw
)) {
3023 /* copy the MAC address out of the EEPROM */
3024 atl1_read_mac_addr(&adapter
->hw
);
3025 memcpy(netdev
->dev_addr
, adapter
->hw
.mac_addr
, netdev
->addr_len
);
3027 if (!is_valid_ether_addr(netdev
->dev_addr
)) {
3032 atl1_check_options(adapter
);
3034 /* pre-init the MAC, and setup link */
3035 err
= atl1_init_hw(&adapter
->hw
);
3041 atl1_pcie_patch(adapter
);
3042 /* assume we have no link for now */
3043 netif_carrier_off(netdev
);
3044 netif_stop_queue(netdev
);
3046 init_timer(&adapter
->watchdog_timer
);
3047 adapter
->watchdog_timer
.function
= &atl1_watchdog
;
3048 adapter
->watchdog_timer
.data
= (unsigned long)adapter
;
3050 init_timer(&adapter
->phy_config_timer
);
3051 adapter
->phy_config_timer
.function
= &atl1_phy_config
;
3052 adapter
->phy_config_timer
.data
= (unsigned long)adapter
;
3053 adapter
->phy_timer_pending
= false;
3055 INIT_WORK(&adapter
->tx_timeout_task
, atl1_tx_timeout_task
);
3057 INIT_WORK(&adapter
->link_chg_task
, atlx_link_chg_task
);
3059 INIT_WORK(&adapter
->pcie_dma_to_rst_task
, atl1_tx_timeout_task
);
3061 err
= register_netdev(netdev
);
3066 atl1_via_workaround(adapter
);
3070 pci_iounmap(pdev
, adapter
->hw
.hw_addr
);
3072 free_netdev(netdev
);
3074 pci_release_regions(pdev
);
3076 err_request_regions
:
3077 pci_disable_device(pdev
);
3082 * atl1_remove - Device Removal Routine
3083 * @pdev: PCI device information struct
3085 * atl1_remove is called by the PCI subsystem to alert the driver
3086 * that it should release a PCI device. The could be caused by a
3087 * Hot-Plug event, or because the driver is going to be removed from
3090 static void __devexit
atl1_remove(struct pci_dev
*pdev
)
3092 struct net_device
*netdev
= pci_get_drvdata(pdev
);
3093 struct atl1_adapter
*adapter
;
3094 /* Device not available. Return. */
3098 adapter
= netdev_priv(netdev
);
3101 * Some atl1 boards lack persistent storage for their MAC, and get it
3102 * from the BIOS during POST. If we've been messing with the MAC
3103 * address, we need to save the permanent one.
3105 if (memcmp(adapter
->hw
.mac_addr
, adapter
->hw
.perm_mac_addr
, ETH_ALEN
)) {
3106 memcpy(adapter
->hw
.mac_addr
, adapter
->hw
.perm_mac_addr
,
3108 atl1_set_mac_addr(&adapter
->hw
);
3111 iowrite16(0, adapter
->hw
.hw_addr
+ REG_PHY_ENABLE
);
3112 unregister_netdev(netdev
);
3113 pci_iounmap(pdev
, adapter
->hw
.hw_addr
);
3114 pci_release_regions(pdev
);
3115 free_netdev(netdev
);
3116 pci_disable_device(pdev
);
3119 static struct pci_driver atl1_driver
= {
3120 .name
= ATLX_DRIVER_NAME
,
3121 .id_table
= atl1_pci_tbl
,
3122 .probe
= atl1_probe
,
3123 .remove
= __devexit_p(atl1_remove
),
3124 .suspend
= atl1_suspend
,
3125 .resume
= atl1_resume
3129 * atl1_exit_module - Driver Exit Cleanup Routine
3131 * atl1_exit_module is called just before the driver is removed
3134 static void __exit
atl1_exit_module(void)
3136 pci_unregister_driver(&atl1_driver
);
3140 * atl1_init_module - Driver Registration Routine
3142 * atl1_init_module is the first routine called when the driver is
3143 * loaded. All it does is register with the PCI subsystem.
3145 static int __init
atl1_init_module(void)
3147 return pci_register_driver(&atl1_driver
);
3150 module_init(atl1_init_module
);
3151 module_exit(atl1_exit_module
);
3154 char stat_string
[ETH_GSTRING_LEN
];
3159 #define ATL1_STAT(m) \
3160 sizeof(((struct atl1_adapter *)0)->m), offsetof(struct atl1_adapter, m)
3162 static struct atl1_stats atl1_gstrings_stats
[] = {
3163 {"rx_packets", ATL1_STAT(soft_stats
.rx_packets
)},
3164 {"tx_packets", ATL1_STAT(soft_stats
.tx_packets
)},
3165 {"rx_bytes", ATL1_STAT(soft_stats
.rx_bytes
)},
3166 {"tx_bytes", ATL1_STAT(soft_stats
.tx_bytes
)},
3167 {"rx_errors", ATL1_STAT(soft_stats
.rx_errors
)},
3168 {"tx_errors", ATL1_STAT(soft_stats
.tx_errors
)},
3169 {"rx_dropped", ATL1_STAT(net_stats
.rx_dropped
)},
3170 {"tx_dropped", ATL1_STAT(net_stats
.tx_dropped
)},
3171 {"multicast", ATL1_STAT(soft_stats
.multicast
)},
3172 {"collisions", ATL1_STAT(soft_stats
.collisions
)},
3173 {"rx_length_errors", ATL1_STAT(soft_stats
.rx_length_errors
)},
3174 {"rx_over_errors", ATL1_STAT(soft_stats
.rx_missed_errors
)},
3175 {"rx_crc_errors", ATL1_STAT(soft_stats
.rx_crc_errors
)},
3176 {"rx_frame_errors", ATL1_STAT(soft_stats
.rx_frame_errors
)},
3177 {"rx_fifo_errors", ATL1_STAT(soft_stats
.rx_fifo_errors
)},
3178 {"rx_missed_errors", ATL1_STAT(soft_stats
.rx_missed_errors
)},
3179 {"tx_aborted_errors", ATL1_STAT(soft_stats
.tx_aborted_errors
)},
3180 {"tx_carrier_errors", ATL1_STAT(soft_stats
.tx_carrier_errors
)},
3181 {"tx_fifo_errors", ATL1_STAT(soft_stats
.tx_fifo_errors
)},
3182 {"tx_window_errors", ATL1_STAT(soft_stats
.tx_window_errors
)},
3183 {"tx_abort_exce_coll", ATL1_STAT(soft_stats
.excecol
)},
3184 {"tx_abort_late_coll", ATL1_STAT(soft_stats
.latecol
)},
3185 {"tx_deferred_ok", ATL1_STAT(soft_stats
.deffer
)},
3186 {"tx_single_coll_ok", ATL1_STAT(soft_stats
.scc
)},
3187 {"tx_multi_coll_ok", ATL1_STAT(soft_stats
.mcc
)},
3188 {"tx_underun", ATL1_STAT(soft_stats
.tx_underun
)},
3189 {"tx_trunc", ATL1_STAT(soft_stats
.tx_trunc
)},
3190 {"tx_pause", ATL1_STAT(soft_stats
.tx_pause
)},
3191 {"rx_pause", ATL1_STAT(soft_stats
.rx_pause
)},
3192 {"rx_rrd_ov", ATL1_STAT(soft_stats
.rx_rrd_ov
)},
3193 {"rx_trunc", ATL1_STAT(soft_stats
.rx_trunc
)}
3196 static void atl1_get_ethtool_stats(struct net_device
*netdev
,
3197 struct ethtool_stats
*stats
, u64
*data
)
3199 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3203 for (i
= 0; i
< ARRAY_SIZE(atl1_gstrings_stats
); i
++) {
3204 p
= (char *)adapter
+atl1_gstrings_stats
[i
].stat_offset
;
3205 data
[i
] = (atl1_gstrings_stats
[i
].sizeof_stat
==
3206 sizeof(u64
)) ? *(u64
*)p
: *(u32
*)p
;
3211 static int atl1_get_sset_count(struct net_device
*netdev
, int sset
)
3215 return ARRAY_SIZE(atl1_gstrings_stats
);
3221 static int atl1_get_settings(struct net_device
*netdev
,
3222 struct ethtool_cmd
*ecmd
)
3224 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3225 struct atl1_hw
*hw
= &adapter
->hw
;
3227 ecmd
->supported
= (SUPPORTED_10baseT_Half
|
3228 SUPPORTED_10baseT_Full
|
3229 SUPPORTED_100baseT_Half
|
3230 SUPPORTED_100baseT_Full
|
3231 SUPPORTED_1000baseT_Full
|
3232 SUPPORTED_Autoneg
| SUPPORTED_TP
);
3233 ecmd
->advertising
= ADVERTISED_TP
;
3234 if (hw
->media_type
== MEDIA_TYPE_AUTO_SENSOR
||
3235 hw
->media_type
== MEDIA_TYPE_1000M_FULL
) {
3236 ecmd
->advertising
|= ADVERTISED_Autoneg
;
3237 if (hw
->media_type
== MEDIA_TYPE_AUTO_SENSOR
) {
3238 ecmd
->advertising
|= ADVERTISED_Autoneg
;
3239 ecmd
->advertising
|=
3240 (ADVERTISED_10baseT_Half
|
3241 ADVERTISED_10baseT_Full
|
3242 ADVERTISED_100baseT_Half
|
3243 ADVERTISED_100baseT_Full
|
3244 ADVERTISED_1000baseT_Full
);
3246 ecmd
->advertising
|= (ADVERTISED_1000baseT_Full
);
3248 ecmd
->port
= PORT_TP
;
3249 ecmd
->phy_address
= 0;
3250 ecmd
->transceiver
= XCVR_INTERNAL
;
3252 if (netif_carrier_ok(adapter
->netdev
)) {
3253 u16 link_speed
, link_duplex
;
3254 atl1_get_speed_and_duplex(hw
, &link_speed
, &link_duplex
);
3255 ecmd
->speed
= link_speed
;
3256 if (link_duplex
== FULL_DUPLEX
)
3257 ecmd
->duplex
= DUPLEX_FULL
;
3259 ecmd
->duplex
= DUPLEX_HALF
;
3264 if (hw
->media_type
== MEDIA_TYPE_AUTO_SENSOR
||
3265 hw
->media_type
== MEDIA_TYPE_1000M_FULL
)
3266 ecmd
->autoneg
= AUTONEG_ENABLE
;
3268 ecmd
->autoneg
= AUTONEG_DISABLE
;
3273 static int atl1_set_settings(struct net_device
*netdev
,
3274 struct ethtool_cmd
*ecmd
)
3276 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3277 struct atl1_hw
*hw
= &adapter
->hw
;
3280 u16 old_media_type
= hw
->media_type
;
3282 if (netif_running(adapter
->netdev
)) {
3283 if (netif_msg_link(adapter
))
3284 dev_dbg(&adapter
->pdev
->dev
,
3285 "ethtool shutting down adapter\n");
3289 if (ecmd
->autoneg
== AUTONEG_ENABLE
)
3290 hw
->media_type
= MEDIA_TYPE_AUTO_SENSOR
;
3292 if (ecmd
->speed
== SPEED_1000
) {
3293 if (ecmd
->duplex
!= DUPLEX_FULL
) {
3294 if (netif_msg_link(adapter
))
3295 dev_warn(&adapter
->pdev
->dev
,
3296 "1000M half is invalid\n");
3300 hw
->media_type
= MEDIA_TYPE_1000M_FULL
;
3301 } else if (ecmd
->speed
== SPEED_100
) {
3302 if (ecmd
->duplex
== DUPLEX_FULL
)
3303 hw
->media_type
= MEDIA_TYPE_100M_FULL
;
3305 hw
->media_type
= MEDIA_TYPE_100M_HALF
;
3307 if (ecmd
->duplex
== DUPLEX_FULL
)
3308 hw
->media_type
= MEDIA_TYPE_10M_FULL
;
3310 hw
->media_type
= MEDIA_TYPE_10M_HALF
;
3313 switch (hw
->media_type
) {
3314 case MEDIA_TYPE_AUTO_SENSOR
:
3316 ADVERTISED_10baseT_Half
|
3317 ADVERTISED_10baseT_Full
|
3318 ADVERTISED_100baseT_Half
|
3319 ADVERTISED_100baseT_Full
|
3320 ADVERTISED_1000baseT_Full
|
3321 ADVERTISED_Autoneg
| ADVERTISED_TP
;
3323 case MEDIA_TYPE_1000M_FULL
:
3325 ADVERTISED_1000baseT_Full
|
3326 ADVERTISED_Autoneg
| ADVERTISED_TP
;
3329 ecmd
->advertising
= 0;
3332 if (atl1_phy_setup_autoneg_adv(hw
)) {
3334 if (netif_msg_link(adapter
))
3335 dev_warn(&adapter
->pdev
->dev
,
3336 "invalid ethtool speed/duplex setting\n");
3339 if (hw
->media_type
== MEDIA_TYPE_AUTO_SENSOR
||
3340 hw
->media_type
== MEDIA_TYPE_1000M_FULL
)
3341 phy_data
= MII_CR_RESET
| MII_CR_AUTO_NEG_EN
;
3343 switch (hw
->media_type
) {
3344 case MEDIA_TYPE_100M_FULL
:
3346 MII_CR_FULL_DUPLEX
| MII_CR_SPEED_100
|
3349 case MEDIA_TYPE_100M_HALF
:
3350 phy_data
= MII_CR_SPEED_100
| MII_CR_RESET
;
3352 case MEDIA_TYPE_10M_FULL
:
3354 MII_CR_FULL_DUPLEX
| MII_CR_SPEED_10
| MII_CR_RESET
;
3357 /* MEDIA_TYPE_10M_HALF: */
3358 phy_data
= MII_CR_SPEED_10
| MII_CR_RESET
;
3362 atl1_write_phy_reg(hw
, MII_BMCR
, phy_data
);
3365 hw
->media_type
= old_media_type
;
3367 if (netif_running(adapter
->netdev
)) {
3368 if (netif_msg_link(adapter
))
3369 dev_dbg(&adapter
->pdev
->dev
,
3370 "ethtool starting adapter\n");
3372 } else if (!ret_val
) {
3373 if (netif_msg_link(adapter
))
3374 dev_dbg(&adapter
->pdev
->dev
,
3375 "ethtool resetting adapter\n");
3376 atl1_reset(adapter
);
3381 static void atl1_get_drvinfo(struct net_device
*netdev
,
3382 struct ethtool_drvinfo
*drvinfo
)
3384 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3386 strncpy(drvinfo
->driver
, ATLX_DRIVER_NAME
, sizeof(drvinfo
->driver
));
3387 strncpy(drvinfo
->version
, ATLX_DRIVER_VERSION
,
3388 sizeof(drvinfo
->version
));
3389 strncpy(drvinfo
->fw_version
, "N/A", sizeof(drvinfo
->fw_version
));
3390 strncpy(drvinfo
->bus_info
, pci_name(adapter
->pdev
),
3391 sizeof(drvinfo
->bus_info
));
3392 drvinfo
->eedump_len
= ATL1_EEDUMP_LEN
;
3395 static void atl1_get_wol(struct net_device
*netdev
,
3396 struct ethtool_wolinfo
*wol
)
3398 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3400 wol
->supported
= WAKE_UCAST
| WAKE_MCAST
| WAKE_BCAST
| WAKE_MAGIC
;
3402 if (adapter
->wol
& ATLX_WUFC_EX
)
3403 wol
->wolopts
|= WAKE_UCAST
;
3404 if (adapter
->wol
& ATLX_WUFC_MC
)
3405 wol
->wolopts
|= WAKE_MCAST
;
3406 if (adapter
->wol
& ATLX_WUFC_BC
)
3407 wol
->wolopts
|= WAKE_BCAST
;
3408 if (adapter
->wol
& ATLX_WUFC_MAG
)
3409 wol
->wolopts
|= WAKE_MAGIC
;
3413 static int atl1_set_wol(struct net_device
*netdev
,
3414 struct ethtool_wolinfo
*wol
)
3416 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3418 if (wol
->wolopts
& (WAKE_PHY
| WAKE_ARP
| WAKE_MAGICSECURE
))
3421 if (wol
->wolopts
& WAKE_UCAST
)
3422 adapter
->wol
|= ATLX_WUFC_EX
;
3423 if (wol
->wolopts
& WAKE_MCAST
)
3424 adapter
->wol
|= ATLX_WUFC_MC
;
3425 if (wol
->wolopts
& WAKE_BCAST
)
3426 adapter
->wol
|= ATLX_WUFC_BC
;
3427 if (wol
->wolopts
& WAKE_MAGIC
)
3428 adapter
->wol
|= ATLX_WUFC_MAG
;
3432 static u32
atl1_get_msglevel(struct net_device
*netdev
)
3434 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3435 return adapter
->msg_enable
;
3438 static void atl1_set_msglevel(struct net_device
*netdev
, u32 value
)
3440 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3441 adapter
->msg_enable
= value
;
3444 static int atl1_get_regs_len(struct net_device
*netdev
)
3446 return ATL1_REG_COUNT
* sizeof(u32
);
3449 static void atl1_get_regs(struct net_device
*netdev
, struct ethtool_regs
*regs
,
3452 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3453 struct atl1_hw
*hw
= &adapter
->hw
;
3457 for (i
= 0; i
< ATL1_REG_COUNT
; i
++) {
3459 * This switch statement avoids reserved regions
3460 * of register space.
3485 /* reserved region; don't read it */
3489 /* unreserved region */
3490 regbuf
[i
] = ioread32(hw
->hw_addr
+ (i
* sizeof(u32
)));
3495 static void atl1_get_ringparam(struct net_device
*netdev
,
3496 struct ethtool_ringparam
*ring
)
3498 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3499 struct atl1_tpd_ring
*txdr
= &adapter
->tpd_ring
;
3500 struct atl1_rfd_ring
*rxdr
= &adapter
->rfd_ring
;
3502 ring
->rx_max_pending
= ATL1_MAX_RFD
;
3503 ring
->tx_max_pending
= ATL1_MAX_TPD
;
3504 ring
->rx_mini_max_pending
= 0;
3505 ring
->rx_jumbo_max_pending
= 0;
3506 ring
->rx_pending
= rxdr
->count
;
3507 ring
->tx_pending
= txdr
->count
;
3508 ring
->rx_mini_pending
= 0;
3509 ring
->rx_jumbo_pending
= 0;
3512 static int atl1_set_ringparam(struct net_device
*netdev
,
3513 struct ethtool_ringparam
*ring
)
3515 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3516 struct atl1_tpd_ring
*tpdr
= &adapter
->tpd_ring
;
3517 struct atl1_rrd_ring
*rrdr
= &adapter
->rrd_ring
;
3518 struct atl1_rfd_ring
*rfdr
= &adapter
->rfd_ring
;
3520 struct atl1_tpd_ring tpd_old
, tpd_new
;
3521 struct atl1_rfd_ring rfd_old
, rfd_new
;
3522 struct atl1_rrd_ring rrd_old
, rrd_new
;
3523 struct atl1_ring_header rhdr_old
, rhdr_new
;
3526 tpd_old
= adapter
->tpd_ring
;
3527 rfd_old
= adapter
->rfd_ring
;
3528 rrd_old
= adapter
->rrd_ring
;
3529 rhdr_old
= adapter
->ring_header
;
3531 if (netif_running(adapter
->netdev
))
3534 rfdr
->count
= (u16
) max(ring
->rx_pending
, (u32
) ATL1_MIN_RFD
);
3535 rfdr
->count
= rfdr
->count
> ATL1_MAX_RFD
? ATL1_MAX_RFD
:
3537 rfdr
->count
= (rfdr
->count
+ 3) & ~3;
3538 rrdr
->count
= rfdr
->count
;
3540 tpdr
->count
= (u16
) max(ring
->tx_pending
, (u32
) ATL1_MIN_TPD
);
3541 tpdr
->count
= tpdr
->count
> ATL1_MAX_TPD
? ATL1_MAX_TPD
:
3543 tpdr
->count
= (tpdr
->count
+ 3) & ~3;
3545 if (netif_running(adapter
->netdev
)) {
3546 /* try to get new resources before deleting old */
3547 err
= atl1_setup_ring_resources(adapter
);
3549 goto err_setup_ring
;
3552 * save the new, restore the old in order to free it,
3553 * then restore the new back again
3556 rfd_new
= adapter
->rfd_ring
;
3557 rrd_new
= adapter
->rrd_ring
;
3558 tpd_new
= adapter
->tpd_ring
;
3559 rhdr_new
= adapter
->ring_header
;
3560 adapter
->rfd_ring
= rfd_old
;
3561 adapter
->rrd_ring
= rrd_old
;
3562 adapter
->tpd_ring
= tpd_old
;
3563 adapter
->ring_header
= rhdr_old
;
3564 atl1_free_ring_resources(adapter
);
3565 adapter
->rfd_ring
= rfd_new
;
3566 adapter
->rrd_ring
= rrd_new
;
3567 adapter
->tpd_ring
= tpd_new
;
3568 adapter
->ring_header
= rhdr_new
;
3570 err
= atl1_up(adapter
);
3577 adapter
->rfd_ring
= rfd_old
;
3578 adapter
->rrd_ring
= rrd_old
;
3579 adapter
->tpd_ring
= tpd_old
;
3580 adapter
->ring_header
= rhdr_old
;
3585 static void atl1_get_pauseparam(struct net_device
*netdev
,
3586 struct ethtool_pauseparam
*epause
)
3588 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3589 struct atl1_hw
*hw
= &adapter
->hw
;
3591 if (hw
->media_type
== MEDIA_TYPE_AUTO_SENSOR
||
3592 hw
->media_type
== MEDIA_TYPE_1000M_FULL
) {
3593 epause
->autoneg
= AUTONEG_ENABLE
;
3595 epause
->autoneg
= AUTONEG_DISABLE
;
3597 epause
->rx_pause
= 1;
3598 epause
->tx_pause
= 1;
3601 static int atl1_set_pauseparam(struct net_device
*netdev
,
3602 struct ethtool_pauseparam
*epause
)
3604 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3605 struct atl1_hw
*hw
= &adapter
->hw
;
3607 if (hw
->media_type
== MEDIA_TYPE_AUTO_SENSOR
||
3608 hw
->media_type
== MEDIA_TYPE_1000M_FULL
) {
3609 epause
->autoneg
= AUTONEG_ENABLE
;
3611 epause
->autoneg
= AUTONEG_DISABLE
;
3614 epause
->rx_pause
= 1;
3615 epause
->tx_pause
= 1;
3620 /* FIXME: is this right? -- CHS */
3621 static u32
atl1_get_rx_csum(struct net_device
*netdev
)
3626 static void atl1_get_strings(struct net_device
*netdev
, u32 stringset
,
3632 switch (stringset
) {
3634 for (i
= 0; i
< ARRAY_SIZE(atl1_gstrings_stats
); i
++) {
3635 memcpy(p
, atl1_gstrings_stats
[i
].stat_string
,
3637 p
+= ETH_GSTRING_LEN
;
3643 static int atl1_nway_reset(struct net_device
*netdev
)
3645 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3646 struct atl1_hw
*hw
= &adapter
->hw
;
3648 if (netif_running(netdev
)) {
3652 if (hw
->media_type
== MEDIA_TYPE_AUTO_SENSOR
||
3653 hw
->media_type
== MEDIA_TYPE_1000M_FULL
) {
3654 phy_data
= MII_CR_RESET
| MII_CR_AUTO_NEG_EN
;
3656 switch (hw
->media_type
) {
3657 case MEDIA_TYPE_100M_FULL
:
3658 phy_data
= MII_CR_FULL_DUPLEX
|
3659 MII_CR_SPEED_100
| MII_CR_RESET
;
3661 case MEDIA_TYPE_100M_HALF
:
3662 phy_data
= MII_CR_SPEED_100
| MII_CR_RESET
;
3664 case MEDIA_TYPE_10M_FULL
:
3665 phy_data
= MII_CR_FULL_DUPLEX
|
3666 MII_CR_SPEED_10
| MII_CR_RESET
;
3669 /* MEDIA_TYPE_10M_HALF */
3670 phy_data
= MII_CR_SPEED_10
| MII_CR_RESET
;
3673 atl1_write_phy_reg(hw
, MII_BMCR
, phy_data
);
3679 const struct ethtool_ops atl1_ethtool_ops
= {
3680 .get_settings
= atl1_get_settings
,
3681 .set_settings
= atl1_set_settings
,
3682 .get_drvinfo
= atl1_get_drvinfo
,
3683 .get_wol
= atl1_get_wol
,
3684 .set_wol
= atl1_set_wol
,
3685 .get_msglevel
= atl1_get_msglevel
,
3686 .set_msglevel
= atl1_set_msglevel
,
3687 .get_regs_len
= atl1_get_regs_len
,
3688 .get_regs
= atl1_get_regs
,
3689 .get_ringparam
= atl1_get_ringparam
,
3690 .set_ringparam
= atl1_set_ringparam
,
3691 .get_pauseparam
= atl1_get_pauseparam
,
3692 .set_pauseparam
= atl1_set_pauseparam
,
3693 .get_rx_csum
= atl1_get_rx_csum
,
3694 .set_tx_csum
= ethtool_op_set_tx_hw_csum
,
3695 .get_link
= ethtool_op_get_link
,
3696 .set_sg
= ethtool_op_set_sg
,
3697 .get_strings
= atl1_get_strings
,
3698 .nway_reset
= atl1_nway_reset
,
3699 .get_ethtool_stats
= atl1_get_ethtool_stats
,
3700 .get_sset_count
= atl1_get_sset_count
,
3701 .set_tso
= ethtool_op_set_tso
,