Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
[linux-2.6/linux-mips/linux-dm7025.git] / drivers / serial / atmel_serial.c
blobc065a704a93ab68cfe167d73f67edbb700a8420c
1 /*
2 * linux/drivers/char/atmel_serial.c
4 * Driver for Atmel AT91 / AT32 Serial ports
5 * Copyright (C) 2003 Rick Bronson
7 * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
8 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
10 * DMA support added by Chip Coldwell.
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
27 #include <linux/module.h>
28 #include <linux/tty.h>
29 #include <linux/ioport.h>
30 #include <linux/slab.h>
31 #include <linux/init.h>
32 #include <linux/serial.h>
33 #include <linux/clk.h>
34 #include <linux/console.h>
35 #include <linux/sysrq.h>
36 #include <linux/tty_flip.h>
37 #include <linux/platform_device.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/atmel_pdc.h>
40 #include <linux/atmel_serial.h>
42 #include <asm/io.h>
44 #include <asm/mach/serial_at91.h>
45 #include <asm/arch/board.h>
47 #ifdef CONFIG_ARM
48 #include <asm/arch/cpu.h>
49 #include <asm/arch/gpio.h>
50 #endif
52 #define PDC_BUFFER_SIZE 512
53 /* Revisit: We should calculate this based on the actual port settings */
54 #define PDC_RX_TIMEOUT (3 * 10) /* 3 bytes */
56 #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
57 #define SUPPORT_SYSRQ
58 #endif
60 #include <linux/serial_core.h>
62 #ifdef CONFIG_SERIAL_ATMEL_TTYAT
64 /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
65 * should coexist with the 8250 driver, such as if we have an external 16C550
66 * UART. */
67 #define SERIAL_ATMEL_MAJOR 204
68 #define MINOR_START 154
69 #define ATMEL_DEVICENAME "ttyAT"
71 #else
73 /* Use device name ttyS, major 4, minor 64-68. This is the usual serial port
74 * name, but it is legally reserved for the 8250 driver. */
75 #define SERIAL_ATMEL_MAJOR TTY_MAJOR
76 #define MINOR_START 64
77 #define ATMEL_DEVICENAME "ttyS"
79 #endif
81 #define ATMEL_ISR_PASS_LIMIT 256
83 /* UART registers. CR is write-only, hence no GET macro */
84 #define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR)
85 #define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR)
86 #define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR)
87 #define UART_PUT_IER(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IER)
88 #define UART_PUT_IDR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IDR)
89 #define UART_GET_IMR(port) __raw_readl((port)->membase + ATMEL_US_IMR)
90 #define UART_GET_CSR(port) __raw_readl((port)->membase + ATMEL_US_CSR)
91 #define UART_GET_CHAR(port) __raw_readl((port)->membase + ATMEL_US_RHR)
92 #define UART_PUT_CHAR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_THR)
93 #define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR)
94 #define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR)
95 #define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR)
97 /* PDC registers */
98 #define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
99 #define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR)
101 #define UART_PUT_RPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RPR)
102 #define UART_GET_RPR(port) __raw_readl((port)->membase + ATMEL_PDC_RPR)
103 #define UART_PUT_RCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RCR)
104 #define UART_PUT_RNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNPR)
105 #define UART_PUT_RNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNCR)
107 #define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR)
108 #define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR)
109 #define UART_GET_TCR(port) __raw_readl((port)->membase + ATMEL_PDC_TCR)
111 static int (*atmel_open_hook)(struct uart_port *);
112 static void (*atmel_close_hook)(struct uart_port *);
114 struct atmel_dma_buffer {
115 unsigned char *buf;
116 dma_addr_t dma_addr;
117 unsigned int dma_size;
118 unsigned int ofs;
121 struct atmel_uart_char {
122 u16 status;
123 u16 ch;
126 #define ATMEL_SERIAL_RINGSIZE 1024
129 * We wrap our port structure around the generic uart_port.
131 struct atmel_uart_port {
132 struct uart_port uart; /* uart */
133 struct clk *clk; /* uart clock */
134 unsigned short suspended; /* is port suspended? */
135 int break_active; /* break being received */
137 short use_dma_rx; /* enable PDC receiver */
138 short pdc_rx_idx; /* current PDC RX buffer */
139 struct atmel_dma_buffer pdc_rx[2]; /* PDC receier */
141 short use_dma_tx; /* enable PDC transmitter */
142 struct atmel_dma_buffer pdc_tx; /* PDC transmitter */
144 struct tasklet_struct tasklet;
145 unsigned int irq_status;
146 unsigned int irq_status_prev;
148 struct circ_buf rx_ring;
151 static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
153 #ifdef SUPPORT_SYSRQ
154 static struct console atmel_console;
155 #endif
157 static inline struct atmel_uart_port *
158 to_atmel_uart_port(struct uart_port *uart)
160 return container_of(uart, struct atmel_uart_port, uart);
163 #ifdef CONFIG_SERIAL_ATMEL_PDC
164 static bool atmel_use_dma_rx(struct uart_port *port)
166 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
168 return atmel_port->use_dma_rx;
171 static bool atmel_use_dma_tx(struct uart_port *port)
173 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
175 return atmel_port->use_dma_tx;
177 #else
178 static bool atmel_use_dma_rx(struct uart_port *port)
180 return false;
183 static bool atmel_use_dma_tx(struct uart_port *port)
185 return false;
187 #endif
190 * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
192 static u_int atmel_tx_empty(struct uart_port *port)
194 return (UART_GET_CSR(port) & ATMEL_US_TXEMPTY) ? TIOCSER_TEMT : 0;
198 * Set state of the modem control output lines
200 static void atmel_set_mctrl(struct uart_port *port, u_int mctrl)
202 unsigned int control = 0;
203 unsigned int mode;
205 #ifdef CONFIG_ARCH_AT91RM9200
206 if (cpu_is_at91rm9200()) {
208 * AT91RM9200 Errata #39: RTS0 is not internally connected
209 * to PA21. We need to drive the pin manually.
211 if (port->mapbase == AT91RM9200_BASE_US0) {
212 if (mctrl & TIOCM_RTS)
213 at91_set_gpio_value(AT91_PIN_PA21, 0);
214 else
215 at91_set_gpio_value(AT91_PIN_PA21, 1);
218 #endif
220 if (mctrl & TIOCM_RTS)
221 control |= ATMEL_US_RTSEN;
222 else
223 control |= ATMEL_US_RTSDIS;
225 if (mctrl & TIOCM_DTR)
226 control |= ATMEL_US_DTREN;
227 else
228 control |= ATMEL_US_DTRDIS;
230 UART_PUT_CR(port, control);
232 /* Local loopback mode? */
233 mode = UART_GET_MR(port) & ~ATMEL_US_CHMODE;
234 if (mctrl & TIOCM_LOOP)
235 mode |= ATMEL_US_CHMODE_LOC_LOOP;
236 else
237 mode |= ATMEL_US_CHMODE_NORMAL;
238 UART_PUT_MR(port, mode);
242 * Get state of the modem control input lines
244 static u_int atmel_get_mctrl(struct uart_port *port)
246 unsigned int status, ret = 0;
248 status = UART_GET_CSR(port);
251 * The control signals are active low.
253 if (!(status & ATMEL_US_DCD))
254 ret |= TIOCM_CD;
255 if (!(status & ATMEL_US_CTS))
256 ret |= TIOCM_CTS;
257 if (!(status & ATMEL_US_DSR))
258 ret |= TIOCM_DSR;
259 if (!(status & ATMEL_US_RI))
260 ret |= TIOCM_RI;
262 return ret;
266 * Stop transmitting.
268 static void atmel_stop_tx(struct uart_port *port)
270 if (atmel_use_dma_tx(port)) {
271 /* disable PDC transmit */
272 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
273 UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
274 } else
275 UART_PUT_IDR(port, ATMEL_US_TXRDY);
279 * Start transmitting.
281 static void atmel_start_tx(struct uart_port *port)
283 if (atmel_use_dma_tx(port)) {
284 if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN)
285 /* The transmitter is already running. Yes, we
286 really need this.*/
287 return;
289 UART_PUT_IER(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
290 /* re-enable PDC transmit */
291 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
292 } else
293 UART_PUT_IER(port, ATMEL_US_TXRDY);
297 * Stop receiving - port is in process of being closed.
299 static void atmel_stop_rx(struct uart_port *port)
301 if (atmel_use_dma_rx(port)) {
302 /* disable PDC receive */
303 UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS);
304 UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
305 } else
306 UART_PUT_IDR(port, ATMEL_US_RXRDY);
310 * Enable modem status interrupts
312 static void atmel_enable_ms(struct uart_port *port)
314 UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC
315 | ATMEL_US_DCDIC | ATMEL_US_CTSIC);
319 * Control the transmission of a break signal
321 static void atmel_break_ctl(struct uart_port *port, int break_state)
323 if (break_state != 0)
324 UART_PUT_CR(port, ATMEL_US_STTBRK); /* start break */
325 else
326 UART_PUT_CR(port, ATMEL_US_STPBRK); /* stop break */
330 * Stores the incoming character in the ring buffer
332 static void
333 atmel_buffer_rx_char(struct uart_port *port, unsigned int status,
334 unsigned int ch)
336 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
337 struct circ_buf *ring = &atmel_port->rx_ring;
338 struct atmel_uart_char *c;
340 if (!CIRC_SPACE(ring->head, ring->tail, ATMEL_SERIAL_RINGSIZE))
341 /* Buffer overflow, ignore char */
342 return;
344 c = &((struct atmel_uart_char *)ring->buf)[ring->head];
345 c->status = status;
346 c->ch = ch;
348 /* Make sure the character is stored before we update head. */
349 smp_wmb();
351 ring->head = (ring->head + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
355 * Deal with parity, framing and overrun errors.
357 static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status)
359 /* clear error */
360 UART_PUT_CR(port, ATMEL_US_RSTSTA);
362 if (status & ATMEL_US_RXBRK) {
363 /* ignore side-effect */
364 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
365 port->icount.brk++;
367 if (status & ATMEL_US_PARE)
368 port->icount.parity++;
369 if (status & ATMEL_US_FRAME)
370 port->icount.frame++;
371 if (status & ATMEL_US_OVRE)
372 port->icount.overrun++;
376 * Characters received (called from interrupt handler)
378 static void atmel_rx_chars(struct uart_port *port)
380 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
381 unsigned int status, ch;
383 status = UART_GET_CSR(port);
384 while (status & ATMEL_US_RXRDY) {
385 ch = UART_GET_CHAR(port);
388 * note that the error handling code is
389 * out of the main execution path
391 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
392 | ATMEL_US_OVRE | ATMEL_US_RXBRK)
393 || atmel_port->break_active)) {
395 /* clear error */
396 UART_PUT_CR(port, ATMEL_US_RSTSTA);
398 if (status & ATMEL_US_RXBRK
399 && !atmel_port->break_active) {
400 atmel_port->break_active = 1;
401 UART_PUT_IER(port, ATMEL_US_RXBRK);
402 } else {
404 * This is either the end-of-break
405 * condition or we've received at
406 * least one character without RXBRK
407 * being set. In both cases, the next
408 * RXBRK will indicate start-of-break.
410 UART_PUT_IDR(port, ATMEL_US_RXBRK);
411 status &= ~ATMEL_US_RXBRK;
412 atmel_port->break_active = 0;
416 atmel_buffer_rx_char(port, status, ch);
417 status = UART_GET_CSR(port);
420 tasklet_schedule(&atmel_port->tasklet);
424 * Transmit characters (called from tasklet with TXRDY interrupt
425 * disabled)
427 static void atmel_tx_chars(struct uart_port *port)
429 struct circ_buf *xmit = &port->info->xmit;
431 if (port->x_char && UART_GET_CSR(port) & ATMEL_US_TXRDY) {
432 UART_PUT_CHAR(port, port->x_char);
433 port->icount.tx++;
434 port->x_char = 0;
436 if (uart_circ_empty(xmit) || uart_tx_stopped(port))
437 return;
439 while (UART_GET_CSR(port) & ATMEL_US_TXRDY) {
440 UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
441 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
442 port->icount.tx++;
443 if (uart_circ_empty(xmit))
444 break;
447 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
448 uart_write_wakeup(port);
450 if (!uart_circ_empty(xmit))
451 UART_PUT_IER(port, ATMEL_US_TXRDY);
455 * receive interrupt handler.
457 static void
458 atmel_handle_receive(struct uart_port *port, unsigned int pending)
460 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
462 if (atmel_use_dma_rx(port)) {
464 * PDC receive. Just schedule the tasklet and let it
465 * figure out the details.
467 * TODO: We're not handling error flags correctly at
468 * the moment.
470 if (pending & (ATMEL_US_ENDRX | ATMEL_US_TIMEOUT)) {
471 UART_PUT_IDR(port, (ATMEL_US_ENDRX
472 | ATMEL_US_TIMEOUT));
473 tasklet_schedule(&atmel_port->tasklet);
476 if (pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE |
477 ATMEL_US_FRAME | ATMEL_US_PARE))
478 atmel_pdc_rxerr(port, pending);
481 /* Interrupt receive */
482 if (pending & ATMEL_US_RXRDY)
483 atmel_rx_chars(port);
484 else if (pending & ATMEL_US_RXBRK) {
486 * End of break detected. If it came along with a
487 * character, atmel_rx_chars will handle it.
489 UART_PUT_CR(port, ATMEL_US_RSTSTA);
490 UART_PUT_IDR(port, ATMEL_US_RXBRK);
491 atmel_port->break_active = 0;
496 * transmit interrupt handler. (Transmit is IRQF_NODELAY safe)
498 static void
499 atmel_handle_transmit(struct uart_port *port, unsigned int pending)
501 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
503 if (atmel_use_dma_tx(port)) {
504 /* PDC transmit */
505 if (pending & (ATMEL_US_ENDTX | ATMEL_US_TXBUFE)) {
506 UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
507 tasklet_schedule(&atmel_port->tasklet);
509 } else {
510 /* Interrupt transmit */
511 if (pending & ATMEL_US_TXRDY) {
512 UART_PUT_IDR(port, ATMEL_US_TXRDY);
513 tasklet_schedule(&atmel_port->tasklet);
519 * status flags interrupt handler.
521 static void
522 atmel_handle_status(struct uart_port *port, unsigned int pending,
523 unsigned int status)
525 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
527 if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC
528 | ATMEL_US_CTSIC)) {
529 atmel_port->irq_status = status;
530 tasklet_schedule(&atmel_port->tasklet);
535 * Interrupt handler
537 static irqreturn_t atmel_interrupt(int irq, void *dev_id)
539 struct uart_port *port = dev_id;
540 unsigned int status, pending, pass_counter = 0;
542 do {
543 status = UART_GET_CSR(port);
544 pending = status & UART_GET_IMR(port);
545 if (!pending)
546 break;
548 atmel_handle_receive(port, pending);
549 atmel_handle_status(port, pending, status);
550 atmel_handle_transmit(port, pending);
551 } while (pass_counter++ < ATMEL_ISR_PASS_LIMIT);
553 return pass_counter ? IRQ_HANDLED : IRQ_NONE;
557 * Called from tasklet with ENDTX and TXBUFE interrupts disabled.
559 static void atmel_tx_dma(struct uart_port *port)
561 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
562 struct circ_buf *xmit = &port->info->xmit;
563 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
564 int count;
566 /* nothing left to transmit? */
567 if (UART_GET_TCR(port))
568 return;
570 xmit->tail += pdc->ofs;
571 xmit->tail &= UART_XMIT_SIZE - 1;
573 port->icount.tx += pdc->ofs;
574 pdc->ofs = 0;
576 /* more to transmit - setup next transfer */
578 /* disable PDC transmit */
579 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
581 if (!uart_circ_empty(xmit)) {
582 dma_sync_single_for_device(port->dev,
583 pdc->dma_addr,
584 pdc->dma_size,
585 DMA_TO_DEVICE);
587 count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
588 pdc->ofs = count;
590 UART_PUT_TPR(port, pdc->dma_addr + xmit->tail);
591 UART_PUT_TCR(port, count);
592 /* re-enable PDC transmit and interrupts */
593 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
594 UART_PUT_IER(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
597 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
598 uart_write_wakeup(port);
601 static void atmel_rx_from_ring(struct uart_port *port)
603 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
604 struct circ_buf *ring = &atmel_port->rx_ring;
605 unsigned int flg;
606 unsigned int status;
608 while (ring->head != ring->tail) {
609 struct atmel_uart_char c;
611 /* Make sure c is loaded after head. */
612 smp_rmb();
614 c = ((struct atmel_uart_char *)ring->buf)[ring->tail];
616 ring->tail = (ring->tail + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
618 port->icount.rx++;
619 status = c.status;
620 flg = TTY_NORMAL;
623 * note that the error handling code is
624 * out of the main execution path
626 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
627 | ATMEL_US_OVRE | ATMEL_US_RXBRK))) {
628 if (status & ATMEL_US_RXBRK) {
629 /* ignore side-effect */
630 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
632 port->icount.brk++;
633 if (uart_handle_break(port))
634 continue;
636 if (status & ATMEL_US_PARE)
637 port->icount.parity++;
638 if (status & ATMEL_US_FRAME)
639 port->icount.frame++;
640 if (status & ATMEL_US_OVRE)
641 port->icount.overrun++;
643 status &= port->read_status_mask;
645 if (status & ATMEL_US_RXBRK)
646 flg = TTY_BREAK;
647 else if (status & ATMEL_US_PARE)
648 flg = TTY_PARITY;
649 else if (status & ATMEL_US_FRAME)
650 flg = TTY_FRAME;
654 if (uart_handle_sysrq_char(port, c.ch))
655 continue;
657 uart_insert_char(port, status, ATMEL_US_OVRE, c.ch, flg);
661 * Drop the lock here since it might end up calling
662 * uart_start(), which takes the lock.
664 spin_unlock(&port->lock);
665 tty_flip_buffer_push(port->info->tty);
666 spin_lock(&port->lock);
669 static void atmel_rx_from_dma(struct uart_port *port)
671 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
672 struct tty_struct *tty = port->info->tty;
673 struct atmel_dma_buffer *pdc;
674 int rx_idx = atmel_port->pdc_rx_idx;
675 unsigned int head;
676 unsigned int tail;
677 unsigned int count;
679 do {
680 /* Reset the UART timeout early so that we don't miss one */
681 UART_PUT_CR(port, ATMEL_US_STTTO);
683 pdc = &atmel_port->pdc_rx[rx_idx];
684 head = UART_GET_RPR(port) - pdc->dma_addr;
685 tail = pdc->ofs;
687 /* If the PDC has switched buffers, RPR won't contain
688 * any address within the current buffer. Since head
689 * is unsigned, we just need a one-way comparison to
690 * find out.
692 * In this case, we just need to consume the entire
693 * buffer and resubmit it for DMA. This will clear the
694 * ENDRX bit as well, so that we can safely re-enable
695 * all interrupts below.
697 head = min(head, pdc->dma_size);
699 if (likely(head != tail)) {
700 dma_sync_single_for_cpu(port->dev, pdc->dma_addr,
701 pdc->dma_size, DMA_FROM_DEVICE);
704 * head will only wrap around when we recycle
705 * the DMA buffer, and when that happens, we
706 * explicitly set tail to 0. So head will
707 * always be greater than tail.
709 count = head - tail;
711 tty_insert_flip_string(tty, pdc->buf + pdc->ofs, count);
713 dma_sync_single_for_device(port->dev, pdc->dma_addr,
714 pdc->dma_size, DMA_FROM_DEVICE);
716 port->icount.rx += count;
717 pdc->ofs = head;
721 * If the current buffer is full, we need to check if
722 * the next one contains any additional data.
724 if (head >= pdc->dma_size) {
725 pdc->ofs = 0;
726 UART_PUT_RNPR(port, pdc->dma_addr);
727 UART_PUT_RNCR(port, pdc->dma_size);
729 rx_idx = !rx_idx;
730 atmel_port->pdc_rx_idx = rx_idx;
732 } while (head >= pdc->dma_size);
735 * Drop the lock here since it might end up calling
736 * uart_start(), which takes the lock.
738 spin_unlock(&port->lock);
739 tty_flip_buffer_push(tty);
740 spin_lock(&port->lock);
742 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
746 * tasklet handling tty stuff outside the interrupt handler.
748 static void atmel_tasklet_func(unsigned long data)
750 struct uart_port *port = (struct uart_port *)data;
751 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
752 unsigned int status;
753 unsigned int status_change;
755 /* The interrupt handler does not take the lock */
756 spin_lock(&port->lock);
758 if (atmel_use_dma_tx(port))
759 atmel_tx_dma(port);
760 else
761 atmel_tx_chars(port);
763 status = atmel_port->irq_status;
764 status_change = status ^ atmel_port->irq_status_prev;
766 if (status_change & (ATMEL_US_RI | ATMEL_US_DSR
767 | ATMEL_US_DCD | ATMEL_US_CTS)) {
768 /* TODO: All reads to CSR will clear these interrupts! */
769 if (status_change & ATMEL_US_RI)
770 port->icount.rng++;
771 if (status_change & ATMEL_US_DSR)
772 port->icount.dsr++;
773 if (status_change & ATMEL_US_DCD)
774 uart_handle_dcd_change(port, !(status & ATMEL_US_DCD));
775 if (status_change & ATMEL_US_CTS)
776 uart_handle_cts_change(port, !(status & ATMEL_US_CTS));
778 wake_up_interruptible(&port->info->delta_msr_wait);
780 atmel_port->irq_status_prev = status;
783 if (atmel_use_dma_rx(port))
784 atmel_rx_from_dma(port);
785 else
786 atmel_rx_from_ring(port);
788 spin_unlock(&port->lock);
792 * Perform initialization and enable port for reception
794 static int atmel_startup(struct uart_port *port)
796 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
797 struct tty_struct *tty = port->info->tty;
798 int retval;
801 * Ensure that no interrupts are enabled otherwise when
802 * request_irq() is called we could get stuck trying to
803 * handle an unexpected interrupt
805 UART_PUT_IDR(port, -1);
808 * Allocate the IRQ
810 retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED,
811 tty ? tty->name : "atmel_serial", port);
812 if (retval) {
813 printk("atmel_serial: atmel_startup - Can't get irq\n");
814 return retval;
818 * Initialize DMA (if necessary)
820 if (atmel_use_dma_rx(port)) {
821 int i;
823 for (i = 0; i < 2; i++) {
824 struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
826 pdc->buf = kmalloc(PDC_BUFFER_SIZE, GFP_KERNEL);
827 if (pdc->buf == NULL) {
828 if (i != 0) {
829 dma_unmap_single(port->dev,
830 atmel_port->pdc_rx[0].dma_addr,
831 PDC_BUFFER_SIZE,
832 DMA_FROM_DEVICE);
833 kfree(atmel_port->pdc_rx[0].buf);
835 free_irq(port->irq, port);
836 return -ENOMEM;
838 pdc->dma_addr = dma_map_single(port->dev,
839 pdc->buf,
840 PDC_BUFFER_SIZE,
841 DMA_FROM_DEVICE);
842 pdc->dma_size = PDC_BUFFER_SIZE;
843 pdc->ofs = 0;
846 atmel_port->pdc_rx_idx = 0;
848 UART_PUT_RPR(port, atmel_port->pdc_rx[0].dma_addr);
849 UART_PUT_RCR(port, PDC_BUFFER_SIZE);
851 UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr);
852 UART_PUT_RNCR(port, PDC_BUFFER_SIZE);
854 if (atmel_use_dma_tx(port)) {
855 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
856 struct circ_buf *xmit = &port->info->xmit;
858 pdc->buf = xmit->buf;
859 pdc->dma_addr = dma_map_single(port->dev,
860 pdc->buf,
861 UART_XMIT_SIZE,
862 DMA_TO_DEVICE);
863 pdc->dma_size = UART_XMIT_SIZE;
864 pdc->ofs = 0;
868 * If there is a specific "open" function (to register
869 * control line interrupts)
871 if (atmel_open_hook) {
872 retval = atmel_open_hook(port);
873 if (retval) {
874 free_irq(port->irq, port);
875 return retval;
880 * Finally, enable the serial port
882 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
883 /* enable xmit & rcvr */
884 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
886 if (atmel_use_dma_rx(port)) {
887 /* set UART timeout */
888 UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
889 UART_PUT_CR(port, ATMEL_US_STTTO);
891 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
892 /* enable PDC controller */
893 UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
894 } else {
895 /* enable receive only */
896 UART_PUT_IER(port, ATMEL_US_RXRDY);
899 return 0;
903 * Disable the port
905 static void atmel_shutdown(struct uart_port *port)
907 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
909 * Ensure everything is stopped.
911 atmel_stop_rx(port);
912 atmel_stop_tx(port);
915 * Shut-down the DMA.
917 if (atmel_use_dma_rx(port)) {
918 int i;
920 for (i = 0; i < 2; i++) {
921 struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
923 dma_unmap_single(port->dev,
924 pdc->dma_addr,
925 pdc->dma_size,
926 DMA_FROM_DEVICE);
927 kfree(pdc->buf);
930 if (atmel_use_dma_tx(port)) {
931 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
933 dma_unmap_single(port->dev,
934 pdc->dma_addr,
935 pdc->dma_size,
936 DMA_TO_DEVICE);
940 * Disable all interrupts, port and break condition.
942 UART_PUT_CR(port, ATMEL_US_RSTSTA);
943 UART_PUT_IDR(port, -1);
946 * Free the interrupt
948 free_irq(port->irq, port);
951 * If there is a specific "close" function (to unregister
952 * control line interrupts)
954 if (atmel_close_hook)
955 atmel_close_hook(port);
959 * Power / Clock management.
961 static void atmel_serial_pm(struct uart_port *port, unsigned int state,
962 unsigned int oldstate)
964 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
966 switch (state) {
967 case 0:
969 * Enable the peripheral clock for this serial port.
970 * This is called on uart_open() or a resume event.
972 clk_enable(atmel_port->clk);
973 break;
974 case 3:
976 * Disable the peripheral clock for this serial port.
977 * This is called on uart_close() or a suspend event.
979 clk_disable(atmel_port->clk);
980 break;
981 default:
982 printk(KERN_ERR "atmel_serial: unknown pm %d\n", state);
987 * Change the port parameters
989 static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
990 struct ktermios *old)
992 unsigned long flags;
993 unsigned int mode, imr, quot, baud;
995 /* Get current mode register */
996 mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL
997 | ATMEL_US_NBSTOP | ATMEL_US_PAR);
999 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
1000 quot = uart_get_divisor(port, baud);
1002 if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */
1003 quot /= 8;
1004 mode |= ATMEL_US_USCLKS_MCK_DIV8;
1007 /* byte size */
1008 switch (termios->c_cflag & CSIZE) {
1009 case CS5:
1010 mode |= ATMEL_US_CHRL_5;
1011 break;
1012 case CS6:
1013 mode |= ATMEL_US_CHRL_6;
1014 break;
1015 case CS7:
1016 mode |= ATMEL_US_CHRL_7;
1017 break;
1018 default:
1019 mode |= ATMEL_US_CHRL_8;
1020 break;
1023 /* stop bits */
1024 if (termios->c_cflag & CSTOPB)
1025 mode |= ATMEL_US_NBSTOP_2;
1027 /* parity */
1028 if (termios->c_cflag & PARENB) {
1029 /* Mark or Space parity */
1030 if (termios->c_cflag & CMSPAR) {
1031 if (termios->c_cflag & PARODD)
1032 mode |= ATMEL_US_PAR_MARK;
1033 else
1034 mode |= ATMEL_US_PAR_SPACE;
1035 } else if (termios->c_cflag & PARODD)
1036 mode |= ATMEL_US_PAR_ODD;
1037 else
1038 mode |= ATMEL_US_PAR_EVEN;
1039 } else
1040 mode |= ATMEL_US_PAR_NONE;
1042 spin_lock_irqsave(&port->lock, flags);
1044 port->read_status_mask = ATMEL_US_OVRE;
1045 if (termios->c_iflag & INPCK)
1046 port->read_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
1047 if (termios->c_iflag & (BRKINT | PARMRK))
1048 port->read_status_mask |= ATMEL_US_RXBRK;
1050 if (atmel_use_dma_rx(port))
1051 /* need to enable error interrupts */
1052 UART_PUT_IER(port, port->read_status_mask);
1055 * Characters to ignore
1057 port->ignore_status_mask = 0;
1058 if (termios->c_iflag & IGNPAR)
1059 port->ignore_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
1060 if (termios->c_iflag & IGNBRK) {
1061 port->ignore_status_mask |= ATMEL_US_RXBRK;
1063 * If we're ignoring parity and break indicators,
1064 * ignore overruns too (for real raw support).
1066 if (termios->c_iflag & IGNPAR)
1067 port->ignore_status_mask |= ATMEL_US_OVRE;
1069 /* TODO: Ignore all characters if CREAD is set.*/
1071 /* update the per-port timeout */
1072 uart_update_timeout(port, termios->c_cflag, baud);
1074 /* save/disable interrupts and drain transmitter */
1075 imr = UART_GET_IMR(port);
1076 UART_PUT_IDR(port, -1);
1077 while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY))
1078 cpu_relax();
1080 /* disable receiver and transmitter */
1081 UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS);
1083 /* set the parity, stop bits and data size */
1084 UART_PUT_MR(port, mode);
1086 /* set the baud rate */
1087 UART_PUT_BRGR(port, quot);
1088 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
1089 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
1091 /* restore interrupts */
1092 UART_PUT_IER(port, imr);
1094 /* CTS flow-control and modem-status interrupts */
1095 if (UART_ENABLE_MS(port, termios->c_cflag))
1096 port->ops->enable_ms(port);
1098 spin_unlock_irqrestore(&port->lock, flags);
1102 * Return string describing the specified port
1104 static const char *atmel_type(struct uart_port *port)
1106 return (port->type == PORT_ATMEL) ? "ATMEL_SERIAL" : NULL;
1110 * Release the memory region(s) being used by 'port'.
1112 static void atmel_release_port(struct uart_port *port)
1114 struct platform_device *pdev = to_platform_device(port->dev);
1115 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
1117 release_mem_region(port->mapbase, size);
1119 if (port->flags & UPF_IOREMAP) {
1120 iounmap(port->membase);
1121 port->membase = NULL;
1126 * Request the memory region(s) being used by 'port'.
1128 static int atmel_request_port(struct uart_port *port)
1130 struct platform_device *pdev = to_platform_device(port->dev);
1131 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
1133 if (!request_mem_region(port->mapbase, size, "atmel_serial"))
1134 return -EBUSY;
1136 if (port->flags & UPF_IOREMAP) {
1137 port->membase = ioremap(port->mapbase, size);
1138 if (port->membase == NULL) {
1139 release_mem_region(port->mapbase, size);
1140 return -ENOMEM;
1144 return 0;
1148 * Configure/autoconfigure the port.
1150 static void atmel_config_port(struct uart_port *port, int flags)
1152 if (flags & UART_CONFIG_TYPE) {
1153 port->type = PORT_ATMEL;
1154 atmel_request_port(port);
1159 * Verify the new serial_struct (for TIOCSSERIAL).
1161 static int atmel_verify_port(struct uart_port *port, struct serial_struct *ser)
1163 int ret = 0;
1164 if (ser->type != PORT_UNKNOWN && ser->type != PORT_ATMEL)
1165 ret = -EINVAL;
1166 if (port->irq != ser->irq)
1167 ret = -EINVAL;
1168 if (ser->io_type != SERIAL_IO_MEM)
1169 ret = -EINVAL;
1170 if (port->uartclk / 16 != ser->baud_base)
1171 ret = -EINVAL;
1172 if ((void *)port->mapbase != ser->iomem_base)
1173 ret = -EINVAL;
1174 if (port->iobase != ser->port)
1175 ret = -EINVAL;
1176 if (ser->hub6 != 0)
1177 ret = -EINVAL;
1178 return ret;
1181 static struct uart_ops atmel_pops = {
1182 .tx_empty = atmel_tx_empty,
1183 .set_mctrl = atmel_set_mctrl,
1184 .get_mctrl = atmel_get_mctrl,
1185 .stop_tx = atmel_stop_tx,
1186 .start_tx = atmel_start_tx,
1187 .stop_rx = atmel_stop_rx,
1188 .enable_ms = atmel_enable_ms,
1189 .break_ctl = atmel_break_ctl,
1190 .startup = atmel_startup,
1191 .shutdown = atmel_shutdown,
1192 .set_termios = atmel_set_termios,
1193 .type = atmel_type,
1194 .release_port = atmel_release_port,
1195 .request_port = atmel_request_port,
1196 .config_port = atmel_config_port,
1197 .verify_port = atmel_verify_port,
1198 .pm = atmel_serial_pm,
1202 * Configure the port from the platform device resource info.
1204 static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port,
1205 struct platform_device *pdev)
1207 struct uart_port *port = &atmel_port->uart;
1208 struct atmel_uart_data *data = pdev->dev.platform_data;
1210 port->iotype = UPIO_MEM;
1211 port->flags = UPF_BOOT_AUTOCONF;
1212 port->ops = &atmel_pops;
1213 port->fifosize = 1;
1214 port->line = pdev->id;
1215 port->dev = &pdev->dev;
1217 port->mapbase = pdev->resource[0].start;
1218 port->irq = pdev->resource[1].start;
1220 tasklet_init(&atmel_port->tasklet, atmel_tasklet_func,
1221 (unsigned long)port);
1223 memset(&atmel_port->rx_ring, 0, sizeof(atmel_port->rx_ring));
1225 if (data->regs)
1226 /* Already mapped by setup code */
1227 port->membase = data->regs;
1228 else {
1229 port->flags |= UPF_IOREMAP;
1230 port->membase = NULL;
1233 /* for console, the clock could already be configured */
1234 if (!atmel_port->clk) {
1235 atmel_port->clk = clk_get(&pdev->dev, "usart");
1236 clk_enable(atmel_port->clk);
1237 port->uartclk = clk_get_rate(atmel_port->clk);
1240 atmel_port->use_dma_rx = data->use_dma_rx;
1241 atmel_port->use_dma_tx = data->use_dma_tx;
1242 if (atmel_use_dma_tx(port))
1243 port->fifosize = PDC_BUFFER_SIZE;
1247 * Register board-specific modem-control line handlers.
1249 void __init atmel_register_uart_fns(struct atmel_port_fns *fns)
1251 if (fns->enable_ms)
1252 atmel_pops.enable_ms = fns->enable_ms;
1253 if (fns->get_mctrl)
1254 atmel_pops.get_mctrl = fns->get_mctrl;
1255 if (fns->set_mctrl)
1256 atmel_pops.set_mctrl = fns->set_mctrl;
1257 atmel_open_hook = fns->open;
1258 atmel_close_hook = fns->close;
1259 atmel_pops.pm = fns->pm;
1260 atmel_pops.set_wake = fns->set_wake;
1263 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
1264 static void atmel_console_putchar(struct uart_port *port, int ch)
1266 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
1267 cpu_relax();
1268 UART_PUT_CHAR(port, ch);
1272 * Interrupts are disabled on entering
1274 static void atmel_console_write(struct console *co, const char *s, u_int count)
1276 struct uart_port *port = &atmel_ports[co->index].uart;
1277 unsigned int status, imr;
1278 unsigned int pdc_tx;
1281 * First, save IMR and then disable interrupts
1283 imr = UART_GET_IMR(port);
1284 UART_PUT_IDR(port, ATMEL_US_RXRDY | ATMEL_US_TXRDY);
1286 /* Store PDC transmit status and disable it */
1287 pdc_tx = UART_GET_PTSR(port) & ATMEL_PDC_TXTEN;
1288 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
1290 uart_console_write(port, s, count, atmel_console_putchar);
1293 * Finally, wait for transmitter to become empty
1294 * and restore IMR
1296 do {
1297 status = UART_GET_CSR(port);
1298 } while (!(status & ATMEL_US_TXRDY));
1300 /* Restore PDC transmit status */
1301 if (pdc_tx)
1302 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
1304 /* set interrupts back the way they were */
1305 UART_PUT_IER(port, imr);
1309 * If the port was already initialised (eg, by a boot loader),
1310 * try to determine the current setup.
1312 static void __init atmel_console_get_options(struct uart_port *port, int *baud,
1313 int *parity, int *bits)
1315 unsigned int mr, quot;
1318 * If the baud rate generator isn't running, the port wasn't
1319 * initialized by the boot loader.
1321 quot = UART_GET_BRGR(port);
1322 if (!quot)
1323 return;
1325 mr = UART_GET_MR(port) & ATMEL_US_CHRL;
1326 if (mr == ATMEL_US_CHRL_8)
1327 *bits = 8;
1328 else
1329 *bits = 7;
1331 mr = UART_GET_MR(port) & ATMEL_US_PAR;
1332 if (mr == ATMEL_US_PAR_EVEN)
1333 *parity = 'e';
1334 else if (mr == ATMEL_US_PAR_ODD)
1335 *parity = 'o';
1338 * The serial core only rounds down when matching this to a
1339 * supported baud rate. Make sure we don't end up slightly
1340 * lower than one of those, as it would make us fall through
1341 * to a much lower baud rate than we really want.
1343 *baud = port->uartclk / (16 * (quot - 1));
1346 static int __init atmel_console_setup(struct console *co, char *options)
1348 struct uart_port *port = &atmel_ports[co->index].uart;
1349 int baud = 115200;
1350 int bits = 8;
1351 int parity = 'n';
1352 int flow = 'n';
1354 if (port->membase == NULL) {
1355 /* Port not initialized yet - delay setup */
1356 return -ENODEV;
1359 UART_PUT_IDR(port, -1);
1360 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
1361 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
1363 if (options)
1364 uart_parse_options(options, &baud, &parity, &bits, &flow);
1365 else
1366 atmel_console_get_options(port, &baud, &parity, &bits);
1368 return uart_set_options(port, co, baud, parity, bits, flow);
1371 static struct uart_driver atmel_uart;
1373 static struct console atmel_console = {
1374 .name = ATMEL_DEVICENAME,
1375 .write = atmel_console_write,
1376 .device = uart_console_device,
1377 .setup = atmel_console_setup,
1378 .flags = CON_PRINTBUFFER,
1379 .index = -1,
1380 .data = &atmel_uart,
1383 #define ATMEL_CONSOLE_DEVICE &atmel_console
1386 * Early console initialization (before VM subsystem initialized).
1388 static int __init atmel_console_init(void)
1390 if (atmel_default_console_device) {
1391 add_preferred_console(ATMEL_DEVICENAME,
1392 atmel_default_console_device->id, NULL);
1393 atmel_init_port(&atmel_ports[atmel_default_console_device->id],
1394 atmel_default_console_device);
1395 register_console(&atmel_console);
1398 return 0;
1401 console_initcall(atmel_console_init);
1404 * Late console initialization.
1406 static int __init atmel_late_console_init(void)
1408 if (atmel_default_console_device
1409 && !(atmel_console.flags & CON_ENABLED))
1410 register_console(&atmel_console);
1412 return 0;
1415 core_initcall(atmel_late_console_init);
1417 static inline bool atmel_is_console_port(struct uart_port *port)
1419 return port->cons && port->cons->index == port->line;
1422 #else
1423 #define ATMEL_CONSOLE_DEVICE NULL
1425 static inline bool atmel_is_console_port(struct uart_port *port)
1427 return false;
1429 #endif
1431 static struct uart_driver atmel_uart = {
1432 .owner = THIS_MODULE,
1433 .driver_name = "atmel_serial",
1434 .dev_name = ATMEL_DEVICENAME,
1435 .major = SERIAL_ATMEL_MAJOR,
1436 .minor = MINOR_START,
1437 .nr = ATMEL_MAX_UART,
1438 .cons = ATMEL_CONSOLE_DEVICE,
1441 #ifdef CONFIG_PM
1442 static int atmel_serial_suspend(struct platform_device *pdev,
1443 pm_message_t state)
1445 struct uart_port *port = platform_get_drvdata(pdev);
1446 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1448 if (device_may_wakeup(&pdev->dev)
1449 && !at91_suspend_entering_slow_clock())
1450 enable_irq_wake(port->irq);
1451 else {
1452 uart_suspend_port(&atmel_uart, port);
1453 atmel_port->suspended = 1;
1456 return 0;
1459 static int atmel_serial_resume(struct platform_device *pdev)
1461 struct uart_port *port = platform_get_drvdata(pdev);
1462 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1464 if (atmel_port->suspended) {
1465 uart_resume_port(&atmel_uart, port);
1466 atmel_port->suspended = 0;
1467 } else
1468 disable_irq_wake(port->irq);
1470 return 0;
1472 #else
1473 #define atmel_serial_suspend NULL
1474 #define atmel_serial_resume NULL
1475 #endif
1477 static int __devinit atmel_serial_probe(struct platform_device *pdev)
1479 struct atmel_uart_port *port;
1480 void *data;
1481 int ret;
1483 BUILD_BUG_ON(!is_power_of_2(ATMEL_SERIAL_RINGSIZE));
1485 port = &atmel_ports[pdev->id];
1486 atmel_init_port(port, pdev);
1488 if (!atmel_use_dma_rx(&port->uart)) {
1489 ret = -ENOMEM;
1490 data = kmalloc(sizeof(struct atmel_uart_char)
1491 * ATMEL_SERIAL_RINGSIZE, GFP_KERNEL);
1492 if (!data)
1493 goto err_alloc_ring;
1494 port->rx_ring.buf = data;
1497 ret = uart_add_one_port(&atmel_uart, &port->uart);
1498 if (ret)
1499 goto err_add_port;
1501 device_init_wakeup(&pdev->dev, 1);
1502 platform_set_drvdata(pdev, port);
1504 return 0;
1506 err_add_port:
1507 kfree(port->rx_ring.buf);
1508 port->rx_ring.buf = NULL;
1509 err_alloc_ring:
1510 if (!atmel_is_console_port(&port->uart)) {
1511 clk_disable(port->clk);
1512 clk_put(port->clk);
1513 port->clk = NULL;
1516 return ret;
1519 static int __devexit atmel_serial_remove(struct platform_device *pdev)
1521 struct uart_port *port = platform_get_drvdata(pdev);
1522 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1523 int ret = 0;
1525 device_init_wakeup(&pdev->dev, 0);
1526 platform_set_drvdata(pdev, NULL);
1528 ret = uart_remove_one_port(&atmel_uart, port);
1530 tasklet_kill(&atmel_port->tasklet);
1531 kfree(atmel_port->rx_ring.buf);
1533 /* "port" is allocated statically, so we shouldn't free it */
1535 clk_disable(atmel_port->clk);
1536 clk_put(atmel_port->clk);
1538 return ret;
1541 static struct platform_driver atmel_serial_driver = {
1542 .probe = atmel_serial_probe,
1543 .remove = __devexit_p(atmel_serial_remove),
1544 .suspend = atmel_serial_suspend,
1545 .resume = atmel_serial_resume,
1546 .driver = {
1547 .name = "atmel_usart",
1548 .owner = THIS_MODULE,
1552 static int __init atmel_serial_init(void)
1554 int ret;
1556 ret = uart_register_driver(&atmel_uart);
1557 if (ret)
1558 return ret;
1560 ret = platform_driver_register(&atmel_serial_driver);
1561 if (ret)
1562 uart_unregister_driver(&atmel_uart);
1564 return ret;
1567 static void __exit atmel_serial_exit(void)
1569 platform_driver_unregister(&atmel_serial_driver);
1570 uart_unregister_driver(&atmel_uart);
1573 module_init(atmel_serial_init);
1574 module_exit(atmel_serial_exit);
1576 MODULE_AUTHOR("Rick Bronson");
1577 MODULE_DESCRIPTION("Atmel AT91 / AT32 serial port driver");
1578 MODULE_LICENSE("GPL");
1579 MODULE_ALIAS("platform:atmel_usart");