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Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
[linux-2.6/linux-mips/linux-dm7025.git] / drivers / serial / bfin_5xx.c
blob8a2f6a1baa74d5b09b31666dd46be9b7bca746c2
1 /*
2 * Blackfin On-Chip Serial Driver
3 *
4 * Copyright 2006-2007 Analog Devices Inc.
5 *
6 * Enter bugs at http://blackfin.uclinux.org/
7 *
8 * Licensed under the GPL-2 or later.
9 */
10
11 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
12 #define SUPPORT_SYSRQ
13 #endif
14
15 #include <linux/module.h>
16 #include <linux/ioport.h>
17 #include <linux/init.h>
18 #include <linux/console.h>
19 #include <linux/sysrq.h>
20 #include <linux/platform_device.h>
21 #include <linux/tty.h>
22 #include <linux/tty_flip.h>
23 #include <linux/serial_core.h>
24
25 #ifdef CONFIG_KGDB_UART
26 #include <linux/kgdb.h>
27 #include <asm/irq_regs.h>
28 #endif
29
30 #include <asm/gpio.h>
31 #include <asm/mach/bfin_serial_5xx.h>
32
33 #ifdef CONFIG_SERIAL_BFIN_DMA
34 #include <linux/dma-mapping.h>
35 #include <asm/io.h>
36 #include <asm/irq.h>
37 #include <asm/cacheflush.h>
38 #endif
39
40 /* UART name and device definitions */
41 #define BFIN_SERIAL_NAME "ttyBF"
42 #define BFIN_SERIAL_MAJOR 204
43 #define BFIN_SERIAL_MINOR 64
44
45 /*
46 * Setup for console. Argument comes from the menuconfig
47 */
48 #define DMA_RX_XCOUNT 512
49 #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
50
51 #define DMA_RX_FLUSH_JIFFIES (HZ / 50)
52
53 #ifdef CONFIG_SERIAL_BFIN_DMA
54 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
55 #else
56 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
57 #endif
58
59 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
60
61 /*
62 * interrupts are disabled on entry
63 */
64 static void bfin_serial_stop_tx(struct uart_port *port)
65 {
66 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
67 struct circ_buf *xmit = &uart->port.info->xmit;
68 #if !defined(CONFIG_BF54x) && !defined(CONFIG_SERIAL_BFIN_DMA)
69 unsigned short ier;
70 #endif
71
72 while (!(UART_GET_LSR(uart) & TEMT))
73 cpu_relax();
74
75 #ifdef CONFIG_SERIAL_BFIN_DMA
76 disable_dma(uart->tx_dma_channel);
77 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
78 uart->port.icount.tx += uart->tx_count;
79 uart->tx_count = 0;
80 uart->tx_done = 1;
81 #else
82 #ifdef CONFIG_BF54x
83 /* Clear TFI bit */
84 UART_PUT_LSR(uart, TFI);
85 UART_CLEAR_IER(uart, ETBEI);
86 #else
87 ier = UART_GET_IER(uart);
88 ier &= ~ETBEI;
89 UART_PUT_IER(uart, ier);
90 #endif
91 #endif
92 }
93
94 /*
95 * port is locked and interrupts are disabled
96 */
97 static void bfin_serial_start_tx(struct uart_port *port)
98 {
99 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
100
101 #ifdef CONFIG_SERIAL_BFIN_DMA
102 if (uart->tx_done)
103 bfin_serial_dma_tx_chars(uart);
104 #else
105 #ifdef CONFIG_BF54x
106 UART_SET_IER(uart, ETBEI);
107 #else
108 unsigned short ier;
109 ier = UART_GET_IER(uart);
110 ier |= ETBEI;
111 UART_PUT_IER(uart, ier);
112 #endif
113 bfin_serial_tx_chars(uart);
114 #endif
115 }
116
117 /*
118 * Interrupts are enabled
119 */
120 static void bfin_serial_stop_rx(struct uart_port *port)
121 {
122 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
123 #ifdef CONFIG_KGDB_UART
124 if (uart->port.line != CONFIG_KGDB_UART_PORT) {
125 #endif
126 #ifdef CONFIG_BF54x
127 UART_CLEAR_IER(uart, ERBFI);
128 #else
129 unsigned short ier;
130
131 ier = UART_GET_IER(uart);
132 ier &= ~ERBFI;
133 UART_PUT_IER(uart, ier);
134 #endif
135 #ifdef CONFIG_KGDB_UART
136 }
137 #endif
138 }
139
140 /*
141 * Set the modem control timer to fire immediately.
142 */
143 static void bfin_serial_enable_ms(struct uart_port *port)
144 {
145 }
146
147 #ifdef CONFIG_KGDB_UART
148 static int kgdb_entry_state;
149
150 void kgdb_put_debug_char(int chr)
151 {
152 struct bfin_serial_port *uart;
153
154 if (CONFIG_KGDB_UART_PORT < 0
155 || CONFIG_KGDB_UART_PORT >= BFIN_UART_NR_PORTS)
156 uart = &bfin_serial_ports[0];
157 else
158 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
159
160 while (!(UART_GET_LSR(uart) & THRE)) {
161 SSYNC();
162 }
163
164 #ifndef CONFIG_BF54x
165 UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
166 SSYNC();
167 #endif
168 UART_PUT_CHAR(uart, (unsigned char)chr);
169 SSYNC();
170 }
171
172 int kgdb_get_debug_char(void)
173 {
174 struct bfin_serial_port *uart;
175 unsigned char chr;
176
177 if (CONFIG_KGDB_UART_PORT < 0
178 || CONFIG_KGDB_UART_PORT >= BFIN_UART_NR_PORTS)
179 uart = &bfin_serial_ports[0];
180 else
181 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
182
183 while(!(UART_GET_LSR(uart) & DR)) {
184 SSYNC();
185 }
186 #ifndef CONFIG_BF54x
187 UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
188 SSYNC();
189 #endif
190 chr = UART_GET_CHAR(uart);
191 SSYNC();
192
193 return chr;
194 }
195 #endif
196
197 #if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
198 # define UART_GET_ANOMALY_THRESHOLD(uart) ((uart)->anomaly_threshold)
199 # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
200 #else
201 # define UART_GET_ANOMALY_THRESHOLD(uart) 0
202 # define UART_SET_ANOMALY_THRESHOLD(uart, v)
203 #endif
204
205 #ifdef CONFIG_SERIAL_BFIN_PIO
206 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
207 {
208 struct tty_struct *tty = uart->port.info->tty;
209 unsigned int status, ch, flg;
210 static struct timeval anomaly_start = { .tv_sec = 0 };
211 #ifdef CONFIG_KGDB_UART
212 struct pt_regs *regs = get_irq_regs();
213 #endif
214
215 status = UART_GET_LSR(uart);
216 UART_CLEAR_LSR(uart);
217
218 ch = UART_GET_CHAR(uart);
219 uart->port.icount.rx++;
220
221 #ifdef CONFIG_KGDB_UART
222 if (uart->port.line == CONFIG_KGDB_UART_PORT) {
223 if (uart->port.cons->index == CONFIG_KGDB_UART_PORT && ch == 0x1) { /* Ctrl + A */
224 kgdb_breakkey_pressed(regs);
225 return;
226 } else if (kgdb_entry_state == 0 && ch == '$') {/* connection from KGDB */
227 kgdb_entry_state = 1;
228 } else if (kgdb_entry_state == 1 && ch == 'q') {
229 kgdb_entry_state = 0;
230 kgdb_breakkey_pressed(regs);
231 return;
232 } else if (ch == 0x3) {/* Ctrl + C */
233 kgdb_entry_state = 0;
234 kgdb_breakkey_pressed(regs);
235 return;
236 } else {
237 kgdb_entry_state = 0;
238 }
239 }
240 #endif
241
242 if (ANOMALY_05000363) {
243 /* The BF533 (and BF561) family of processors have a nice anomaly
244 * where they continuously generate characters for a "single" break.
245 * We have to basically ignore this flood until the "next" valid
246 * character comes across. Due to the nature of the flood, it is
247 * not possible to reliably catch bytes that are sent too quickly
248 * after this break. So application code talking to the Blackfin
249 * which sends a break signal must allow at least 1.5 character
250 * times after the end of the break for things to stabilize. This
251 * timeout was picked as it must absolutely be larger than 1
252 * character time +/- some percent. So 1.5 sounds good. All other
253 * Blackfin families operate properly. Woo.
254 */
255 if (anomaly_start.tv_sec) {
256 struct timeval curr;
257 suseconds_t usecs;
258
259 if ((~ch & (~ch + 1)) & 0xff)
260 goto known_good_char;
261
262 do_gettimeofday(&curr);
263 if (curr.tv_sec - anomaly_start.tv_sec > 1)
264 goto known_good_char;
265
266 usecs = 0;
267 if (curr.tv_sec != anomaly_start.tv_sec)
268 usecs += USEC_PER_SEC;
269 usecs += curr.tv_usec - anomaly_start.tv_usec;
270
271 if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
272 goto known_good_char;
273
274 if (ch)
275 anomaly_start.tv_sec = 0;
276 else
277 anomaly_start = curr;
278
279 return;
280
281 known_good_char:
282 anomaly_start.tv_sec = 0;
283 }
284 }
285
286 if (status & BI) {
287 if (ANOMALY_05000363)
288 if (bfin_revid() < 5)
289 do_gettimeofday(&anomaly_start);
290 uart->port.icount.brk++;
291 if (uart_handle_break(&uart->port))
292 goto ignore_char;
293 status &= ~(PE | FE);
294 }
295 if (status & PE)
296 uart->port.icount.parity++;
297 if (status & OE)
298 uart->port.icount.overrun++;
299 if (status & FE)
300 uart->port.icount.frame++;
301
302 status &= uart->port.read_status_mask;
303
304 if (status & BI)
305 flg = TTY_BREAK;
306 else if (status & PE)
307 flg = TTY_PARITY;
308 else if (status & FE)
309 flg = TTY_FRAME;
310 else
311 flg = TTY_NORMAL;
312
313 if (uart_handle_sysrq_char(&uart->port, ch))
314 goto ignore_char;
315
316 uart_insert_char(&uart->port, status, OE, ch, flg);
317
318 ignore_char:
319 tty_flip_buffer_push(tty);
320 }
321
322 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
323 {
324 struct circ_buf *xmit = &uart->port.info->xmit;
325
326 if (uart->port.x_char) {
327 UART_PUT_CHAR(uart, uart->port.x_char);
328 uart->port.icount.tx++;
329 uart->port.x_char = 0;
330 }
331 /*
332 * Check the modem control lines before
333 * transmitting anything.
334 */
335 bfin_serial_mctrl_check(uart);
336
337 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
338 bfin_serial_stop_tx(&uart->port);
339 return;
340 }
341
342 while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
343 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
344 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
345 uart->port.icount.tx++;
346 SSYNC();
347 }
348
349 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
350 uart_write_wakeup(&uart->port);
351
352 if (uart_circ_empty(xmit))
353 bfin_serial_stop_tx(&uart->port);
354 }
355
356 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
357 {
358 struct bfin_serial_port *uart = dev_id;
359
360 spin_lock(&uart->port.lock);
361 while (UART_GET_LSR(uart) & DR)
362 bfin_serial_rx_chars(uart);
363 spin_unlock(&uart->port.lock);
364
365 return IRQ_HANDLED;
366 }
367
368 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
369 {
370 struct bfin_serial_port *uart = dev_id;
371
372 spin_lock(&uart->port.lock);
373 if (UART_GET_LSR(uart) & THRE)
374 bfin_serial_tx_chars(uart);
375 spin_unlock(&uart->port.lock);
376
377 return IRQ_HANDLED;
378 }
379 #endif
380
381 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
382 static void bfin_serial_do_work(struct work_struct *work)
383 {
384 struct bfin_serial_port *uart = container_of(work, struct bfin_serial_port, cts_workqueue);
385
386 bfin_serial_mctrl_check(uart);
387 }
388 #endif
389
390 #ifdef CONFIG_SERIAL_BFIN_DMA
391 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
392 {
393 struct circ_buf *xmit = &uart->port.info->xmit;
394 unsigned short ier;
395
396 uart->tx_done = 0;
397
398 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
399 uart->tx_count = 0;
400 uart->tx_done = 1;
401 return;
402 }
403
404 if (uart->port.x_char) {
405 UART_PUT_CHAR(uart, uart->port.x_char);
406 uart->port.icount.tx++;
407 uart->port.x_char = 0;
408 }
409
410 /*
411 * Check the modem control lines before
412 * transmitting anything.
413 */
414 bfin_serial_mctrl_check(uart);
415
416 uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
417 if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
418 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
419 blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
420 (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
421 set_dma_config(uart->tx_dma_channel,
422 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
423 INTR_ON_BUF,
424 DIMENSION_LINEAR,
425 DATA_SIZE_8,
426 DMA_SYNC_RESTART));
427 set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
428 set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
429 set_dma_x_modify(uart->tx_dma_channel, 1);
430 enable_dma(uart->tx_dma_channel);
431
432 #ifdef CONFIG_BF54x
433 UART_SET_IER(uart, ETBEI);
434 #else
435 ier = UART_GET_IER(uart);
436 ier |= ETBEI;
437 UART_PUT_IER(uart, ier);
438 #endif
439 }
440
441 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
442 {
443 struct tty_struct *tty = uart->port.info->tty;
444 int i, flg, status;
445
446 status = UART_GET_LSR(uart);
447 UART_CLEAR_LSR(uart);
448
449 uart->port.icount.rx +=
450 CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
451 UART_XMIT_SIZE);
452
453 if (status & BI) {
454 uart->port.icount.brk++;
455 if (uart_handle_break(&uart->port))
456 goto dma_ignore_char;
457 status &= ~(PE | FE);
458 }
459 if (status & PE)
460 uart->port.icount.parity++;
461 if (status & OE)
462 uart->port.icount.overrun++;
463 if (status & FE)
464 uart->port.icount.frame++;
465
466 status &= uart->port.read_status_mask;
467
468 if (status & BI)
469 flg = TTY_BREAK;
470 else if (status & PE)
471 flg = TTY_PARITY;
472 else if (status & FE)
473 flg = TTY_FRAME;
474 else
475 flg = TTY_NORMAL;
476
477 for (i = uart->rx_dma_buf.tail; i != uart->rx_dma_buf.head; i++) {
478 if (i >= UART_XMIT_SIZE)
479 i = 0;
480 if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
481 uart_insert_char(&uart->port, status, OE,
482 uart->rx_dma_buf.buf[i], flg);
483 }
484
485 dma_ignore_char:
486 tty_flip_buffer_push(tty);
487 }
488
489 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
490 {
491 int x_pos, pos;
492
493 uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
494 x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
495 uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
496 if (uart->rx_dma_nrows == DMA_RX_YCOUNT)
497 uart->rx_dma_nrows = 0;
498 x_pos = DMA_RX_XCOUNT - x_pos;
499 if (x_pos == DMA_RX_XCOUNT)
500 x_pos = 0;
501
502 pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
503 if (pos != uart->rx_dma_buf.tail) {
504 uart->rx_dma_buf.head = pos;
505 bfin_serial_dma_rx_chars(uart);
506 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
507 }
508
509 mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
510 }
511
512 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
513 {
514 struct bfin_serial_port *uart = dev_id;
515 struct circ_buf *xmit = &uart->port.info->xmit;
516 unsigned short ier;
517
518 spin_lock(&uart->port.lock);
519 if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
520 disable_dma(uart->tx_dma_channel);
521 clear_dma_irqstat(uart->tx_dma_channel);
522 #ifdef CONFIG_BF54x
523 UART_CLEAR_IER(uart, ETBEI);
524 #else
525 ier = UART_GET_IER(uart);
526 ier &= ~ETBEI;
527 UART_PUT_IER(uart, ier);
528 #endif
529 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
530 uart->port.icount.tx += uart->tx_count;
531
532 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
533 uart_write_wakeup(&uart->port);
534
535 bfin_serial_dma_tx_chars(uart);
536 }
537
538 spin_unlock(&uart->port.lock);
539 return IRQ_HANDLED;
540 }
541
542 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
543 {
544 struct bfin_serial_port *uart = dev_id;
545 unsigned short irqstat;
546
547 spin_lock(&uart->port.lock);
548 irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
549 clear_dma_irqstat(uart->rx_dma_channel);
550 spin_unlock(&uart->port.lock);
551
552 mod_timer(&(uart->rx_dma_timer), jiffies);
553
554 return IRQ_HANDLED;
555 }
556 #endif
557
558 /*
559 * Return TIOCSER_TEMT when transmitter is not busy.
560 */
561 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
562 {
563 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
564 unsigned short lsr;
565
566 lsr = UART_GET_LSR(uart);
567 if (lsr & TEMT)
568 return TIOCSER_TEMT;
569 else
570 return 0;
571 }
572
573 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
574 {
575 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
576 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
577 if (uart->cts_pin < 0)
578 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
579
580 # ifdef BF54x
581 if (UART_GET_MSR(uart) & CTS)
582 # else
583 if (gpio_get_value(uart->cts_pin))
584 # endif
585 return TIOCM_DSR | TIOCM_CAR;
586 else
587 #endif
588 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
589 }
590
591 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
592 {
593 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
594 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
595 if (uart->rts_pin < 0)
596 return;
597
598 if (mctrl & TIOCM_RTS)
599 # ifdef BF54x
600 UART_PUT_MCR(uart, UART_GET_MCR(uart) & ~MRTS);
601 # else
602 gpio_set_value(uart->rts_pin, 0);
603 # endif
604 else
605 # ifdef BF54x
606 UART_PUT_MCR(uart, UART_GET_MCR(uart) | MRTS);
607 # else
608 gpio_set_value(uart->rts_pin, 1);
609 # endif
610 #endif
611 }
612
613 /*
614 * Handle any change of modem status signal since we were last called.
615 */
616 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
617 {
618 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
619 unsigned int status;
620 struct uart_info *info = uart->port.info;
621 struct tty_struct *tty = info->tty;
622
623 status = bfin_serial_get_mctrl(&uart->port);
624 uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
625 if (!(status & TIOCM_CTS)) {
626 tty->hw_stopped = 1;
627 schedule_work(&uart->cts_workqueue);
628 } else {
629 tty->hw_stopped = 0;
630 }
631 #endif
632 }
633
634 /*
635 * Interrupts are always disabled.
636 */
637 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
638 {
639 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
640 u16 lcr = UART_GET_LCR(uart);
641 if (break_state)
642 lcr |= SB;
643 else
644 lcr &= ~SB;
645 UART_PUT_LCR(uart, lcr);
646 SSYNC();
647 }
648
649 static int bfin_serial_startup(struct uart_port *port)
650 {
651 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
652
653 #ifdef CONFIG_SERIAL_BFIN_DMA
654 dma_addr_t dma_handle;
655
656 if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
657 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
658 return -EBUSY;
659 }
660
661 if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
662 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
663 free_dma(uart->rx_dma_channel);
664 return -EBUSY;
665 }
666
667 set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
668 set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
669
670 uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
671 uart->rx_dma_buf.head = 0;
672 uart->rx_dma_buf.tail = 0;
673 uart->rx_dma_nrows = 0;
674
675 set_dma_config(uart->rx_dma_channel,
676 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
677 INTR_ON_ROW, DIMENSION_2D,
678 DATA_SIZE_8,
679 DMA_SYNC_RESTART));
680 set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
681 set_dma_x_modify(uart->rx_dma_channel, 1);
682 set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
683 set_dma_y_modify(uart->rx_dma_channel, 1);
684 set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
685 enable_dma(uart->rx_dma_channel);
686
687 uart->rx_dma_timer.data = (unsigned long)(uart);
688 uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
689 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
690 add_timer(&(uart->rx_dma_timer));
691 #else
692 if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
693 "BFIN_UART_RX", uart)) {
694 # ifdef CONFIG_KGDB_UART
695 if (uart->port.line != CONFIG_KGDB_UART_PORT) {
696 # endif
697 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
698 return -EBUSY;
699 # ifdef CONFIG_KGDB_UART
700 }
701 # endif
702 }
703
704
705 if (request_irq
706 (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
707 "BFIN_UART_TX", uart)) {
708 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
709 free_irq(uart->port.irq, uart);
710 return -EBUSY;
711 }
712 #endif
713 #ifdef CONFIG_BF54x
714 UART_SET_IER(uart, ERBFI);
715 #else
716 UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
717 #endif
718 return 0;
719 }
720
721 static void bfin_serial_shutdown(struct uart_port *port)
722 {
723 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
724
725 #ifdef CONFIG_SERIAL_BFIN_DMA
726 disable_dma(uart->tx_dma_channel);
727 free_dma(uart->tx_dma_channel);
728 disable_dma(uart->rx_dma_channel);
729 free_dma(uart->rx_dma_channel);
730 del_timer(&(uart->rx_dma_timer));
731 dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
732 #else
733 #ifdef CONFIG_KGDB_UART
734 if (uart->port.line != CONFIG_KGDB_UART_PORT)
735 #endif
736 free_irq(uart->port.irq, uart);
737 free_irq(uart->port.irq+1, uart);
738 #endif
739 }
740
741 static void
742 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
743 struct ktermios *old)
744 {
745 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
746 unsigned long flags;
747 unsigned int baud, quot;
748 unsigned short val, ier, lcr = 0;
749
750 switch (termios->c_cflag & CSIZE) {
751 case CS8:
752 lcr = WLS(8);
753 break;
754 case CS7:
755 lcr = WLS(7);
756 break;
757 case CS6:
758 lcr = WLS(6);
759 break;
760 case CS5:
761 lcr = WLS(5);
762 break;
763 default:
764 printk(KERN_ERR "%s: word lengh not supported\n",
765 __func__);
766 }
767
768 if (termios->c_cflag & CSTOPB)
769 lcr |= STB;
770 if (termios->c_cflag & PARENB)
771 lcr |= PEN;
772 if (!(termios->c_cflag & PARODD))
773 lcr |= EPS;
774 if (termios->c_cflag & CMSPAR)
775 lcr |= STP;
776
777 port->read_status_mask = OE;
778 if (termios->c_iflag & INPCK)
779 port->read_status_mask |= (FE | PE);
780 if (termios->c_iflag & (BRKINT | PARMRK))
781 port->read_status_mask |= BI;
782
783 /*
784 * Characters to ignore
785 */
786 port->ignore_status_mask = 0;
787 if (termios->c_iflag & IGNPAR)
788 port->ignore_status_mask |= FE | PE;
789 if (termios->c_iflag & IGNBRK) {
790 port->ignore_status_mask |= BI;
791 /*
792 * If we're ignoring parity and break indicators,
793 * ignore overruns too (for real raw support).
794 */
795 if (termios->c_iflag & IGNPAR)
796 port->ignore_status_mask |= OE;
797 }
798
799 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
800 quot = uart_get_divisor(port, baud);
801 spin_lock_irqsave(&uart->port.lock, flags);
802
803 UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
804
805 /* Disable UART */
806 ier = UART_GET_IER(uart);
807 #ifdef CONFIG_BF54x
808 UART_CLEAR_IER(uart, 0xF);
809 #else
810 UART_PUT_IER(uart, 0);
811 #endif
812
813 #ifndef CONFIG_BF54x
814 /* Set DLAB in LCR to Access DLL and DLH */
815 val = UART_GET_LCR(uart);
816 val |= DLAB;
817 UART_PUT_LCR(uart, val);
818 SSYNC();
819 #endif
820
821 UART_PUT_DLL(uart, quot & 0xFF);
822 SSYNC();
823 UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
824 SSYNC();
825
826 #ifndef CONFIG_BF54x
827 /* Clear DLAB in LCR to Access THR RBR IER */
828 val = UART_GET_LCR(uart);
829 val &= ~DLAB;
830 UART_PUT_LCR(uart, val);
831 SSYNC();
832 #endif
833
834 UART_PUT_LCR(uart, lcr);
835
836 /* Enable UART */
837 #ifdef CONFIG_BF54x
838 UART_SET_IER(uart, ier);
839 #else
840 UART_PUT_IER(uart, ier);
841 #endif
842
843 val = UART_GET_GCTL(uart);
844 val |= UCEN;
845 UART_PUT_GCTL(uart, val);
846
847 spin_unlock_irqrestore(&uart->port.lock, flags);
848 }
849
850 static const char *bfin_serial_type(struct uart_port *port)
851 {
852 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
853
854 return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
855 }
856
857 /*
858 * Release the memory region(s) being used by 'port'.
859 */
860 static void bfin_serial_release_port(struct uart_port *port)
861 {
862 }
863
864 /*
865 * Request the memory region(s) being used by 'port'.
866 */
867 static int bfin_serial_request_port(struct uart_port *port)
868 {
869 return 0;
870 }
871
872 /*
873 * Configure/autoconfigure the port.
874 */
875 static void bfin_serial_config_port(struct uart_port *port, int flags)
876 {
877 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
878
879 if (flags & UART_CONFIG_TYPE &&
880 bfin_serial_request_port(&uart->port) == 0)
881 uart->port.type = PORT_BFIN;
882 }
883
884 /*
885 * Verify the new serial_struct (for TIOCSSERIAL).
886 * The only change we allow are to the flags and type, and
887 * even then only between PORT_BFIN and PORT_UNKNOWN
888 */
889 static int
890 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
891 {
892 return 0;
893 }
894
895 /*
896 * Enable the IrDA function if tty->ldisc.num is N_IRDA.
897 * In other cases, disable IrDA function.
898 */
899 static void bfin_set_ldisc(struct tty_struct *tty)
900 {
901 int line = tty->index;
902 unsigned short val;
903
904 if (line >= tty->driver->num)
905 return;
906
907 switch (tty->ldisc.num) {
908 case N_IRDA:
909 val = UART_GET_GCTL(&bfin_serial_ports[line]);
910 val |= (IREN | RPOLC);
911 UART_PUT_GCTL(&bfin_serial_ports[line], val);
912 break;
913 default:
914 val = UART_GET_GCTL(&bfin_serial_ports[line]);
915 val &= ~(IREN | RPOLC);
916 UART_PUT_GCTL(&bfin_serial_ports[line], val);
917 }
918 }
919
920 static struct uart_ops bfin_serial_pops = {
921 .tx_empty = bfin_serial_tx_empty,
922 .set_mctrl = bfin_serial_set_mctrl,
923 .get_mctrl = bfin_serial_get_mctrl,
924 .stop_tx = bfin_serial_stop_tx,
925 .start_tx = bfin_serial_start_tx,
926 .stop_rx = bfin_serial_stop_rx,
927 .enable_ms = bfin_serial_enable_ms,
928 .break_ctl = bfin_serial_break_ctl,
929 .startup = bfin_serial_startup,
930 .shutdown = bfin_serial_shutdown,
931 .set_termios = bfin_serial_set_termios,
932 .type = bfin_serial_type,
933 .release_port = bfin_serial_release_port,
934 .request_port = bfin_serial_request_port,
935 .config_port = bfin_serial_config_port,
936 .verify_port = bfin_serial_verify_port,
937 };
938
939 static void __init bfin_serial_init_ports(void)
940 {
941 static int first = 1;
942 int i;
943
944 if (!first)
945 return;
946 first = 0;
947
948 for (i = 0; i < nr_ports; i++) {
949 bfin_serial_ports[i].port.uartclk = get_sclk();
950 bfin_serial_ports[i].port.ops = &bfin_serial_pops;
951 bfin_serial_ports[i].port.line = i;
952 bfin_serial_ports[i].port.iotype = UPIO_MEM;
953 bfin_serial_ports[i].port.membase =
954 (void __iomem *)bfin_serial_resource[i].uart_base_addr;
955 bfin_serial_ports[i].port.mapbase =
956 bfin_serial_resource[i].uart_base_addr;
957 bfin_serial_ports[i].port.irq =
958 bfin_serial_resource[i].uart_irq;
959 bfin_serial_ports[i].port.flags = UPF_BOOT_AUTOCONF;
960 #ifdef CONFIG_SERIAL_BFIN_DMA
961 bfin_serial_ports[i].tx_done = 1;
962 bfin_serial_ports[i].tx_count = 0;
963 bfin_serial_ports[i].tx_dma_channel =
964 bfin_serial_resource[i].uart_tx_dma_channel;
965 bfin_serial_ports[i].rx_dma_channel =
966 bfin_serial_resource[i].uart_rx_dma_channel;
967 init_timer(&(bfin_serial_ports[i].rx_dma_timer));
968 #endif
969 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
970 INIT_WORK(&bfin_serial_ports[i].cts_workqueue, bfin_serial_do_work);
971 bfin_serial_ports[i].cts_pin =
972 bfin_serial_resource[i].uart_cts_pin;
973 bfin_serial_ports[i].rts_pin =
974 bfin_serial_resource[i].uart_rts_pin;
975 #endif
976 bfin_serial_hw_init(&bfin_serial_ports[i]);
977 }
978
979 }
980
981 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
982 /*
983 * If the port was already initialised (eg, by a boot loader),
984 * try to determine the current setup.
985 */
986 static void __init
987 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
988 int *parity, int *bits)
989 {
990 unsigned short status;
991
992 status = UART_GET_IER(uart) & (ERBFI | ETBEI);
993 if (status == (ERBFI | ETBEI)) {
994 /* ok, the port was enabled */
995 unsigned short lcr, val;
996 unsigned short dlh, dll;
997
998 lcr = UART_GET_LCR(uart);
999
1000 *parity = 'n';
1001 if (lcr & PEN) {
1002 if (lcr & EPS)
1003 *parity = 'e';
1004 else
1005 *parity = 'o';
1006 }
1007 switch (lcr & 0x03) {
1008 case 0: *bits = 5; break;
1009 case 1: *bits = 6; break;
1010 case 2: *bits = 7; break;
1011 case 3: *bits = 8; break;
1012 }
1013 #ifndef CONFIG_BF54x
1014 /* Set DLAB in LCR to Access DLL and DLH */
1015 val = UART_GET_LCR(uart);
1016 val |= DLAB;
1017 UART_PUT_LCR(uart, val);
1018 #endif
1019
1020 dll = UART_GET_DLL(uart);
1021 dlh = UART_GET_DLH(uart);
1022
1023 #ifndef CONFIG_BF54x
1024 /* Clear DLAB in LCR to Access THR RBR IER */
1025 val = UART_GET_LCR(uart);
1026 val &= ~DLAB;
1027 UART_PUT_LCR(uart, val);
1028 #endif
1029
1030 *baud = get_sclk() / (16*(dll | dlh << 8));
1031 }
1032 pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __func__, *baud, *parity, *bits);
1033 }
1034 #endif
1035
1036 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1037 static struct uart_driver bfin_serial_reg;
1038
1039 static int __init
1040 bfin_serial_console_setup(struct console *co, char *options)
1041 {
1042 struct bfin_serial_port *uart;
1043 # ifdef CONFIG_SERIAL_BFIN_CONSOLE
1044 int baud = 57600;
1045 int bits = 8;
1046 int parity = 'n';
1047 # ifdef CONFIG_SERIAL_BFIN_CTSRTS
1048 int flow = 'r';
1049 # else
1050 int flow = 'n';
1051 # endif
1052 # endif
1053
1054 /*
1055 * Check whether an invalid uart number has been specified, and
1056 * if so, search for the first available port that does have
1057 * console support.
1058 */
1059 if (co->index == -1 || co->index >= nr_ports)
1060 co->index = 0;
1061 uart = &bfin_serial_ports[co->index];
1062
1063 # ifdef CONFIG_SERIAL_BFIN_CONSOLE
1064 if (options)
1065 uart_parse_options(options, &baud, &parity, &bits, &flow);
1066 else
1067 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
1068
1069 return uart_set_options(&uart->port, co, baud, parity, bits, flow);
1070 # else
1071 return 0;
1072 # endif
1073 }
1074 #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
1075 defined (CONFIG_EARLY_PRINTK) */
1076
1077 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1078 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
1079 {
1080 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1081 while (!(UART_GET_LSR(uart) & THRE))
1082 barrier();
1083 UART_PUT_CHAR(uart, ch);
1084 SSYNC();
1085 }
1086
1087 /*
1088 * Interrupts are disabled on entering
1089 */
1090 static void
1091 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1092 {
1093 struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
1094 int flags = 0;
1095
1096 spin_lock_irqsave(&uart->port.lock, flags);
1097 uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1098 spin_unlock_irqrestore(&uart->port.lock, flags);
1099
1100 }
1101
1102 static struct console bfin_serial_console = {
1103 .name = BFIN_SERIAL_NAME,
1104 .write = bfin_serial_console_write,
1105 .device = uart_console_device,
1106 .setup = bfin_serial_console_setup,
1107 .flags = CON_PRINTBUFFER,
1108 .index = -1,
1109 .data = &bfin_serial_reg,
1110 };
1111
1112 static int __init bfin_serial_rs_console_init(void)
1113 {
1114 bfin_serial_init_ports();
1115 register_console(&bfin_serial_console);
1116 #ifdef CONFIG_KGDB_UART
1117 kgdb_entry_state = 0;
1118 init_kgdb_uart();
1119 #endif
1120 return 0;
1121 }
1122 console_initcall(bfin_serial_rs_console_init);
1123
1124 #define BFIN_SERIAL_CONSOLE &bfin_serial_console
1125 #else
1126 #define BFIN_SERIAL_CONSOLE NULL
1127 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1128
1129
1130 #ifdef CONFIG_EARLY_PRINTK
1131 static __init void early_serial_putc(struct uart_port *port, int ch)
1132 {
1133 unsigned timeout = 0xffff;
1134 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1135
1136 while ((!(UART_GET_LSR(uart) & THRE)) && --timeout)
1137 cpu_relax();
1138 UART_PUT_CHAR(uart, ch);
1139 }
1140
1141 static __init void early_serial_write(struct console *con, const char *s,
1142 unsigned int n)
1143 {
1144 struct bfin_serial_port *uart = &bfin_serial_ports[con->index];
1145 unsigned int i;
1146
1147 for (i = 0; i < n; i++, s++) {
1148 if (*s == '\n')
1149 early_serial_putc(&uart->port, '\r');
1150 early_serial_putc(&uart->port, *s);
1151 }
1152 }
1153
1154 static struct __init console bfin_early_serial_console = {
1155 .name = "early_BFuart",
1156 .write = early_serial_write,
1157 .device = uart_console_device,
1158 .flags = CON_PRINTBUFFER,
1159 .setup = bfin_serial_console_setup,
1160 .index = -1,
1161 .data = &bfin_serial_reg,
1162 };
1163
1164 struct console __init *bfin_earlyserial_init(unsigned int port,
1165 unsigned int cflag)
1166 {
1167 struct bfin_serial_port *uart;
1168 struct ktermios t;
1169
1170 if (port == -1 || port >= nr_ports)
1171 port = 0;
1172 bfin_serial_init_ports();
1173 bfin_early_serial_console.index = port;
1174 uart = &bfin_serial_ports[port];
1175 t.c_cflag = cflag;
1176 t.c_iflag = 0;
1177 t.c_oflag = 0;
1178 t.c_lflag = ICANON;
1179 t.c_line = port;
1180 bfin_serial_set_termios(&uart->port, &t, &t);
1181 return &bfin_early_serial_console;
1182 }
1183
1184 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1185
1186 static struct uart_driver bfin_serial_reg = {
1187 .owner = THIS_MODULE,
1188 .driver_name = "bfin-uart",
1189 .dev_name = BFIN_SERIAL_NAME,
1190 .major = BFIN_SERIAL_MAJOR,
1191 .minor = BFIN_SERIAL_MINOR,
1192 .nr = BFIN_UART_NR_PORTS,
1193 .cons = BFIN_SERIAL_CONSOLE,
1194 };
1195
1196 static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
1197 {
1198 struct bfin_serial_port *uart = platform_get_drvdata(dev);
1199
1200 if (uart)
1201 uart_suspend_port(&bfin_serial_reg, &uart->port);
1202
1203 return 0;
1204 }
1205
1206 static int bfin_serial_resume(struct platform_device *dev)
1207 {
1208 struct bfin_serial_port *uart = platform_get_drvdata(dev);
1209
1210 if (uart)
1211 uart_resume_port(&bfin_serial_reg, &uart->port);
1212
1213 return 0;
1214 }
1215
1216 static int bfin_serial_probe(struct platform_device *dev)
1217 {
1218 struct resource *res = dev->resource;
1219 int i;
1220
1221 for (i = 0; i < dev->num_resources; i++, res++)
1222 if (res->flags & IORESOURCE_MEM)
1223 break;
1224
1225 if (i < dev->num_resources) {
1226 for (i = 0; i < nr_ports; i++, res++) {
1227 if (bfin_serial_ports[i].port.mapbase != res->start)
1228 continue;
1229 bfin_serial_ports[i].port.dev = &dev->dev;
1230 uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1231 platform_set_drvdata(dev, &bfin_serial_ports[i]);
1232 }
1233 }
1234
1235 return 0;
1236 }
1237
1238 static int bfin_serial_remove(struct platform_device *pdev)
1239 {
1240 struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1241
1242
1243 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
1244 gpio_free(uart->cts_pin);
1245 gpio_free(uart->rts_pin);
1246 #endif
1247
1248 platform_set_drvdata(pdev, NULL);
1249
1250 if (uart)
1251 uart_remove_one_port(&bfin_serial_reg, &uart->port);
1252
1253 return 0;
1254 }
1255
1256 static struct platform_driver bfin_serial_driver = {
1257 .probe = bfin_serial_probe,
1258 .remove = bfin_serial_remove,
1259 .suspend = bfin_serial_suspend,
1260 .resume = bfin_serial_resume,
1261 .driver = {
1262 .name = "bfin-uart",
1263 .owner = THIS_MODULE,
1264 },
1265 };
1266
1267 static int __init bfin_serial_init(void)
1268 {
1269 int ret;
1270 #ifdef CONFIG_KGDB_UART
1271 struct bfin_serial_port *uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
1272 struct ktermios t;
1273 #endif
1274
1275 pr_info("Serial: Blackfin serial driver\n");
1276
1277 bfin_serial_init_ports();
1278
1279 ret = uart_register_driver(&bfin_serial_reg);
1280 if (ret == 0) {
1281 bfin_serial_reg.tty_driver->set_ldisc = bfin_set_ldisc;
1282 ret = platform_driver_register(&bfin_serial_driver);
1283 if (ret) {
1284 pr_debug("uart register failed\n");
1285 uart_unregister_driver(&bfin_serial_reg);
1286 }
1287 }
1288 #ifdef CONFIG_KGDB_UART
1289 if (uart->port.cons->index != CONFIG_KGDB_UART_PORT) {
1290 request_irq(uart->port.irq, bfin_serial_rx_int,
1291 IRQF_DISABLED, "BFIN_UART_RX", uart);
1292 pr_info("Request irq for kgdb uart port\n");
1293 #ifdef CONFIG_BF54x
1294 UART_SET_IER(uart, ERBFI);
1295 #else
1296 UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
1297 #endif
1298 SSYNC();
1299 t.c_cflag = CS8|B57600;
1300 t.c_iflag = 0;
1301 t.c_oflag = 0;
1302 t.c_lflag = ICANON;
1303 t.c_line = CONFIG_KGDB_UART_PORT;
1304 bfin_serial_set_termios(&uart->port, &t, &t);
1305 }
1306 #endif
1307 return ret;
1308 }
1309
1310 static void __exit bfin_serial_exit(void)
1311 {
1312 platform_driver_unregister(&bfin_serial_driver);
1313 uart_unregister_driver(&bfin_serial_reg);
1314 }
1315
1316 module_init(bfin_serial_init);
1317 module_exit(bfin_serial_exit);
1318
1319 MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
1320 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1321 MODULE_LICENSE("GPL");
1322 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
1323 MODULE_ALIAS("platform:bfin-uart");
A Kernel for the Dreambox dm7025.