?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
[linux-2.6/linux-mips/linux-dm7025.git] / drivers / usb / gadget / atmel_usba_udc.c
blobe756023362c26e0429059764ee1630d867624a0f
1 /*
2 * Driver for the Atmel USBA high speed USB device controller
3 *
4 * Copyright (C) 2005-2007 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10 #include <linux/clk.h>
11 #include <linux/module.h>
12 #include <linux/init.h>
13 #include <linux/interrupt.h>
14 #include <linux/io.h>
15 #include <linux/device.h>
16 #include <linux/dma-mapping.h>
17 #include <linux/list.h>
18 #include <linux/platform_device.h>
19 #include <linux/usb/ch9.h>
20 #include <linux/usb/gadget.h>
21 #include <linux/usb/atmel_usba_udc.h>
22 #include <linux/delay.h>
23
24 #include <asm/gpio.h>
25 #include <asm/arch/board.h>
26
27 #include "atmel_usba_udc.h"
28
29
30 static struct usba_udc the_udc;
31 static struct usba_ep *usba_ep;
32
33 #ifdef CONFIG_USB_GADGET_DEBUG_FS
34 #include <linux/debugfs.h>
35 #include <linux/uaccess.h>
36
37 static int queue_dbg_open(struct inode *inode, struct file *file)
38 {
39 struct usba_ep *ep = inode->i_private;
40 struct usba_request *req, *req_copy;
41 struct list_head *queue_data;
42
43 queue_data = kmalloc(sizeof(*queue_data), GFP_KERNEL);
44 if (!queue_data)
45 return -ENOMEM;
46 INIT_LIST_HEAD(queue_data);
47
48 spin_lock_irq(&ep->udc->lock);
49 list_for_each_entry(req, &ep->queue, queue) {
50 req_copy = kmalloc(sizeof(*req_copy), GFP_ATOMIC);
51 if (!req_copy)
52 goto fail;
53 memcpy(req_copy, req, sizeof(*req_copy));
54 list_add_tail(&req_copy->queue, queue_data);
55 }
56 spin_unlock_irq(&ep->udc->lock);
57
58 file->private_data = queue_data;
59 return 0;
60
61 fail:
62 spin_unlock_irq(&ep->udc->lock);
63 list_for_each_entry_safe(req, req_copy, queue_data, queue) {
64 list_del(&req->queue);
65 kfree(req);
66 }
67 kfree(queue_data);
68 return -ENOMEM;
69 }
70
71 /*
72 * bbbbbbbb llllllll IZS sssss nnnn FDL\n\0
73 *
74 * b: buffer address
75 * l: buffer length
76 * I/i: interrupt/no interrupt
77 * Z/z: zero/no zero
78 * S/s: short ok/short not ok
79 * s: status
80 * n: nr_packets
81 * F/f: submitted/not submitted to FIFO
82 * D/d: using/not using DMA
83 * L/l: last transaction/not last transaction
84 */
85 static ssize_t queue_dbg_read(struct file *file, char __user *buf,
86 size_t nbytes, loff_t *ppos)
87 {
88 struct list_head *queue = file->private_data;
89 struct usba_request *req, *tmp_req;
90 size_t len, remaining, actual = 0;
91 char tmpbuf[38];
92
93 if (!access_ok(VERIFY_WRITE, buf, nbytes))
94 return -EFAULT;
95
96 mutex_lock(&file->f_dentry->d_inode->i_mutex);
97 list_for_each_entry_safe(req, tmp_req, queue, queue) {
98 len = snprintf(tmpbuf, sizeof(tmpbuf),
99 "%8p %08x %c%c%c %5d %c%c%c\n",
100 req->req.buf, req->req.length,
101 req->req.no_interrupt ? 'i' : 'I',
102 req->req.zero ? 'Z' : 'z',
103 req->req.short_not_ok ? 's' : 'S',
104 req->req.status,
105 req->submitted ? 'F' : 'f',
106 req->using_dma ? 'D' : 'd',
107 req->last_transaction ? 'L' : 'l');
108 len = min(len, sizeof(tmpbuf));
109 if (len > nbytes)
110 break;
111
112 list_del(&req->queue);
113 kfree(req);
114
115 remaining = __copy_to_user(buf, tmpbuf, len);
116 actual += len - remaining;
117 if (remaining)
118 break;
119
120 nbytes -= len;
121 buf += len;
122 }
123 mutex_unlock(&file->f_dentry->d_inode->i_mutex);
124
125 return actual;
126 }
127
128 static int queue_dbg_release(struct inode *inode, struct file *file)
129 {
130 struct list_head *queue_data = file->private_data;
131 struct usba_request *req, *tmp_req;
132
133 list_for_each_entry_safe(req, tmp_req, queue_data, queue) {
134 list_del(&req->queue);
135 kfree(req);
136 }
137 kfree(queue_data);
138 return 0;
139 }
140
141 static int regs_dbg_open(struct inode *inode, struct file *file)
142 {
143 struct usba_udc *udc;
144 unsigned int i;
145 u32 *data;
146 int ret = -ENOMEM;
147
148 mutex_lock(&inode->i_mutex);
149 udc = inode->i_private;
150 data = kmalloc(inode->i_size, GFP_KERNEL);
151 if (!data)
152 goto out;
153
154 spin_lock_irq(&udc->lock);
155 for (i = 0; i < inode->i_size / 4; i++)
156 data[i] = __raw_readl(udc->regs + i * 4);
157 spin_unlock_irq(&udc->lock);
158
159 file->private_data = data;
160 ret = 0;
161
162 out:
163 mutex_unlock(&inode->i_mutex);
164
165 return ret;
166 }
167
168 static ssize_t regs_dbg_read(struct file *file, char __user *buf,
169 size_t nbytes, loff_t *ppos)
170 {
171 struct inode *inode = file->f_dentry->d_inode;
172 int ret;
173
174 mutex_lock(&inode->i_mutex);
175 ret = simple_read_from_buffer(buf, nbytes, ppos,
176 file->private_data,
177 file->f_dentry->d_inode->i_size);
178 mutex_unlock(&inode->i_mutex);
179
180 return ret;
181 }
182
183 static int regs_dbg_release(struct inode *inode, struct file *file)
184 {
185 kfree(file->private_data);
186 return 0;
187 }
188
189 const struct file_operations queue_dbg_fops = {
190 .owner = THIS_MODULE,
191 .open = queue_dbg_open,
192 .llseek = no_llseek,
193 .read = queue_dbg_read,
194 .release = queue_dbg_release,
195 };
196
197 const struct file_operations regs_dbg_fops = {
198 .owner = THIS_MODULE,
199 .open = regs_dbg_open,
200 .llseek = generic_file_llseek,
201 .read = regs_dbg_read,
202 .release = regs_dbg_release,
203 };
204
205 static void usba_ep_init_debugfs(struct usba_udc *udc,
206 struct usba_ep *ep)
207 {
208 struct dentry *ep_root;
209
210 ep_root = debugfs_create_dir(ep->ep.name, udc->debugfs_root);
211 if (!ep_root)
212 goto err_root;
213 ep->debugfs_dir = ep_root;
214
215 ep->debugfs_queue = debugfs_create_file("queue", 0400, ep_root,
216 ep, &queue_dbg_fops);
217 if (!ep->debugfs_queue)
218 goto err_queue;
219
220 if (ep->can_dma) {
221 ep->debugfs_dma_status
222 = debugfs_create_u32("dma_status", 0400, ep_root,
223 &ep->last_dma_status);
224 if (!ep->debugfs_dma_status)
225 goto err_dma_status;
226 }
227 if (ep_is_control(ep)) {
228 ep->debugfs_state
229 = debugfs_create_u32("state", 0400, ep_root,
230 &ep->state);
231 if (!ep->debugfs_state)
232 goto err_state;
233 }
234
235 return;
236
237 err_state:
238 if (ep->can_dma)
239 debugfs_remove(ep->debugfs_dma_status);
240 err_dma_status:
241 debugfs_remove(ep->debugfs_queue);
242 err_queue:
243 debugfs_remove(ep_root);
244 err_root:
245 dev_err(&ep->udc->pdev->dev,
246 "failed to create debugfs directory for %s\n", ep->ep.name);
247 }
248
249 static void usba_ep_cleanup_debugfs(struct usba_ep *ep)
250 {
251 debugfs_remove(ep->debugfs_queue);
252 debugfs_remove(ep->debugfs_dma_status);
253 debugfs_remove(ep->debugfs_state);
254 debugfs_remove(ep->debugfs_dir);
255 ep->debugfs_dma_status = NULL;
256 ep->debugfs_dir = NULL;
257 }
258
259 static void usba_init_debugfs(struct usba_udc *udc)
260 {
261 struct dentry *root, *regs;
262 struct resource *regs_resource;
263
264 root = debugfs_create_dir(udc->gadget.name, NULL);
265 if (IS_ERR(root) || !root)
266 goto err_root;
267 udc->debugfs_root = root;
268
269 regs = debugfs_create_file("regs", 0400, root, udc, &regs_dbg_fops);
270 if (!regs)
271 goto err_regs;
272
273 regs_resource = platform_get_resource(udc->pdev, IORESOURCE_MEM,
274 CTRL_IOMEM_ID);
275 regs->d_inode->i_size = regs_resource->end - regs_resource->start + 1;
276 udc->debugfs_regs = regs;
277
278 usba_ep_init_debugfs(udc, to_usba_ep(udc->gadget.ep0));
279
280 return;
281
282 err_regs:
283 debugfs_remove(root);
284 err_root:
285 udc->debugfs_root = NULL;
286 dev_err(&udc->pdev->dev, "debugfs is not available\n");
287 }
288
289 static void usba_cleanup_debugfs(struct usba_udc *udc)
290 {
291 usba_ep_cleanup_debugfs(to_usba_ep(udc->gadget.ep0));
292 debugfs_remove(udc->debugfs_regs);
293 debugfs_remove(udc->debugfs_root);
294 udc->debugfs_regs = NULL;
295 udc->debugfs_root = NULL;
296 }
297 #else
298 static inline void usba_ep_init_debugfs(struct usba_udc *udc,
299 struct usba_ep *ep)
300 {
301
302 }
303
304 static inline void usba_ep_cleanup_debugfs(struct usba_ep *ep)
305 {
306
307 }
308
309 static inline void usba_init_debugfs(struct usba_udc *udc)
310 {
311
312 }
313
314 static inline void usba_cleanup_debugfs(struct usba_udc *udc)
315 {
316
317 }
318 #endif
319
320 static int vbus_is_present(struct usba_udc *udc)
321 {
322 if (udc->vbus_pin != -1)
323 return gpio_get_value(udc->vbus_pin);
324
325 /* No Vbus detection: Assume always present */
326 return 1;
327 }
328
329 #if defined(CONFIG_AVR32)
330
331 static void toggle_bias(int is_on)
332 {
333 }
334
335 #elif defined(CONFIG_ARCH_AT91)
336
337 #include <asm/arch/at91_pmc.h>
338
339 static void toggle_bias(int is_on)
340 {
341 unsigned int uckr = at91_sys_read(AT91_CKGR_UCKR);
342
343 if (is_on)
344 at91_sys_write(AT91_CKGR_UCKR, uckr | AT91_PMC_BIASEN);
345 else
346 at91_sys_write(AT91_CKGR_UCKR, uckr & ~(AT91_PMC_BIASEN));
347 }
348
349 #endif /* CONFIG_ARCH_AT91 */
350
351 static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req)
352 {
353 unsigned int transaction_len;
354
355 transaction_len = req->req.length - req->req.actual;
356 req->last_transaction = 1;
357 if (transaction_len > ep->ep.maxpacket) {
358 transaction_len = ep->ep.maxpacket;
359 req->last_transaction = 0;
360 } else if (transaction_len == ep->ep.maxpacket && req->req.zero)
361 req->last_transaction = 0;
362
363 DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n",
364 ep->ep.name, req, transaction_len,
365 req->last_transaction ? ", done" : "");
366
367 memcpy_toio(ep->fifo, req->req.buf + req->req.actual, transaction_len);
368 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
369 req->req.actual += transaction_len;
370 }
371
372 static void submit_request(struct usba_ep *ep, struct usba_request *req)
373 {
374 DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d)\n",
375 ep->ep.name, req, req->req.length);
376
377 req->req.actual = 0;
378 req->submitted = 1;
379
380 if (req->using_dma) {
381 if (req->req.length == 0) {
382 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
383 return;
384 }
385
386 if (req->req.zero)
387 usba_ep_writel(ep, CTL_ENB, USBA_SHORT_PACKET);
388 else
389 usba_ep_writel(ep, CTL_DIS, USBA_SHORT_PACKET);
390
391 usba_dma_writel(ep, ADDRESS, req->req.dma);
392 usba_dma_writel(ep, CONTROL, req->ctrl);
393 } else {
394 next_fifo_transaction(ep, req);
395 if (req->last_transaction) {
396 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
397 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
398 } else {
399 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
400 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
401 }
402 }
403 }
404
405 static void submit_next_request(struct usba_ep *ep)
406 {
407 struct usba_request *req;
408
409 if (list_empty(&ep->queue)) {
410 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY | USBA_RX_BK_RDY);
411 return;
412 }
413
414 req = list_entry(ep->queue.next, struct usba_request, queue);
415 if (!req->submitted)
416 submit_request(ep, req);
417 }
418
419 static void send_status(struct usba_udc *udc, struct usba_ep *ep)
420 {
421 ep->state = STATUS_STAGE_IN;
422 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
423 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
424 }
425
426 static void receive_data(struct usba_ep *ep)
427 {
428 struct usba_udc *udc = ep->udc;
429 struct usba_request *req;
430 unsigned long status;
431 unsigned int bytecount, nr_busy;
432 int is_complete = 0;
433
434 status = usba_ep_readl(ep, STA);
435 nr_busy = USBA_BFEXT(BUSY_BANKS, status);
436
437 DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy);
438
439 while (nr_busy > 0) {
440 if (list_empty(&ep->queue)) {
441 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
442 break;
443 }
444 req = list_entry(ep->queue.next,
445 struct usba_request, queue);
446
447 bytecount = USBA_BFEXT(BYTE_COUNT, status);
448
449 if (status & (1 << 31))
450 is_complete = 1;
451 if (req->req.actual + bytecount >= req->req.length) {
452 is_complete = 1;
453 bytecount = req->req.length - req->req.actual;
454 }
455
456 memcpy_fromio(req->req.buf + req->req.actual,
457 ep->fifo, bytecount);
458 req->req.actual += bytecount;
459
460 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
461
462 if (is_complete) {
463 DBG(DBG_QUEUE, "%s: request done\n", ep->ep.name);
464 req->req.status = 0;
465 list_del_init(&req->queue);
466 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
467 spin_unlock(&udc->lock);
468 req->req.complete(&ep->ep, &req->req);
469 spin_lock(&udc->lock);
470 }
471
472 status = usba_ep_readl(ep, STA);
473 nr_busy = USBA_BFEXT(BUSY_BANKS, status);
474
475 if (is_complete && ep_is_control(ep)) {
476 send_status(udc, ep);
477 break;
478 }
479 }
480 }
481
482 static void
483 request_complete(struct usba_ep *ep, struct usba_request *req, int status)
484 {
485 struct usba_udc *udc = ep->udc;
486
487 WARN_ON(!list_empty(&req->queue));
488
489 if (req->req.status == -EINPROGRESS)
490 req->req.status = status;
491
492 if (req->mapped) {
493 dma_unmap_single(
494 &udc->pdev->dev, req->req.dma, req->req.length,
495 ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
496 req->req.dma = DMA_ADDR_INVALID;
497 req->mapped = 0;
498 }
499
500 DBG(DBG_GADGET | DBG_REQ,
501 "%s: req %p complete: status %d, actual %u\n",
502 ep->ep.name, req, req->req.status, req->req.actual);
503
504 spin_unlock(&udc->lock);
505 req->req.complete(&ep->ep, &req->req);
506 spin_lock(&udc->lock);
507 }
508
509 static void
510 request_complete_list(struct usba_ep *ep, struct list_head *list, int status)
511 {
512 struct usba_request *req, *tmp_req;
513
514 list_for_each_entry_safe(req, tmp_req, list, queue) {
515 list_del_init(&req->queue);
516 request_complete(ep, req, status);
517 }
518 }
519
520 static int
521 usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
522 {
523 struct usba_ep *ep = to_usba_ep(_ep);
524 struct usba_udc *udc = ep->udc;
525 unsigned long flags, ept_cfg, maxpacket;
526 unsigned int nr_trans;
527
528 DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep->ep.name, desc);
529
530 maxpacket = le16_to_cpu(desc->wMaxPacketSize) & 0x7ff;
531
532 if (((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) != ep->index)
533 || ep->index == 0
534 || desc->bDescriptorType != USB_DT_ENDPOINT
535 || maxpacket == 0
536 || maxpacket > ep->fifo_size) {
537 DBG(DBG_ERR, "ep_enable: Invalid argument");
538 return -EINVAL;
539 }
540
541 ep->is_isoc = 0;
542 ep->is_in = 0;
543
544 if (maxpacket <= 8)
545 ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
546 else
547 /* LSB is bit 1, not 0 */
548 ept_cfg = USBA_BF(EPT_SIZE, fls(maxpacket - 1) - 3);
549
550 DBG(DBG_HW, "%s: EPT_SIZE = %lu (maxpacket = %lu)\n",
551 ep->ep.name, ept_cfg, maxpacket);
552
553 if ((desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN) {
554 ep->is_in = 1;
555 ept_cfg |= USBA_EPT_DIR_IN;
556 }
557
558 switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
559 case USB_ENDPOINT_XFER_CONTROL:
560 ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL);
561 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE);
562 break;
563 case USB_ENDPOINT_XFER_ISOC:
564 if (!ep->can_isoc) {
565 DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n",
566 ep->ep.name);
567 return -EINVAL;
568 }
569
570 /*
571 * Bits 11:12 specify number of _additional_
572 * transactions per microframe.
573 */
574 nr_trans = ((le16_to_cpu(desc->wMaxPacketSize) >> 11) & 3) + 1;
575 if (nr_trans > 3)
576 return -EINVAL;
577
578 ep->is_isoc = 1;
579 ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO);
580
581 /*
582 * Do triple-buffering on high-bandwidth iso endpoints.
583 */
584 if (nr_trans > 1 && ep->nr_banks == 3)
585 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_TRIPLE);
586 else
587 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
588 ept_cfg |= USBA_BF(NB_TRANS, nr_trans);
589 break;
590 case USB_ENDPOINT_XFER_BULK:
591 ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK);
592 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
593 break;
594 case USB_ENDPOINT_XFER_INT:
595 ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT);
596 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
597 break;
598 }
599
600 spin_lock_irqsave(&ep->udc->lock, flags);
601
602 if (ep->desc) {
603 spin_unlock_irqrestore(&ep->udc->lock, flags);
604 DBG(DBG_ERR, "ep%d already enabled\n", ep->index);
605 return -EBUSY;
606 }
607
608 ep->desc = desc;
609 ep->ep.maxpacket = maxpacket;
610
611 usba_ep_writel(ep, CFG, ept_cfg);
612 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
613
614 if (ep->can_dma) {
615 u32 ctrl;
616
617 usba_writel(udc, INT_ENB,
618 (usba_readl(udc, INT_ENB)
619 | USBA_BF(EPT_INT, 1 << ep->index)
620 | USBA_BF(DMA_INT, 1 << ep->index)));
621 ctrl = USBA_AUTO_VALID | USBA_INTDIS_DMA;
622 usba_ep_writel(ep, CTL_ENB, ctrl);
623 } else {
624 usba_writel(udc, INT_ENB,
625 (usba_readl(udc, INT_ENB)
626 | USBA_BF(EPT_INT, 1 << ep->index)));
627 }
628
629 spin_unlock_irqrestore(&udc->lock, flags);
630
631 DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index,
632 (unsigned long)usba_ep_readl(ep, CFG));
633 DBG(DBG_HW, "INT_ENB after init: %#08lx\n",
634 (unsigned long)usba_readl(udc, INT_ENB));
635
636 return 0;
637 }
638
639 static int usba_ep_disable(struct usb_ep *_ep)
640 {
641 struct usba_ep *ep = to_usba_ep(_ep);
642 struct usba_udc *udc = ep->udc;
643 LIST_HEAD(req_list);
644 unsigned long flags;
645
646 DBG(DBG_GADGET, "ep_disable: %s\n", ep->ep.name);
647
648 spin_lock_irqsave(&udc->lock, flags);
649
650 if (!ep->desc) {
651 spin_unlock_irqrestore(&udc->lock, flags);
652 DBG(DBG_ERR, "ep_disable: %s not enabled\n", ep->ep.name);
653 return -EINVAL;
654 }
655 ep->desc = NULL;
656
657 list_splice_init(&ep->queue, &req_list);
658 if (ep->can_dma) {
659 usba_dma_writel(ep, CONTROL, 0);
660 usba_dma_writel(ep, ADDRESS, 0);
661 usba_dma_readl(ep, STATUS);
662 }
663 usba_ep_writel(ep, CTL_DIS, USBA_EPT_ENABLE);
664 usba_writel(udc, INT_ENB,
665 usba_readl(udc, INT_ENB)
666 & ~USBA_BF(EPT_INT, 1 << ep->index));
667
668 request_complete_list(ep, &req_list, -ESHUTDOWN);
669
670 spin_unlock_irqrestore(&udc->lock, flags);
671
672 return 0;
673 }
674
675 static struct usb_request *
676 usba_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
677 {
678 struct usba_request *req;
679
680 DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags);
681
682 req = kzalloc(sizeof(*req), gfp_flags);
683 if (!req)
684 return NULL;
685
686 INIT_LIST_HEAD(&req->queue);
687 req->req.dma = DMA_ADDR_INVALID;
688
689 return &req->req;
690 }
691
692 static void
693 usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
694 {
695 struct usba_request *req = to_usba_req(_req);
696
697 DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req);
698
699 kfree(req);
700 }
701
702 static int queue_dma(struct usba_udc *udc, struct usba_ep *ep,
703 struct usba_request *req, gfp_t gfp_flags)
704 {
705 unsigned long flags;
706 int ret;
707
708 DBG(DBG_DMA, "%s: req l/%u d/%08x %c%c%c\n",
709 ep->ep.name, req->req.length, req->req.dma,
710 req->req.zero ? 'Z' : 'z',
711 req->req.short_not_ok ? 'S' : 's',
712 req->req.no_interrupt ? 'I' : 'i');
713
714 if (req->req.length > 0x10000) {
715 /* Lengths from 0 to 65536 (inclusive) are supported */
716 DBG(DBG_ERR, "invalid request length %u\n", req->req.length);
717 return -EINVAL;
718 }
719
720 req->using_dma = 1;
721
722 if (req->req.dma == DMA_ADDR_INVALID) {
723 req->req.dma = dma_map_single(
724 &udc->pdev->dev, req->req.buf, req->req.length,
725 ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
726 req->mapped = 1;
727 } else {
728 dma_sync_single_for_device(
729 &udc->pdev->dev, req->req.dma, req->req.length,
730 ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
731 req->mapped = 0;
732 }
733
734 req->ctrl = USBA_BF(DMA_BUF_LEN, req->req.length)
735 | USBA_DMA_CH_EN | USBA_DMA_END_BUF_IE
736 | USBA_DMA_END_TR_EN | USBA_DMA_END_TR_IE;
737
738 if (ep->is_in)
739 req->ctrl |= USBA_DMA_END_BUF_EN;
740
741 /*
742 * Add this request to the queue and submit for DMA if
743 * possible. Check if we're still alive first -- we may have
744 * received a reset since last time we checked.
745 */
746 ret = -ESHUTDOWN;
747 spin_lock_irqsave(&udc->lock, flags);
748 if (ep->desc) {
749 if (list_empty(&ep->queue))
750 submit_request(ep, req);
751
752 list_add_tail(&req->queue, &ep->queue);
753 ret = 0;
754 }
755 spin_unlock_irqrestore(&udc->lock, flags);
756
757 return ret;
758 }
759
760 static int
761 usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
762 {
763 struct usba_request *req = to_usba_req(_req);
764 struct usba_ep *ep = to_usba_ep(_ep);
765 struct usba_udc *udc = ep->udc;
766 unsigned long flags;
767 int ret;
768
769 DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ, "%s: queue req %p, len %u\n",
770 ep->ep.name, req, _req->length);
771
772 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN || !ep->desc)
773 return -ESHUTDOWN;
774
775 req->submitted = 0;
776 req->using_dma = 0;
777 req->last_transaction = 0;
778
779 _req->status = -EINPROGRESS;
780 _req->actual = 0;
781
782 if (ep->can_dma)
783 return queue_dma(udc, ep, req, gfp_flags);
784
785 /* May have received a reset since last time we checked */
786 ret = -ESHUTDOWN;
787 spin_lock_irqsave(&udc->lock, flags);
788 if (ep->desc) {
789 list_add_tail(&req->queue, &ep->queue);
790
791 if (ep->is_in || (ep_is_control(ep)
792 && (ep->state == DATA_STAGE_IN
793 || ep->state == STATUS_STAGE_IN)))
794 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
795 else
796 usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
797 ret = 0;
798 }
799 spin_unlock_irqrestore(&udc->lock, flags);
800
801 return ret;
802 }
803
804 static void
805 usba_update_req(struct usba_ep *ep, struct usba_request *req, u32 status)
806 {
807 req->req.actual = req->req.length - USBA_BFEXT(DMA_BUF_LEN, status);
808 }
809
810 static int stop_dma(struct usba_ep *ep, u32 *pstatus)
811 {
812 unsigned int timeout;
813 u32 status;
814
815 /*
816 * Stop the DMA controller. When writing both CH_EN
817 * and LINK to 0, the other bits are not affected.
818 */
819 usba_dma_writel(ep, CONTROL, 0);
820
821 /* Wait for the FIFO to empty */
822 for (timeout = 40; timeout; --timeout) {
823 status = usba_dma_readl(ep, STATUS);
824 if (!(status & USBA_DMA_CH_EN))
825 break;
826 udelay(1);
827 }
828
829 if (pstatus)
830 *pstatus = status;
831
832 if (timeout == 0) {
833 dev_err(&ep->udc->pdev->dev,
834 "%s: timed out waiting for DMA FIFO to empty\n",
835 ep->ep.name);
836 return -ETIMEDOUT;
837 }
838
839 return 0;
840 }
841
842 static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
843 {
844 struct usba_ep *ep = to_usba_ep(_ep);
845 struct usba_udc *udc = ep->udc;
846 struct usba_request *req = to_usba_req(_req);
847 unsigned long flags;
848 u32 status;
849
850 DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n",
851 ep->ep.name, req);
852
853 spin_lock_irqsave(&udc->lock, flags);
854
855 if (req->using_dma) {
856 /*
857 * If this request is currently being transferred,
858 * stop the DMA controller and reset the FIFO.
859 */
860 if (ep->queue.next == &req->queue) {
861 status = usba_dma_readl(ep, STATUS);
862 if (status & USBA_DMA_CH_EN)
863 stop_dma(ep, &status);
864
865 #ifdef CONFIG_USB_GADGET_DEBUG_FS
866 ep->last_dma_status = status;
867 #endif
868
869 usba_writel(udc, EPT_RST, 1 << ep->index);
870
871 usba_update_req(ep, req, status);
872 }
873 }
874
875 /*
876 * Errors should stop the queue from advancing until the
877 * completion function returns.
878 */
879 list_del_init(&req->queue);
880
881 request_complete(ep, req, -ECONNRESET);
882
883 /* Process the next request if any */
884 submit_next_request(ep);
885 spin_unlock_irqrestore(&udc->lock, flags);
886
887 return 0;
888 }
889
890 static int usba_ep_set_halt(struct usb_ep *_ep, int value)
891 {
892 struct usba_ep *ep = to_usba_ep(_ep);
893 struct usba_udc *udc = ep->udc;
894 unsigned long flags;
895 int ret = 0;
896
897 DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep->ep.name,
898 value ? "set" : "clear");
899
900 if (!ep->desc) {
901 DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n",
902 ep->ep.name);
903 return -ENODEV;
904 }
905 if (ep->is_isoc) {
906 DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n",
907 ep->ep.name);
908 return -ENOTTY;
909 }
910
911 spin_lock_irqsave(&udc->lock, flags);
912
913 /*
914 * We can't halt IN endpoints while there are still data to be
915 * transferred
916 */
917 if (!list_empty(&ep->queue)
918 || ((value && ep->is_in && (usba_ep_readl(ep, STA)
919 & USBA_BF(BUSY_BANKS, -1L))))) {
920 ret = -EAGAIN;
921 } else {
922 if (value)
923 usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
924 else
925 usba_ep_writel(ep, CLR_STA,
926 USBA_FORCE_STALL | USBA_TOGGLE_CLR);
927 usba_ep_readl(ep, STA);
928 }
929
930 spin_unlock_irqrestore(&udc->lock, flags);
931
932 return ret;
933 }
934
935 static int usba_ep_fifo_status(struct usb_ep *_ep)
936 {
937 struct usba_ep *ep = to_usba_ep(_ep);
938
939 return USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
940 }
941
942 static void usba_ep_fifo_flush(struct usb_ep *_ep)
943 {
944 struct usba_ep *ep = to_usba_ep(_ep);
945 struct usba_udc *udc = ep->udc;
946
947 usba_writel(udc, EPT_RST, 1 << ep->index);
948 }
949
950 static const struct usb_ep_ops usba_ep_ops = {
951 .enable = usba_ep_enable,
952 .disable = usba_ep_disable,
953 .alloc_request = usba_ep_alloc_request,
954 .free_request = usba_ep_free_request,
955 .queue = usba_ep_queue,
956 .dequeue = usba_ep_dequeue,
957 .set_halt = usba_ep_set_halt,
958 .fifo_status = usba_ep_fifo_status,
959 .fifo_flush = usba_ep_fifo_flush,
960 };
961
962 static int usba_udc_get_frame(struct usb_gadget *gadget)
963 {
964 struct usba_udc *udc = to_usba_udc(gadget);
965
966 return USBA_BFEXT(FRAME_NUMBER, usba_readl(udc, FNUM));
967 }
968
969 static int usba_udc_wakeup(struct usb_gadget *gadget)
970 {
971 struct usba_udc *udc = to_usba_udc(gadget);
972 unsigned long flags;
973 u32 ctrl;
974 int ret = -EINVAL;
975
976 spin_lock_irqsave(&udc->lock, flags);
977 if (udc->devstatus & (1 << USB_DEVICE_REMOTE_WAKEUP)) {
978 ctrl = usba_readl(udc, CTRL);
979 usba_writel(udc, CTRL, ctrl | USBA_REMOTE_WAKE_UP);
980 ret = 0;
981 }
982 spin_unlock_irqrestore(&udc->lock, flags);
983
984 return ret;
985 }
986
987 static int
988 usba_udc_set_selfpowered(struct usb_gadget *gadget, int is_selfpowered)
989 {
990 struct usba_udc *udc = to_usba_udc(gadget);
991 unsigned long flags;
992
993 spin_lock_irqsave(&udc->lock, flags);
994 if (is_selfpowered)
995 udc->devstatus |= 1 << USB_DEVICE_SELF_POWERED;
996 else
997 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
998 spin_unlock_irqrestore(&udc->lock, flags);
999
1000 return 0;
1001 }
1002
1003 static const struct usb_gadget_ops usba_udc_ops = {
1004 .get_frame = usba_udc_get_frame,
1005 .wakeup = usba_udc_wakeup,
1006 .set_selfpowered = usba_udc_set_selfpowered,
1007 };
1008
1009 static struct usb_endpoint_descriptor usba_ep0_desc = {
1010 .bLength = USB_DT_ENDPOINT_SIZE,
1011 .bDescriptorType = USB_DT_ENDPOINT,
1012 .bEndpointAddress = 0,
1013 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
1014 .wMaxPacketSize = __constant_cpu_to_le16(64),
1015 /* FIXME: I have no idea what to put here */
1016 .bInterval = 1,
1017 };
1018
1019 static void nop_release(struct device *dev)
1020 {
1021
1022 }
1023
1024 static struct usba_udc the_udc = {
1025 .gadget = {
1026 .ops = &usba_udc_ops,
1027 .ep_list = LIST_HEAD_INIT(the_udc.gadget.ep_list),
1028 .is_dualspeed = 1,
1029 .name = "atmel_usba_udc",
1030 .dev = {
1031 .bus_id = "gadget",
1032 .release = nop_release,
1033 },
1034 },
1035
1036 .lock = SPIN_LOCK_UNLOCKED,
1037 };
1038
1039 /*
1040 * Called with interrupts disabled and udc->lock held.
1041 */
1042 static void reset_all_endpoints(struct usba_udc *udc)
1043 {
1044 struct usba_ep *ep;
1045 struct usba_request *req, *tmp_req;
1046
1047 usba_writel(udc, EPT_RST, ~0UL);
1048
1049 ep = to_usba_ep(udc->gadget.ep0);
1050 list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) {
1051 list_del_init(&req->queue);
1052 request_complete(ep, req, -ECONNRESET);
1053 }
1054
1055 list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
1056 if (ep->desc) {
1057 spin_unlock(&udc->lock);
1058 usba_ep_disable(&ep->ep);
1059 spin_lock(&udc->lock);
1060 }
1061 }
1062 }
1063
1064 static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex)
1065 {
1066 struct usba_ep *ep;
1067
1068 if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
1069 return to_usba_ep(udc->gadget.ep0);
1070
1071 list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) {
1072 u8 bEndpointAddress;
1073
1074 if (!ep->desc)
1075 continue;
1076 bEndpointAddress = ep->desc->bEndpointAddress;
1077 if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
1078 continue;
1079 if ((bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)
1080 == (wIndex & USB_ENDPOINT_NUMBER_MASK))
1081 return ep;
1082 }
1083
1084 return NULL;
1085 }
1086
1087 /* Called with interrupts disabled and udc->lock held */
1088 static inline void set_protocol_stall(struct usba_udc *udc, struct usba_ep *ep)
1089 {
1090 usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
1091 ep->state = WAIT_FOR_SETUP;
1092 }
1093
1094 static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep)
1095 {
1096 if (usba_ep_readl(ep, STA) & USBA_FORCE_STALL)
1097 return 1;
1098 return 0;
1099 }
1100
1101 static inline void set_address(struct usba_udc *udc, unsigned int addr)
1102 {
1103 u32 regval;
1104
1105 DBG(DBG_BUS, "setting address %u...\n", addr);
1106 regval = usba_readl(udc, CTRL);
1107 regval = USBA_BFINS(DEV_ADDR, addr, regval);
1108 usba_writel(udc, CTRL, regval);
1109 }
1110
1111 static int do_test_mode(struct usba_udc *udc)
1112 {
1113 static const char test_packet_buffer[] = {
1114 /* JKJKJKJK * 9 */
1115 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1116 /* JJKKJJKK * 8 */
1117 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA,
1118 /* JJKKJJKK * 8 */
1119 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
1120 /* JJJJJJJKKKKKKK * 8 */
1121 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1122 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1123 /* JJJJJJJK * 8 */
1124 0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD,
1125 /* {JKKKKKKK * 10}, JK */
1126 0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E
1127 };
1128 struct usba_ep *ep;
1129 struct device *dev = &udc->pdev->dev;
1130 int test_mode;
1131
1132 test_mode = udc->test_mode;
1133
1134 /* Start from a clean slate */
1135 reset_all_endpoints(udc);
1136
1137 switch (test_mode) {
1138 case 0x0100:
1139 /* Test_J */
1140 usba_writel(udc, TST, USBA_TST_J_MODE);
1141 dev_info(dev, "Entering Test_J mode...\n");
1142 break;
1143 case 0x0200:
1144 /* Test_K */
1145 usba_writel(udc, TST, USBA_TST_K_MODE);
1146 dev_info(dev, "Entering Test_K mode...\n");
1147 break;
1148 case 0x0300:
1149 /*
1150 * Test_SE0_NAK: Force high-speed mode and set up ep0
1151 * for Bulk IN transfers
1152 */
1153 ep = &usba_ep[0];
1154 usba_writel(udc, TST,
1155 USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH));
1156 usba_ep_writel(ep, CFG,
1157 USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
1158 | USBA_EPT_DIR_IN
1159 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
1160 | USBA_BF(BK_NUMBER, 1));
1161 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
1162 set_protocol_stall(udc, ep);
1163 dev_err(dev, "Test_SE0_NAK: ep0 not mapped\n");
1164 } else {
1165 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
1166 dev_info(dev, "Entering Test_SE0_NAK mode...\n");
1167 }
1168 break;
1169 case 0x0400:
1170 /* Test_Packet */
1171 ep = &usba_ep[0];
1172 usba_ep_writel(ep, CFG,
1173 USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
1174 | USBA_EPT_DIR_IN
1175 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
1176 | USBA_BF(BK_NUMBER, 1));
1177 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
1178 set_protocol_stall(udc, ep);
1179 dev_err(dev, "Test_Packet: ep0 not mapped\n");
1180 } else {
1181 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
1182 usba_writel(udc, TST, USBA_TST_PKT_MODE);
1183 memcpy_toio(ep->fifo, test_packet_buffer,
1184 sizeof(test_packet_buffer));
1185 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
1186 dev_info(dev, "Entering Test_Packet mode...\n");
1187 }
1188 break;
1189 default:
1190 dev_err(dev, "Invalid test mode: 0x%04x\n", test_mode);
1191 return -EINVAL;
1192 }
1193
1194 return 0;
1195 }
1196
1197 /* Avoid overly long expressions */
1198 static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq)
1199 {
1200 if (crq->wValue == __constant_cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP))
1201 return true;
1202 return false;
1203 }
1204
1205 static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq)
1206 {
1207 if (crq->wValue == __constant_cpu_to_le16(USB_DEVICE_TEST_MODE))
1208 return true;
1209 return false;
1210 }
1211
1212 static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq)
1213 {
1214 if (crq->wValue == __constant_cpu_to_le16(USB_ENDPOINT_HALT))
1215 return true;
1216 return false;
1217 }
1218
1219 static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep,
1220 struct usb_ctrlrequest *crq)
1221 {
1222 int retval = 0;;
1223
1224 switch (crq->bRequest) {
1225 case USB_REQ_GET_STATUS: {
1226 u16 status;
1227
1228 if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) {
1229 status = cpu_to_le16(udc->devstatus);
1230 } else if (crq->bRequestType
1231 == (USB_DIR_IN | USB_RECIP_INTERFACE)) {
1232 status = __constant_cpu_to_le16(0);
1233 } else if (crq->bRequestType
1234 == (USB_DIR_IN | USB_RECIP_ENDPOINT)) {
1235 struct usba_ep *target;
1236
1237 target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1238 if (!target)
1239 goto stall;
1240
1241 status = 0;
1242 if (is_stalled(udc, target))
1243 status |= __constant_cpu_to_le16(1);
1244 } else
1245 goto delegate;
1246
1247 /* Write directly to the FIFO. No queueing is done. */
1248 if (crq->wLength != __constant_cpu_to_le16(sizeof(status)))
1249 goto stall;
1250 ep->state = DATA_STAGE_IN;
1251 __raw_writew(status, ep->fifo);
1252 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
1253 break;
1254 }
1255
1256 case USB_REQ_CLEAR_FEATURE: {
1257 if (crq->bRequestType == USB_RECIP_DEVICE) {
1258 if (feature_is_dev_remote_wakeup(crq))
1259 udc->devstatus
1260 &= ~(1 << USB_DEVICE_REMOTE_WAKEUP);
1261 else
1262 /* Can't CLEAR_FEATURE TEST_MODE */
1263 goto stall;
1264 } else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
1265 struct usba_ep *target;
1266
1267 if (crq->wLength != __constant_cpu_to_le16(0)
1268 || !feature_is_ep_halt(crq))
1269 goto stall;
1270 target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1271 if (!target)
1272 goto stall;
1273
1274 usba_ep_writel(target, CLR_STA, USBA_FORCE_STALL);
1275 if (target->index != 0)
1276 usba_ep_writel(target, CLR_STA,
1277 USBA_TOGGLE_CLR);
1278 } else {
1279 goto delegate;
1280 }
1281
1282 send_status(udc, ep);
1283 break;
1284 }
1285
1286 case USB_REQ_SET_FEATURE: {
1287 if (crq->bRequestType == USB_RECIP_DEVICE) {
1288 if (feature_is_dev_test_mode(crq)) {
1289 send_status(udc, ep);
1290 ep->state = STATUS_STAGE_TEST;
1291 udc->test_mode = le16_to_cpu(crq->wIndex);
1292 return 0;
1293 } else if (feature_is_dev_remote_wakeup(crq)) {
1294 udc->devstatus |= 1 << USB_DEVICE_REMOTE_WAKEUP;
1295 } else {
1296 goto stall;
1297 }
1298 } else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
1299 struct usba_ep *target;
1300
1301 if (crq->wLength != __constant_cpu_to_le16(0)
1302 || !feature_is_ep_halt(crq))
1303 goto stall;
1304
1305 target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1306 if (!target)
1307 goto stall;
1308
1309 usba_ep_writel(target, SET_STA, USBA_FORCE_STALL);
1310 } else
1311 goto delegate;
1312
1313 send_status(udc, ep);
1314 break;
1315 }
1316
1317 case USB_REQ_SET_ADDRESS:
1318 if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE))
1319 goto delegate;
1320
1321 set_address(udc, le16_to_cpu(crq->wValue));
1322 send_status(udc, ep);
1323 ep->state = STATUS_STAGE_ADDR;
1324 break;
1325
1326 default:
1327 delegate:
1328 spin_unlock(&udc->lock);
1329 retval = udc->driver->setup(&udc->gadget, crq);
1330 spin_lock(&udc->lock);
1331 }
1332
1333 return retval;
1334
1335 stall:
1336 pr_err("udc: %s: Invalid setup request: %02x.%02x v%04x i%04x l%d, "
1337 "halting endpoint...\n",
1338 ep->ep.name, crq->bRequestType, crq->bRequest,
1339 le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex),
1340 le16_to_cpu(crq->wLength));
1341 set_protocol_stall(udc, ep);
1342 return -1;
1343 }
1344
1345 static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep)
1346 {
1347 struct usba_request *req;
1348 u32 epstatus;
1349 u32 epctrl;
1350
1351 restart:
1352 epstatus = usba_ep_readl(ep, STA);
1353 epctrl = usba_ep_readl(ep, CTL);
1354
1355 DBG(DBG_INT, "%s [%d]: s/%08x c/%08x\n",
1356 ep->ep.name, ep->state, epstatus, epctrl);
1357
1358 req = NULL;
1359 if (!list_empty(&ep->queue))
1360 req = list_entry(ep->queue.next,
1361 struct usba_request, queue);
1362
1363 if ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
1364 if (req->submitted)
1365 next_fifo_transaction(ep, req);
1366 else
1367 submit_request(ep, req);
1368
1369 if (req->last_transaction) {
1370 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
1371 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
1372 }
1373 goto restart;
1374 }
1375 if ((epstatus & epctrl) & USBA_TX_COMPLETE) {
1376 usba_ep_writel(ep, CLR_STA, USBA_TX_COMPLETE);
1377
1378 switch (ep->state) {
1379 case DATA_STAGE_IN:
1380 usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
1381 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1382 ep->state = STATUS_STAGE_OUT;
1383 break;
1384 case STATUS_STAGE_ADDR:
1385 /* Activate our new address */
1386 usba_writel(udc, CTRL, (usba_readl(udc, CTRL)
1387 | USBA_FADDR_EN));
1388 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1389 ep->state = WAIT_FOR_SETUP;
1390 break;
1391 case STATUS_STAGE_IN:
1392 if (req) {
1393 list_del_init(&req->queue);
1394 request_complete(ep, req, 0);
1395 submit_next_request(ep);
1396 }
1397 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1398 ep->state = WAIT_FOR_SETUP;
1399 break;
1400 case STATUS_STAGE_TEST:
1401 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1402 ep->state = WAIT_FOR_SETUP;
1403 if (do_test_mode(udc))
1404 set_protocol_stall(udc, ep);
1405 break;
1406 default:
1407 pr_err("udc: %s: TXCOMP: Invalid endpoint state %d, "
1408 "halting endpoint...\n",
1409 ep->ep.name, ep->state);
1410 set_protocol_stall(udc, ep);
1411 break;
1412 }
1413
1414 goto restart;
1415 }
1416 if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
1417 switch (ep->state) {
1418 case STATUS_STAGE_OUT:
1419 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
1420 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1421
1422 if (req) {
1423 list_del_init(&req->queue);
1424 request_complete(ep, req, 0);
1425 }
1426 ep->state = WAIT_FOR_SETUP;
1427 break;
1428
1429 case DATA_STAGE_OUT:
1430 receive_data(ep);
1431 break;
1432
1433 default:
1434 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
1435 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1436 pr_err("udc: %s: RXRDY: Invalid endpoint state %d, "
1437 "halting endpoint...\n",
1438 ep->ep.name, ep->state);
1439 set_protocol_stall(udc, ep);
1440 break;
1441 }
1442
1443 goto restart;
1444 }
1445 if (epstatus & USBA_RX_SETUP) {
1446 union {
1447 struct usb_ctrlrequest crq;
1448 unsigned long data[2];
1449 } crq;
1450 unsigned int pkt_len;
1451 int ret;
1452
1453 if (ep->state != WAIT_FOR_SETUP) {
1454 /*
1455 * Didn't expect a SETUP packet at this
1456 * point. Clean up any pending requests (which
1457 * may be successful).
1458 */
1459 int status = -EPROTO;
1460
1461 /*
1462 * RXRDY and TXCOMP are dropped when SETUP
1463 * packets arrive. Just pretend we received
1464 * the status packet.
1465 */
1466 if (ep->state == STATUS_STAGE_OUT
1467 || ep->state == STATUS_STAGE_IN) {
1468 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1469 status = 0;
1470 }
1471
1472 if (req) {
1473 list_del_init(&req->queue);
1474 request_complete(ep, req, status);
1475 }
1476 }
1477
1478 pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
1479 DBG(DBG_HW, "Packet length: %u\n", pkt_len);
1480 if (pkt_len != sizeof(crq)) {
1481 pr_warning("udc: Invalid packet length %u "
1482 "(expected %zu)\n", pkt_len, sizeof(crq));
1483 set_protocol_stall(udc, ep);
1484 return;
1485 }
1486
1487 DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo);
1488 memcpy_fromio(crq.data, ep->fifo, sizeof(crq));
1489
1490 /* Free up one bank in the FIFO so that we can
1491 * generate or receive a reply right away. */
1492 usba_ep_writel(ep, CLR_STA, USBA_RX_SETUP);
1493
1494 /* printk(KERN_DEBUG "setup: %d: %02x.%02x\n",
1495 ep->state, crq.crq.bRequestType,
1496 crq.crq.bRequest); */
1497
1498 if (crq.crq.bRequestType & USB_DIR_IN) {
1499 /*
1500 * The USB 2.0 spec states that "if wLength is
1501 * zero, there is no data transfer phase."
1502 * However, testusb #14 seems to actually
1503 * expect a data phase even if wLength = 0...
1504 */
1505 ep->state = DATA_STAGE_IN;
1506 } else {
1507 if (crq.crq.wLength != __constant_cpu_to_le16(0))
1508 ep->state = DATA_STAGE_OUT;
1509 else
1510 ep->state = STATUS_STAGE_IN;
1511 }
1512
1513 ret = -1;
1514 if (ep->index == 0)
1515 ret = handle_ep0_setup(udc, ep, &crq.crq);
1516 else {
1517 spin_unlock(&udc->lock);
1518 ret = udc->driver->setup(&udc->gadget, &crq.crq);
1519 spin_lock(&udc->lock);
1520 }
1521
1522 DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n",
1523 crq.crq.bRequestType, crq.crq.bRequest,
1524 le16_to_cpu(crq.crq.wLength), ep->state, ret);
1525
1526 if (ret < 0) {
1527 /* Let the host know that we failed */
1528 set_protocol_stall(udc, ep);
1529 }
1530 }
1531 }
1532
1533 static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep)
1534 {
1535 struct usba_request *req;
1536 u32 epstatus;
1537 u32 epctrl;
1538
1539 epstatus = usba_ep_readl(ep, STA);
1540 epctrl = usba_ep_readl(ep, CTL);
1541
1542 DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n", ep->ep.name, epstatus);
1543
1544 while ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
1545 DBG(DBG_BUS, "%s: TX PK ready\n", ep->ep.name);
1546
1547 if (list_empty(&ep->queue)) {
1548 dev_warn(&udc->pdev->dev, "ep_irq: queue empty\n");
1549 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
1550 return;
1551 }
1552
1553 req = list_entry(ep->queue.next, struct usba_request, queue);
1554
1555 if (req->using_dma) {
1556 /* Send a zero-length packet */
1557 usba_ep_writel(ep, SET_STA,
1558 USBA_TX_PK_RDY);
1559 usba_ep_writel(ep, CTL_DIS,
1560 USBA_TX_PK_RDY);
1561 list_del_init(&req->queue);
1562 submit_next_request(ep);
1563 request_complete(ep, req, 0);
1564 } else {
1565 if (req->submitted)
1566 next_fifo_transaction(ep, req);
1567 else
1568 submit_request(ep, req);
1569
1570 if (req->last_transaction) {
1571 list_del_init(&req->queue);
1572 submit_next_request(ep);
1573 request_complete(ep, req, 0);
1574 }
1575 }
1576
1577 epstatus = usba_ep_readl(ep, STA);
1578 epctrl = usba_ep_readl(ep, CTL);
1579 }
1580 if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
1581 DBG(DBG_BUS, "%s: RX data ready\n", ep->ep.name);
1582 receive_data(ep);
1583 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
1584 }
1585 }
1586
1587 static void usba_dma_irq(struct usba_udc *udc, struct usba_ep *ep)
1588 {
1589 struct usba_request *req;
1590 u32 status, control, pending;
1591
1592 status = usba_dma_readl(ep, STATUS);
1593 control = usba_dma_readl(ep, CONTROL);
1594 #ifdef CONFIG_USB_GADGET_DEBUG_FS
1595 ep->last_dma_status = status;
1596 #endif
1597 pending = status & control;
1598 DBG(DBG_INT | DBG_DMA, "dma irq, s/%#08x, c/%#08x\n", status, control);
1599
1600 if (status & USBA_DMA_CH_EN) {
1601 dev_err(&udc->pdev->dev,
1602 "DMA_CH_EN is set after transfer is finished!\n");
1603 dev_err(&udc->pdev->dev,
1604 "status=%#08x, pending=%#08x, control=%#08x\n",
1605 status, pending, control);
1606
1607 /*
1608 * try to pretend nothing happened. We might have to
1609 * do something here...
1610 */
1611 }
1612
1613 if (list_empty(&ep->queue))
1614 /* Might happen if a reset comes along at the right moment */
1615 return;
1616
1617 if (pending & (USBA_DMA_END_TR_ST | USBA_DMA_END_BUF_ST)) {
1618 req = list_entry(ep->queue.next, struct usba_request, queue);
1619 usba_update_req(ep, req, status);
1620
1621 list_del_init(&req->queue);
1622 submit_next_request(ep);
1623 request_complete(ep, req, 0);
1624 }
1625 }
1626
1627 static irqreturn_t usba_udc_irq(int irq, void *devid)
1628 {
1629 struct usba_udc *udc = devid;
1630 u32 status;
1631 u32 dma_status;
1632 u32 ep_status;
1633
1634 spin_lock(&udc->lock);
1635
1636 status = usba_readl(udc, INT_STA);
1637 DBG(DBG_INT, "irq, status=%#08x\n", status);
1638
1639 if (status & USBA_DET_SUSPEND) {
1640 toggle_bias(0);
1641 usba_writel(udc, INT_CLR, USBA_DET_SUSPEND);
1642 DBG(DBG_BUS, "Suspend detected\n");
1643 if (udc->gadget.speed != USB_SPEED_UNKNOWN
1644 && udc->driver && udc->driver->suspend) {
1645 spin_unlock(&udc->lock);
1646 udc->driver->suspend(&udc->gadget);
1647 spin_lock(&udc->lock);
1648 }
1649 }
1650
1651 if (status & USBA_WAKE_UP) {
1652 toggle_bias(1);
1653 usba_writel(udc, INT_CLR, USBA_WAKE_UP);
1654 DBG(DBG_BUS, "Wake Up CPU detected\n");
1655 }
1656
1657 if (status & USBA_END_OF_RESUME) {
1658 usba_writel(udc, INT_CLR, USBA_END_OF_RESUME);
1659 DBG(DBG_BUS, "Resume detected\n");
1660 if (udc->gadget.speed != USB_SPEED_UNKNOWN
1661 && udc->driver && udc->driver->resume) {
1662 spin_unlock(&udc->lock);
1663 udc->driver->resume(&udc->gadget);
1664 spin_lock(&udc->lock);
1665 }
1666 }
1667
1668 dma_status = USBA_BFEXT(DMA_INT, status);
1669 if (dma_status) {
1670 int i;
1671
1672 for (i = 1; i < USBA_NR_ENDPOINTS; i++)
1673 if (dma_status & (1 << i))
1674 usba_dma_irq(udc, &usba_ep[i]);
1675 }
1676
1677 ep_status = USBA_BFEXT(EPT_INT, status);
1678 if (ep_status) {
1679 int i;
1680
1681 for (i = 0; i < USBA_NR_ENDPOINTS; i++)
1682 if (ep_status & (1 << i)) {
1683 if (ep_is_control(&usba_ep[i]))
1684 usba_control_irq(udc, &usba_ep[i]);
1685 else
1686 usba_ep_irq(udc, &usba_ep[i]);
1687 }
1688 }
1689
1690 if (status & USBA_END_OF_RESET) {
1691 struct usba_ep *ep0;
1692
1693 usba_writel(udc, INT_CLR, USBA_END_OF_RESET);
1694 reset_all_endpoints(udc);
1695
1696 if (status & USBA_HIGH_SPEED) {
1697 DBG(DBG_BUS, "High-speed bus reset detected\n");
1698 udc->gadget.speed = USB_SPEED_HIGH;
1699 } else {
1700 DBG(DBG_BUS, "Full-speed bus reset detected\n");
1701 udc->gadget.speed = USB_SPEED_FULL;
1702 }
1703
1704 ep0 = &usba_ep[0];
1705 ep0->desc = &usba_ep0_desc;
1706 ep0->state = WAIT_FOR_SETUP;
1707 usba_ep_writel(ep0, CFG,
1708 (USBA_BF(EPT_SIZE, EP0_EPT_SIZE)
1709 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL)
1710 | USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE)));
1711 usba_ep_writel(ep0, CTL_ENB,
1712 USBA_EPT_ENABLE | USBA_RX_SETUP);
1713 usba_writel(udc, INT_ENB,
1714 (usba_readl(udc, INT_ENB)
1715 | USBA_BF(EPT_INT, 1)
1716 | USBA_DET_SUSPEND
1717 | USBA_END_OF_RESUME));
1718
1719 if (!(usba_ep_readl(ep0, CFG) & USBA_EPT_MAPPED))
1720 dev_warn(&udc->pdev->dev,
1721 "WARNING: EP0 configuration is invalid!\n");
1722 }
1723
1724 spin_unlock(&udc->lock);
1725
1726 return IRQ_HANDLED;
1727 }
1728
1729 static irqreturn_t usba_vbus_irq(int irq, void *devid)
1730 {
1731 struct usba_udc *udc = devid;
1732 int vbus;
1733
1734 /* debounce */
1735 udelay(10);
1736
1737 spin_lock(&udc->lock);
1738
1739 /* May happen if Vbus pin toggles during probe() */
1740 if (!udc->driver)
1741 goto out;
1742
1743 vbus = gpio_get_value(udc->vbus_pin);
1744 if (vbus != udc->vbus_prev) {
1745 if (vbus) {
1746 toggle_bias(1);
1747 usba_writel(udc, CTRL, USBA_ENABLE_MASK);
1748 usba_writel(udc, INT_ENB, USBA_END_OF_RESET);
1749 } else {
1750 udc->gadget.speed = USB_SPEED_UNKNOWN;
1751 reset_all_endpoints(udc);
1752 toggle_bias(0);
1753 usba_writel(udc, CTRL, USBA_DISABLE_MASK);
1754 spin_unlock(&udc->lock);
1755 udc->driver->disconnect(&udc->gadget);
1756 spin_lock(&udc->lock);
1757 }
1758 udc->vbus_prev = vbus;
1759 }
1760
1761 out:
1762 spin_unlock(&udc->lock);
1763
1764 return IRQ_HANDLED;
1765 }
1766
1767 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1768 {
1769 struct usba_udc *udc = &the_udc;
1770 unsigned long flags;
1771 int ret;
1772
1773 if (!udc->pdev)
1774 return -ENODEV;
1775
1776 spin_lock_irqsave(&udc->lock, flags);
1777 if (udc->driver) {
1778 spin_unlock_irqrestore(&udc->lock, flags);
1779 return -EBUSY;
1780 }
1781
1782 udc->devstatus = 1 << USB_DEVICE_SELF_POWERED;
1783 udc->driver = driver;
1784 udc->gadget.dev.driver = &driver->driver;
1785 spin_unlock_irqrestore(&udc->lock, flags);
1786
1787 clk_enable(udc->pclk);
1788 clk_enable(udc->hclk);
1789
1790 ret = driver->bind(&udc->gadget);
1791 if (ret) {
1792 DBG(DBG_ERR, "Could not bind to driver %s: error %d\n",
1793 driver->driver.name, ret);
1794 goto err_driver_bind;
1795 }
1796
1797 DBG(DBG_GADGET, "registered driver `%s'\n", driver->driver.name);
1798
1799 udc->vbus_prev = 0;
1800 if (udc->vbus_pin != -1)
1801 enable_irq(gpio_to_irq(udc->vbus_pin));
1802
1803 /* If Vbus is present, enable the controller and wait for reset */
1804 spin_lock_irqsave(&udc->lock, flags);
1805 if (vbus_is_present(udc) && udc->vbus_prev == 0) {
1806 toggle_bias(1);
1807 usba_writel(udc, CTRL, USBA_ENABLE_MASK);
1808 usba_writel(udc, INT_ENB, USBA_END_OF_RESET);
1809 }
1810 spin_unlock_irqrestore(&udc->lock, flags);
1811
1812 return 0;
1813
1814 err_driver_bind:
1815 udc->driver = NULL;
1816 udc->gadget.dev.driver = NULL;
1817 return ret;
1818 }
1819 EXPORT_SYMBOL(usb_gadget_register_driver);
1820
1821 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1822 {
1823 struct usba_udc *udc = &the_udc;
1824 unsigned long flags;
1825
1826 if (!udc->pdev)
1827 return -ENODEV;
1828 if (driver != udc->driver)
1829 return -EINVAL;
1830
1831 if (udc->vbus_pin != -1)
1832 disable_irq(gpio_to_irq(udc->vbus_pin));
1833
1834 spin_lock_irqsave(&udc->lock, flags);
1835 udc->gadget.speed = USB_SPEED_UNKNOWN;
1836 reset_all_endpoints(udc);
1837 spin_unlock_irqrestore(&udc->lock, flags);
1838
1839 /* This will also disable the DP pullup */
1840 toggle_bias(0);
1841 usba_writel(udc, CTRL, USBA_DISABLE_MASK);
1842
1843 driver->unbind(&udc->gadget);
1844 udc->gadget.dev.driver = NULL;
1845 udc->driver = NULL;
1846
1847 clk_disable(udc->hclk);
1848 clk_disable(udc->pclk);
1849
1850 DBG(DBG_GADGET, "unregistered driver `%s'\n", driver->driver.name);
1851
1852 return 0;
1853 }
1854 EXPORT_SYMBOL(usb_gadget_unregister_driver);
1855
1856 static int __init usba_udc_probe(struct platform_device *pdev)
1857 {
1858 struct usba_platform_data *pdata = pdev->dev.platform_data;
1859 struct resource *regs, *fifo;
1860 struct clk *pclk, *hclk;
1861 struct usba_udc *udc = &the_udc;
1862 int irq, ret, i;
1863
1864 regs = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID);
1865 fifo = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID);
1866 if (!regs || !fifo || !pdata)
1867 return -ENXIO;
1868
1869 irq = platform_get_irq(pdev, 0);
1870 if (irq < 0)
1871 return irq;
1872
1873 pclk = clk_get(&pdev->dev, "pclk");
1874 if (IS_ERR(pclk))
1875 return PTR_ERR(pclk);
1876 hclk = clk_get(&pdev->dev, "hclk");
1877 if (IS_ERR(hclk)) {
1878 ret = PTR_ERR(hclk);
1879 goto err_get_hclk;
1880 }
1881
1882 udc->pdev = pdev;
1883 udc->pclk = pclk;
1884 udc->hclk = hclk;
1885 udc->vbus_pin = -1;
1886
1887 ret = -ENOMEM;
1888 udc->regs = ioremap(regs->start, regs->end - regs->start + 1);
1889 if (!udc->regs) {
1890 dev_err(&pdev->dev, "Unable to map I/O memory, aborting.\n");
1891 goto err_map_regs;
1892 }
1893 dev_info(&pdev->dev, "MMIO registers at 0x%08lx mapped at %p\n",
1894 (unsigned long)regs->start, udc->regs);
1895 udc->fifo = ioremap(fifo->start, fifo->end - fifo->start + 1);
1896 if (!udc->fifo) {
1897 dev_err(&pdev->dev, "Unable to map FIFO, aborting.\n");
1898 goto err_map_fifo;
1899 }
1900 dev_info(&pdev->dev, "FIFO at 0x%08lx mapped at %p\n",
1901 (unsigned long)fifo->start, udc->fifo);
1902
1903 device_initialize(&udc->gadget.dev);
1904 udc->gadget.dev.parent = &pdev->dev;
1905 udc->gadget.dev.dma_mask = pdev->dev.dma_mask;
1906
1907 platform_set_drvdata(pdev, udc);
1908
1909 /* Make sure we start from a clean slate */
1910 clk_enable(pclk);
1911 toggle_bias(0);
1912 usba_writel(udc, CTRL, USBA_DISABLE_MASK);
1913 clk_disable(pclk);
1914
1915 usba_ep = kmalloc(sizeof(struct usba_ep) * pdata->num_ep,
1916 GFP_KERNEL);
1917 if (!usba_ep)
1918 goto err_alloc_ep;
1919
1920 the_udc.gadget.ep0 = &usba_ep[0].ep;
1921
1922 INIT_LIST_HEAD(&usba_ep[0].ep.ep_list);
1923 usba_ep[0].ep_regs = udc->regs + USBA_EPT_BASE(0);
1924 usba_ep[0].dma_regs = udc->regs + USBA_DMA_BASE(0);
1925 usba_ep[0].fifo = udc->fifo + USBA_FIFO_BASE(0);
1926 usba_ep[0].ep.ops = &usba_ep_ops;
1927 usba_ep[0].ep.name = pdata->ep[0].name;
1928 usba_ep[0].ep.maxpacket = pdata->ep[0].fifo_size;
1929 usba_ep[0].udc = &the_udc;
1930 INIT_LIST_HEAD(&usba_ep[0].queue);
1931 usba_ep[0].fifo_size = pdata->ep[0].fifo_size;
1932 usba_ep[0].nr_banks = pdata->ep[0].nr_banks;
1933 usba_ep[0].index = pdata->ep[0].index;
1934 usba_ep[0].can_dma = pdata->ep[0].can_dma;
1935 usba_ep[0].can_isoc = pdata->ep[0].can_isoc;
1936
1937 for (i = 1; i < pdata->num_ep; i++) {
1938 struct usba_ep *ep = &usba_ep[i];
1939
1940 ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
1941 ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
1942 ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
1943 ep->ep.ops = &usba_ep_ops;
1944 ep->ep.name = pdata->ep[i].name;
1945 ep->ep.maxpacket = pdata->ep[i].fifo_size;
1946 ep->udc = &the_udc;
1947 INIT_LIST_HEAD(&ep->queue);
1948 ep->fifo_size = pdata->ep[i].fifo_size;
1949 ep->nr_banks = pdata->ep[i].nr_banks;
1950 ep->index = pdata->ep[i].index;
1951 ep->can_dma = pdata->ep[i].can_dma;
1952 ep->can_isoc = pdata->ep[i].can_isoc;
1953
1954 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
1955 }
1956
1957 ret = request_irq(irq, usba_udc_irq, 0, "atmel_usba_udc", udc);
1958 if (ret) {
1959 dev_err(&pdev->dev, "Cannot request irq %d (error %d)\n",
1960 irq, ret);
1961 goto err_request_irq;
1962 }
1963 udc->irq = irq;
1964
1965 ret = device_add(&udc->gadget.dev);
1966 if (ret) {
1967 dev_dbg(&pdev->dev, "Could not add gadget: %d\n", ret);
1968 goto err_device_add;
1969 }
1970
1971 if (pdata->vbus_pin >= 0) {
1972 if (!gpio_request(pdata->vbus_pin, "atmel_usba_udc")) {
1973 udc->vbus_pin = pdata->vbus_pin;
1974
1975 ret = request_irq(gpio_to_irq(udc->vbus_pin),
1976 usba_vbus_irq, 0,
1977 "atmel_usba_udc", udc);
1978 if (ret) {
1979 gpio_free(udc->vbus_pin);
1980 udc->vbus_pin = -1;
1981 dev_warn(&udc->pdev->dev,
1982 "failed to request vbus irq; "
1983 "assuming always on\n");
1984 } else {
1985 disable_irq(gpio_to_irq(udc->vbus_pin));
1986 }
1987 }
1988 }
1989
1990 usba_init_debugfs(udc);
1991 for (i = 1; i < pdata->num_ep; i++)
1992 usba_ep_init_debugfs(udc, &usba_ep[i]);
1993
1994 return 0;
1995
1996 err_device_add:
1997 free_irq(irq, udc);
1998 err_request_irq:
1999 kfree(usba_ep);
2000 err_alloc_ep:
2001 iounmap(udc->fifo);
2002 err_map_fifo:
2003 iounmap(udc->regs);
2004 err_map_regs:
2005 clk_put(hclk);
2006 err_get_hclk:
2007 clk_put(pclk);
2008
2009 platform_set_drvdata(pdev, NULL);
2010
2011 return ret;
2012 }
2013
2014 static int __exit usba_udc_remove(struct platform_device *pdev)
2015 {
2016 struct usba_udc *udc;
2017 int i;
2018 struct usba_platform_data *pdata = pdev->dev.platform_data;
2019
2020 udc = platform_get_drvdata(pdev);
2021
2022 for (i = 1; i < pdata->num_ep; i++)
2023 usba_ep_cleanup_debugfs(&usba_ep[i]);
2024 usba_cleanup_debugfs(udc);
2025
2026 if (udc->vbus_pin != -1)
2027 gpio_free(udc->vbus_pin);
2028
2029 free_irq(udc->irq, udc);
2030 kfree(usba_ep);
2031 iounmap(udc->fifo);
2032 iounmap(udc->regs);
2033 clk_put(udc->hclk);
2034 clk_put(udc->pclk);
2035
2036 device_unregister(&udc->gadget.dev);
2037
2038 return 0;
2039 }
2040
2041 static struct platform_driver udc_driver = {
2042 .remove = __exit_p(usba_udc_remove),
2043 .driver = {
2044 .name = "atmel_usba_udc",
2045 .owner = THIS_MODULE,
2046 },
2047 };
2048
2049 static int __init udc_init(void)
2050 {
2051 return platform_driver_probe(&udc_driver, usba_udc_probe);
2052 }
2053 module_init(udc_init);
2054
2055 static void __exit udc_exit(void)
2056 {
2057 platform_driver_unregister(&udc_driver);
2058 }
2059 module_exit(udc_exit);
2060
2061 MODULE_DESCRIPTION("Atmel USBA UDC driver");
2062 MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
2063 MODULE_LICENSE("GPL");
2064 MODULE_ALIAS("platform:atmel_usba_udc");
A Kernel for the Dreambox dm7025.