slub-restructure-slab-alloc
[linux-2.6/linux-trees-mm.git] / include / asm-arm / arch-s3c2410 / system.h
blob63891786dfa03aa867ca804e13e2b86ea9490b29
1 /* linux/include/asm-arm/arch-s3c2410/system.h
3 * Copyright (c) 2003 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * S3C2410 - System function defines and includes
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <asm/hardware.h>
14 #include <asm/io.h>
16 #include <asm/arch/map.h>
17 #include <asm/arch/idle.h>
18 #include <asm/arch/reset.h>
20 #include <asm/plat-s3c/regs-watchdog.h>
21 #include <asm/arch/regs-clock.h>
23 void (*s3c24xx_idle)(void);
24 void (*s3c24xx_reset_hook)(void);
26 void s3c24xx_default_idle(void)
28 unsigned long tmp;
29 int i;
31 /* idle the system by using the idle mode which will wait for an
32 * interrupt to happen before restarting the system.
35 /* Warning: going into idle state upsets jtag scanning */
37 __raw_writel(__raw_readl(S3C2410_CLKCON) | S3C2410_CLKCON_IDLE,
38 S3C2410_CLKCON);
40 /* the samsung port seems to do a loop and then unset idle.. */
41 for (i = 0; i < 50; i++) {
42 tmp += __raw_readl(S3C2410_CLKCON); /* ensure loop not optimised out */
45 /* this bit is not cleared on re-start... */
47 __raw_writel(__raw_readl(S3C2410_CLKCON) & ~S3C2410_CLKCON_IDLE,
48 S3C2410_CLKCON);
51 static void arch_idle(void)
53 if (s3c24xx_idle != NULL)
54 (s3c24xx_idle)();
55 else
56 s3c24xx_default_idle();
59 static void
60 arch_reset(char mode)
62 if (mode == 's') {
63 cpu_reset(0);
66 if (s3c24xx_reset_hook)
67 s3c24xx_reset_hook();
69 printk("arch_reset: attempting watchdog reset\n");
71 __raw_writel(0, S3C2410_WTCON); /* disable watchdog, to be safe */
73 /* put initial values into count and data */
74 __raw_writel(0x100, S3C2410_WTCNT);
75 __raw_writel(0x100, S3C2410_WTDAT);
77 /* set the watchdog to go and reset... */
78 __raw_writel(S3C2410_WTCON_ENABLE|S3C2410_WTCON_DIV16|S3C2410_WTCON_RSTEN |
79 S3C2410_WTCON_PRESCALE(0x20), S3C2410_WTCON);
81 /* wait for reset to assert... */
82 mdelay(5000);
84 printk(KERN_ERR "Watchdog reset failed to assert reset\n");
86 /* we'll take a jump through zero as a poor second */
87 cpu_reset(0);